Opt-in always-on nVHE hypervisor

The version of PSCI that the kernel should use to communicate with firmware is typically obtained from probing PSCI_VERSION. However, that doesn't work for PSCI v0.1 where the host gets the information from DT/ACPI, or if PSCI is not supported / was disabled.

KVM's host PSCI proxy needs to be configured with the same version used by the host driver. Expose the PSCI version used by the host with a read-only accessor.

Signed-off-by David Brazdil <[email protected]>

---
 drivers/firmware/psci/psci.c | 11 +++++++++++
 include/linux/psci.h         |  8 ++++++++
 2 files changed, 19 insertions(+)

drivers/firmware/psci/psci.c +11 -0

index 00af99b6f97c..bc1b2d60fdbf 100644
@@ -49,6 +49,13 @@ static int resident_cpu = -1;
 struct psci_operations psci_ops;
 static enum arm_smccc_conduit psci_conduit = SMCCC_CONDUIT_NONE;
 
+static int driver_version = PSCI_VERSION(0, 0);
+
+int psci_driver_version(void)
+{
+	return driver_version;
+}
+
 bool psci_tos_resident_on(int cpu)
 {
 	return cpu == resident_cpu;

@@ -461,6 +468,8 @@ static int __init psci_probe(void)
 		return -EINVAL;
 	}
 
+	driver_version = ver;
+
 	psci_0_2_set_functions();
 
 	psci_init_migrate();

@@ -514,6 +523,8 @@ static int __init psci_0_1_init(struct device_node 
 *np)
 
 	pr_info("Using PSCI v0.1 Function IDs from DT\n");
 
+	driver_version = PSCI_VERSION(0, 1);
+
 	if (!of_property_read_u32(np, "cpu_suspend", &id)) {
 		psci_function_id[PSCI_FN_CPU_SUSPEND] = id;

drivers/firmware/psci/psci.c +0 -0

 		psci_ops.cpu_suspend = psci_cpu_suspend;

include/linux/psci.h +4 -0

index 2a1bfb890e58..5b5dcf176aa6 100644
@@ -21,6 +21,14 @@ bool psci_power_state_is_valid(u32 state);
 int psci_set_osi_mode(bool enable);
 bool psci_has_osi_support(void);
 
+/**
+ * The version of the PSCI specification followed by the driver.
+ * This is equivalent to calling PSCI_VERSION except:
+ *   (a) it also works for PSCI v0.1, which does not support 

PSCI_VERSION, and
+ * (b) it is set to v0.0 if the PSCI driver was not initialized.
+ */

include/linux/psci.h bool psci_power_state_is_valid(u32 state); · line 34

Quoted 4 lines

include/linux/psci.h +1 -0

+
 struct psci_operations {
 	u32 (*get_version)(void);
 	int (*cpu_suspend)(u32 state, unsigned long entry_point);

I still maintain that populating .get_version in all cases instead of duplicating an existing functionality is a better outcome. PSCI not supported would be implied by .get_version being NULL.

What breaks?

KVM currently initializes MAIR_EL2 to the value of MAIR_EL1. In preparation for initializing MAIR_EL2 before MAIR_EL1, move the constant into a shared header file.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/memory.h | 13 +++++++++++++
 arch/arm64/mm/proc.S            | 13 -------------
 2 files changed, 13 insertions(+), 13 deletions(-)

arch/arm64/include/asm/memory.h +2 -0

index cd61239bae8c..aca00737e771 100644
@@ -152,6 +152,19 @@
 #define MT_S2_FWB_NORMAL	6
 #define MT_S2_FWB_DEVICE_nGnRE	1
 
+/*
+ * Default MAIR_EL1. MT_NORMAL_TAGGED is initially mapped as Normal 

memory and
+ * changed during __cpu_setup to Normal Tagged if the system supports MTE.
+ */
+#define MAIR_EL1_SET \

arch/arm64/include/asm/memory.h +7 -0

+	 MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) |	\
+	 MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) |		\
+	 MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) |		\
+	 MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) |			\
+	 MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) |		\
+	 MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))
+
 #ifdef CONFIG_ARM64_4K_PAGES
 #define IOREMAP_MAX_ORDER	(PUD_SHIFT)
 #else

arch/arm64/mm/proc.S +0 -2

index 23c326a06b2d..25ff21b3a1c6 100644
@@ -45,19 +45,6 @@
 #define TCR_KASAN_FLAGS 0
 #endif
 
-/*
- * Default MAIR_EL1. MT_NORMAL_TAGGED is initially mapped as Normal 

memory and
- * changed during __cpu_setup to Normal Tagged if the system supports MTE.
- */

arch/arm64/mm/proc.S +0 -2

-#define MAIR_EL1_SET							\
-	(MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) |	\

When compiling with __KVM_NVHE_HYPERVISOR__ redefine per_cpu_offset() to __hyp_per_cpu_offset() which looks up the base of the nVHE per-CPU region of the given cpu and computes its offset from the .hyp.data..percpu section.

This enables use of per_cpu_ptr() helpers in nVHE hyp code. Until now only this_cpu_ptr() was supported by setting TPIDR_EL2.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/percpu.h  |  6 ++++++
 arch/arm64/kernel/image-vars.h   |  3 +++
 arch/arm64/kvm/hyp/nvhe/Makefile |  3 ++-
 arch/arm64/kvm/hyp/nvhe/percpu.c | 22 ++++++++++++++++++++++
 4 files changed, 33 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/kvm/hyp/nvhe/percpu.c

arch/arm64/include/asm/percpu.h +6 -0

index 1599e17379d8..8f1661603b78 100644
@@ -239,6 +239,12 @@ PERCPU_RET_OP(add, add, ldadd)
 #define this_cpu_cmpxchg_8(pcp, o, n)	\
 	_pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
 
+#ifdef __KVM_NVHE_HYPERVISOR__
+extern unsigned long __hyp_per_cpu_offset(unsigned int cpu);
+#define __per_cpu_offset
+#define per_cpu_offset(cpu)	__hyp_per_cpu_offset((cpu))
+#endif
+
 #include <asm-generic/percpu.h>
 
 /* Redefine macros for nVHE hyp under DEBUG_PREEMPT to avoid its

dependencies. */

arch/arm64/kernel/image-vars.h +3 -0

index c615b285ff5b..78a42a7cdb72 100644
@@ -103,6 +103,9 @@ KVM_NVHE_ALIAS(gic_nonsecure_priorities);
 KVM_NVHE_ALIAS(__start___kvm_ex_table);
 KVM_NVHE_ALIAS(__stop___kvm_ex_table);
 
+/* Array containing bases of nVHE per-CPU memory regions. */
+KVM_NVHE_ALIAS(kvm_arm_hyp_percpu_base);
+
 #endif /* CONFIG_KVM */
 
 #endif /* __ARM64_KERNEL_IMAGE_VARS_H */

arch/arm64/kvm/hyp/nvhe/Makefile +0 -1

index ddde15fe85f2..c45f440cce51 100644
@@ -6,7 +6,8 @@
 asflags-y := -D__KVM_NVHE_HYPERVISOR__
 ccflags-y := -D__KVM_NVHE_HYPERVISOR__
 
-obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o hyp-init.o

host.o hyp-main.o
+obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o hyp-init.o host.o \

arch/arm64/kvm/hyp/nvhe/Makefile +1 -0

+	 hyp-main.o percpu.o
 obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o 

../entry.o \

arch/arm64/kvm/hyp/nvhe/Makefile +0 -0

 	 ../fpsimd.o ../hyp-entry.o

arch/arm64/kvm/hyp/nvhe/percpu.c new file +9 -0

new file mode 100644
index 000000000000..5fd0c5696907
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - Google LLC
+ * Author: David Brazdil <[email protected]>
+ */
+
+#include <asm/kvm_asm.h>
+#include <asm/kvm_hyp.h>
+#include <asm/kvm_mmu.h>

Review

Quoted 2 lines

(quoted diff) +2 -0

+
+	cpu_base_array = kern_hyp_va(&kvm_arm_hyp_percpu_base[0]);

There is no guarantee that this will not generate a PC relative addressing, resulting in kern_hyp_va() being applied twice.

Consider using hyp_symbol_addr() instead, which always does the right by forcing a PC relative addressing and not subsequently mangling the address.

arch/arm64/kvm/hyp/nvhe/percpu.c line 21

Quoted 2 lines

arch/arm64/kvm/hyp/nvhe/percpu.c new file +2 -0

+	this_cpu_base = kern_hyp_va(cpu_base_array[cpu]);
+	return this_cpu_base - (unsigned long)&__per_cpu_start;

And this is the opposite case: if the compiler generates an absolute address, you're toast. Yes, this is just as unlikely, but hey... Same remedy should apply.

Quoted 10 lines

Review

Quoted 2 lines

(quoted diff) +2 -0

+
+	cpu_base_array = kern_hyp_va(&kvm_arm_hyp_percpu_base[0]);

There is no guarantee that this will not generate a PC relative addressing, resulting in kern_hyp_va() being applied twice.

Consider using hyp_symbol_addr() instead, which always does the right by forcing a PC relative addressing and not subsequently mangling the address.

Quoted 6 lines

arch/arm64/kvm/hyp/nvhe/percpu.c line 21

Quoted 2 lines

arch/arm64/kvm/hyp/nvhe/percpu.c new file +2 -0

+	this_cpu_base = kern_hyp_va(cpu_base_array[cpu]);
+	return this_cpu_base - (unsigned long)&__per_cpu_start;

And this is the opposite case: if the compiler generates an absolute address, you're toast. Yes, this is just as unlikely, but hey... Same remedy should apply.

Good point, and I'll probably keep forgetting about this in the future. Now that all .hyp.text is only executed under hyp page tables, should we start thinking about fixing up the relocations?

When KVM starts validating host's PSCI requests, it will need to map MPIDR back to the CPU ID. To this end, copy cpu_logical_map into nVHE hyp memory when KVM is initialized.

Only copy the information for CPUs that are online at the point of KVM initialization so that KVM rejects CPUs whose features were not checked against the finalized capabilities.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/arm.c             | 17 +++++++++++++++++
 arch/arm64/kvm/hyp/nvhe/percpu.c | 16 ++++++++++++++++
 2 files changed, 33 insertions(+)

arch/arm64/kvm/arm.c +17 -0

index 9ba9db2aa7f8..b85b4294b72d 100644
@@ -1481,6 +1481,21 @@ static inline void hyp_cpu_pm_exit(void)
 }
 #endif
 
+static void init_cpu_logical_map(void)
+{
+	extern u64 kvm_nvhe_sym(__cpu_logical_map)[NR_CPUS];
+	int cpu;
+
+	/*
+	 * Copy the MPIDR <-> logical CPU ID mapping to hyp.
+	 * Only copy the set of online CPUs whose features have been chacked
+	 * against the finalized system capabilities. The hypervisor will not
+	 * allow any other CPUs from the `possible` set to boot.
+	 */
+	for_each_online_cpu(cpu)
+		CHOOSE_NVHE_SYM(__cpu_logical_map)[cpu] = cpu_logical_map(cpu);
+}
+
 static int init_common_resources(void)
 {
 	return kvm_set_ipa_limit();

@@ -1659,6 +1674,8 @@ static int init_hyp_mode(void)
 		}
 	}
 
+	init_cpu_logical_map();
+
 	return 0;
 
 out_err:

arch/arm64/kvm/hyp/nvhe/percpu.c +4 -0

index 5fd0c5696907..d0b9dbc2df45 100644
@@ -8,6 +8,22 @@
 #include <asm/kvm_hyp.h>
 #include <asm/kvm_mmu.h>
 
+/*
+ * nVHE copy of data structures tracking available CPU cores.
+ * Only entries for CPUs that were online at KVM init are populated.
+ * Other CPUs should not be allowed to boot because their features 

were
+ * not checked against the finalized system capabilities.
+ */
+u64 __ro_after_init __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+/*
+ * nVHE copy of data structures tracking available CPU cores.
+ * Only entries for CPUs that were online at KVM init are populated.
+ * Other CPUs should not be allowed to boot because their features were
+ * not checked against the finalized system capabilities.
+ */
+u64 __ro_after_init __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1]

= INVALID_HWID };

I'm not sure what __ro_after_init means once we get S2 isolation.

arch/arm64/kvm/hyp/nvhe/percpu.c line 19

Quoted 3 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +2 -0

+
+u64 cpu_logical_map(int cpu)

nit: is there any reason why "cpu" cannot be unsigned? The thought of a negative CPU number makes me shiver...

arch/arm64/kvm/hyp/nvhe/percpu.c line 29

Quoted 11 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+{
+	if (cpu < 0 || cpu >= ARRAY_SIZE(__cpu_logical_map))
+		hyp_panic();
+
+	return __cpu_logical_map[cpu];
+}
+
 unsigned long __hyp_per_cpu_offset(unsigned int cpu)
 {
 	unsigned long *cpu_base_array;

Overall, this patch would make more sense closer it its use case (in patch 19). I also don't understand why this lives in percpu.c...

Quoted 10 lines

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+/*
+ * nVHE copy of data structures tracking available CPU cores.
+ * Only entries for CPUs that were online at KVM init are populated.
+ * Other CPUs should not be allowed to boot because their features were
+ * not checked against the finalized system capabilities.
+ */
+u64 __ro_after_init __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1]

= INVALID_HWID };

I'm not sure what __ro_after_init means once we get S2 isolation.

It is stretching the definition of 'init' a bit, I know, but I don't see what your worry is about S2? The intention is to mark this read-only for .hyp.text at runtime. With S2, the host won't be able to write to it after KVM init. Obviously that's currently not the case.

One thing we might change in the future is marking it RW for some initial setup in a HVC handler, then marking it RO for the rest of uptime.

Quoted 7 lines

arch/arm64/kvm/hyp/nvhe/percpu.c line 19

Quoted 4 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +2 -0

+
+u64 cpu_logical_map(int cpu)

nit: is there any reason why "cpu" cannot be unsigned? The thought of a negative CPU number makes me shiver...

Same here. That's how it's defined in kernel proper, so I went with that.

Quoted 14 lines

arch/arm64/kvm/hyp/nvhe/percpu.c line 29

Quoted 11 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+{
+	if (cpu < 0 || cpu >= ARRAY_SIZE(__cpu_logical_map))
+		hyp_panic();
+
+	return __cpu_logical_map[cpu];
+}
+
 unsigned long __hyp_per_cpu_offset(unsigned int cpu)
 {
 	unsigned long *cpu_base_array;

Overall, this patch would make more sense closer it its use case (in patch 19). I also don't understand why this lives in percpu.c...

I didn't think it called for adding another C file for this. How about we rename this file to smp.c? Would that make sense for both?

Quoted 11 lines · David Brazdil

Quoted 10 lines

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+/*
+ * nVHE copy of data structures tracking available CPU cores.
+ * Only entries for CPUs that were online at KVM init are populated.
+ * Other CPUs should not be allowed to boot because their features were
+ * not checked against the finalized system capabilities.
+ */
+u64 __ro_after_init __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1]

= INVALID_HWID };

I'm not sure what __ro_after_init means once we get S2 isolation.

Quoted 7 lines

It is stretching the definition of 'init' a bit, I know, but I don't see what
your worry is about S2? The intention is to mark this read-only for .hyp.text
at runtime. With S2, the host won't be able to write to it after KVM init.
Obviously that's currently not the case.

More importantly, EL2 can write to it at any time, which is the bit I'm worried
about, as it makes the annotation misleading.

Quoted 4 lines

One thing we might change in the future is marking it RW for some initial
setup in a HVC handler, then marking it RO for the rest of uptime.

That'd be a desirable outcome, and it would be consistent with the rest of the kernel.

Quoted 8 lines

Quoted 7 lines

arch/arm64/kvm/hyp/nvhe/percpu.c line 19

Quoted 4 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +2 -0

+
+u64 cpu_logical_map(int cpu)

nit: is there any reason why "cpu" cannot be unsigned? The thought of a negative CPU number makes me shiver...

Quoted 2 lines

Same here. That's how it's defined in kernel proper, so I went with that.

I'm happy to deviate from the kernel (give the function a different name if this clashes with existing include files).

We can also fix the rest of the kernel (I've just written the trivial patch).

Quoted 20 lines · Marc Zyngier

Quoted 18 lines · David Brazdil

Quoted 10 lines

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/percpu.c +7 -0

+/*
+ * nVHE copy of data structures tracking available CPU cores.
+ * Only entries for CPUs that were online at KVM init are populated.
+ * Other CPUs should not be allowed to boot because their features were
+ * not checked against the finalized system capabilities.
+ */
+u64 __ro_after_init __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1]

= INVALID_HWID };

I'm not sure what __ro_after_init means once we get S2 isolation.

It is stretching the definition of 'init' a bit, I know, but I don't see what
your worry is about S2? The intention is to mark this read-only for .hyp.text
at runtime. With S2, the host won't be able to write to it after KVM init.
Obviously that's currently not the case.

Quoted 3 lines

More importantly, EL2 can write to it at any time, which is the bit I'm worried
about, as it makes the annotation misleading.

EL2 can't, at least not accidentally. The hyp memory mapping is PAGE_HYP_RO (see patch 05).

Shouldn't clash with include files. Where fixing the kernel might clash is all the users of for_each_*_cpu that use an int for the iterator var.

Once we start initializing KVM on newly booted cores before the rest of the kernel, parameters to __do_hyp_init will need to be provided by EL2 rather than EL1. At that point it will not be possible to pass its four arguments directly because PSCI_CPU_ON only supports one context argument.

Refactor __do_hyp_init to accept its parameters in a struct. This prepares the code for KVM booting cores as well as removes any limits on the number of __do_hyp_init arguments.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/kvm_asm.h   |  7 +++++++
 arch/arm64/include/asm/kvm_hyp.h   |  4 ++++
 arch/arm64/kernel/asm-offsets.c    |  4 ++++
 arch/arm64/kvm/arm.c               | 26 ++++++++++++++------------
 arch/arm64/kvm/hyp/nvhe/hyp-init.S | 21 ++++++++++-----------
 arch/arm64/kvm/hyp/nvhe/hyp-main.c |  2 ++
 6 files changed, 41 insertions(+), 23 deletions(-)

arch/arm64/include/asm/kvm_asm.h +0 -0

index 54387ccd1ab2..a49a87a186c3 100644

arch/arm64/include/asm/kvm_asm.h +1 -0

+
 /* Translate a kernel address @ptr into its equivalent linear mapping 
 */
 #define kvm_ksym_ref(ptr)						\

arch/arm64/include/asm/kvm_asm.h +0 -0

 	({								\

arch/arm64/include/asm/kvm_hyp.h +4 -0

index 6b664de5ec1f..a3289071f3d8 100644
@@ -15,6 +15,10 @@
 DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
 DECLARE_PER_CPU(unsigned long, kvm_hyp_vector);
 
+#ifdef __KVM_NVHE_HYPERVISOR__
+DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
+#endif
+
 #define read_sysreg_elx(r,nvh,vh)					\
 	({								\
 		u64 reg;						\

arch/arm64/kernel/asm-offsets.c +1 -0

index 7d32fc959b1a..0cbb86135c7c 100644
@@ -110,6 +110,10 @@ int main(void)
   DEFINE(CPU_APGAKEYLO_EL1,	offsetof(struct kvm_cpu_context,
 sys_regs[APGAKEYLO_EL1]));
   DEFINE(HOST_CONTEXT_VCPU,	offsetof(struct kvm_cpu_context,
 __hyp_running_vcpu));
   DEFINE(HOST_DATA_CONTEXT,	offsetof(struct kvm_host_data, 
 host_ctxt));
+  DEFINE(NVHE_INIT_PGD_PTR,	offsetof(struct kvm_nvhe_init_params, 

pgd_ptr));
+ DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params,
tpidr_el2));
+ DEFINE(NVHE_INIT_STACK_PTR, offsetof(struct kvm_nvhe_init_params,
hyp_stack_ptr));
+ DEFINE(NVHE_INIT_VECTOR_PTR, offsetof(struct kvm_nvhe_init_params,
vector_ptr));
#endif

 #ifdef CONFIG_CPU_PM
   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));

arch/arm64/kvm/arm.c +1 -0

index b85b4294b72d..1a57b6025937 100644
@@ -50,6 +50,7 @@ DECLARE_KVM_HYP_PER_CPU(unsigned long, 
 kvm_hyp_vector);
 
 static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page);
 unsigned long kvm_arm_hyp_percpu_base[NR_CPUS];
+DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, 
 kvm_init_params);
 

/* The VMID used in the VTTBR */
static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1);

arch/arm64/kvm/arm.c +1 -4

@@ -1331,10 +1332,7 @@ static int kvm_map_vectors(void)
 
 static void cpu_init_hyp_mode(void)
 {
-	phys_addr_t pgd_ptr;
-	unsigned long hyp_stack_ptr;
-	unsigned long vector_ptr;
-	unsigned long tpidr_el2;
+	struct kvm_nvhe_init_params *params = 
 this_cpu_ptr_nvhe_sym(kvm_init_params);
 	struct arm_smccc_res res;
 

arch/arm64/kvm/arm.c +1 -2

 	/* Switch from the HYP stub to our own HYP init vector */

@@ -1345,13 +1343,18 @@ static void cpu_init_hyp_mode(void)
 	 * kernel's mapping to the linear mapping, and store it in tpidr_el2
 	 * so that we can use adr_l to access per-cpu variables in EL2.
 	 */
-	tpidr_el2 = (unsigned long)this_cpu_ptr_nvhe_sym(__per_cpu_start) -
-		    (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start));
+	params->tpidr_el2 = (unsigned 

long)this_cpu_ptr_nvhe_sym(__per_cpu_start) -

arch/arm64/kvm/arm.c +1 -4

+			    (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start));
 
-	pgd_ptr = kvm_mmu_get_httbr();
-	hyp_stack_ptr = __this_cpu_read(kvm_arm_hyp_stack_page) + PAGE_SIZE;
-	hyp_stack_ptr = kern_hyp_va(hyp_stack_ptr);
-	vector_ptr = (unsigned 

long)kern_hyp_va(kvm_ksym_ref(__kvm_hyp_host_vector));

arch/arm64/kvm/arm.c +2 -0

+	params->pgd_ptr = kvm_mmu_get_httbr();
+	params->vector_ptr = (unsigned

long)kern_hyp_va(kvm_ksym_ref(__kvm_hyp_host_vector));

arch/arm64/kvm/arm.c +1 -0

+	params->hyp_stack_ptr =

kern_hyp_va(__this_cpu_read(kvm_arm_hyp_stack_page) + PAGE_SIZE);

arch/arm64/kvm/arm.c +3 -2

+	 */
+	__flush_dcache_area(params, sizeof(*params));
 
 	/*
 	 * Call initialization code, and switch to the full blown HYP code.

@@ -1360,8 +1363,7 @@ static void cpu_init_hyp_mode(void)
 	 * cpus_have_const_cap() wrapper.
 	 */
 	BUG_ON(!system_capabilities_finalized());
-	arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init),
-			  pgd_ptr, tpidr_el2, hyp_stack_ptr, vector_ptr, &res);
+	arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init),
 virt_to_phys(params), &res);
 	WARN_ON(res.a0 != SMCCC_RET_SUCCESS);
 

arch/arm64/kvm/arm.c +0 -0

 	/*

arch/arm64/kvm/hyp/nvhe/hyp-init.S +10 -11

index 96e70f976ff5..6f3ac5d428ec 100644
@@ -47,10 +47,7 @@ __invalid:
 
 	/*
 	 * x0: SMCCC function ID
-	 * x1: HYP pgd
-	 * x2: per-CPU offset
-	 * x3: HYP stack
-	 * x4: HYP vectors
+	 * x1: struct kvm_nvhe_init_params PA
 	 */
 __do_hyp_init:
 	/* Check for a stub HVC call */

@@ -71,10 +68,16 @@ __do_hyp_init:
 	mov	x0, #SMCCC_RET_NOT_SUPPORTED
 	eret
 
-1:
-	/* Set tpidr_el2 for use by HYP to free a register */
-	msr	tpidr_el2, x2
+1:	ldr	x0, [x1, #NVHE_INIT_TPIDR_EL2]
+	msr	tpidr_el2, x0
 
+	ldr	x0, [x1, #NVHE_INIT_STACK_PTR]
+	mov	sp, x0
+
+	ldr	x0, [x1, #NVHE_INIT_VECTOR_PTR]
+	msr	vbar_el2, x0
+
+	ldr	x1, [x1, #NVHE_INIT_PGD_PTR]
 	phys_to_ttbr x0, x1
 alternative_if ARM64_HAS_CNP
 	orr	x0, x0, #TTBR_CNP_BIT

@@ -134,10 +137,6 @@ alternative_else_nop_endif
 	msr	sctlr_el2, x0
 	isb
 
-	/* Set the stack and new vectors */
-	mov	sp, x3
-	msr	vbar_el2, x4
-
 	/* Hello, World! */
 	mov	x0, #SMCCC_RET_SUCCESS
 	eret

arch/arm64/kvm/hyp/nvhe/hyp-main.c +0 -0

index e2eafe2c93af..411b0f652417 100644

When the a CPU is booted in EL2, the kernel checks for VHE support and initializes the CPU core accordingly. For nVHE it also installs the stub vectors and drops down to EL1.

Once KVM gains the ability to boot cores without going through the kernel entry point, it will need to initialize the CPU the same way. Extract the relevant bits of el2_setup into init_el2_state macro with an argument specifying whether to initialize for VHE or nVHE.

No functional change. Size of el2_setup increased by 148 bytes due to duplication.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/kvm_asm.h | 128 ++++++++++++++++++++++++++++
 arch/arm64/kernel/head.S         | 140 +++----------------------------
 2 files changed, 141 insertions(+), 127 deletions(-)

arch/arm64/include/asm/kvm_asm.h +16 -0

index a49a87a186c3..893327d1e449 100644
@@ -331,6 +331,134 @@ extern char
 __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ];
 	msr	sp_el0, \tmp
 .endm
 
+.macro init_el2_state mode
+
+.ifnes "\mode", "vhe"
+.ifnes "\mode", "nvhe"
+.error "Invalid 'mode' argument"
+.endif
+.endif
+
+	mov_q	x0, (SCTLR_EL2_RES1 | ENDIAN_SET_EL2)
+	msr	sctlr_el2, x0
+	isb
+
+	/*
+	 * Allow Non-secure EL1 and EL0 to access physical timer and counter.
+	 * This is not necessary for VHE, since the host kernel runs in EL2,
+	 * and EL0 accesses are configured in the later stage of boot 

process.

arch/arm64/include/asm/kvm_asm.h +1 -0

+	 * Note that when HCR_EL2.E2H == 1, CNTHCTL_EL2 has the same bit 

layout

arch/arm64/include/asm/kvm_asm.h +1 -0

+	 * as CNTKCTL_EL1, and CNTKCTL_EL1 accessing instructions are 

redefined

arch/arm64/include/asm/kvm_asm.h +1 -0

+	 * to access CNTHCTL_EL2. This allows the kernel designed to run at 

EL1

arch/arm64/include/asm/kvm_asm.h +22 -0

+	 * to transparently mess with the EL0 bits via CNTKCTL_EL1 access in
+	 * EL2.
+	 */
+.ifeqs "\mode", "nvhe"
+	mrs	x0, cnthctl_el2
+	orr	x0, x0, #3			// Enable EL1 physical timers
+	msr	cnthctl_el2, x0
+.endif
+	msr	cntvoff_el2, xzr		// Clear virtual offset
+
+#ifdef CONFIG_ARM_GIC_V3
+	/* GICv3 system register access */
+	mrs	x0, id_aa64pfr0_el1
+	ubfx	x0, x0, #ID_AA64PFR0_GIC_SHIFT, #4
+	cbz	x0, 3f
+
+	mrs_s	x0, SYS_ICC_SRE_EL2
+	orr	x0, x0, #ICC_SRE_EL2_SRE	// Set ICC_SRE_EL2.SRE==1
+	orr	x0, x0, #ICC_SRE_EL2_ENABLE	// Set ICC_SRE_EL2.Enable==1
+	msr_s	SYS_ICC_SRE_EL2, x0
+	isb					// Make sure SRE is now set
+	mrs_s	x0, SYS_ICC_SRE_EL2		// Read SRE back,

arch/arm64/include/asm/kvm_asm.h +21 -0

+
+#ifdef CONFIG_COMPAT
+	msr	hstr_el2, xzr			// Disable CP15 traps to EL2
+#endif
+
+	/* EL2 debug */
+	mrs	x1, id_aa64dfr0_el1
+	sbfx	x0, x1, #ID_AA64DFR0_PMUVER_SHIFT, #4
+	cmp	x0, #1
+	b.lt	4f				// Skip if no PMU present
+	mrs	x0, pmcr_el0			// Disable debug access traps
+	ubfx	x0, x0, #11, #5			// to EL2 and allow access to
+4:
+	csel	x3, xzr, x0, lt			// all PMU counters from EL1
+
+	/* Statistical profiling */
+	ubfx	x0, x1, #ID_AA64DFR0_PMSVER_SHIFT, #4
+	cbz	x0, 7f				// Skip if SPE not present
+.ifeqs "\mode", "nvhe"
+	mrs_s	x4, SYS_PMBIDR_EL1		// If SPE available at EL2,
+	and	x4, x4, #(1 << SYS_PMBIDR_EL1_P_SHIFT)

+7:

arch/arm64/include/asm/kvm_asm.h +45 -0

+	msr	mdcr_el2, x3			// Configure debug traps
+
+	/* LORegions */
+	mrs	x1, id_aa64mmfr1_el1
+	ubfx	x0, x1, #ID_AA64MMFR1_LOR_SHIFT, 4
+	cbz	x0, 1f
+	msr_s	SYS_LORC_EL1, xzr
+1:
+
+	/* Stage-2 translation */
+	msr	vttbr_el2, xzr
+
+.ifeqs "\mode", "nvhe"
+	/*
+	 * When VHE is not in use, early init of EL2 and EL1 needs to be
+	 * done here.
+	 * When VHE _is_ in use, EL1 will not be used in the host and
+	 * requires no configuration, and all non-hyp-specific EL2 setup
+	 * will be done via the _EL1 system register aliases in __cpu_setup.
+	 */
+	mov_q	x0, (SCTLR_EL1_RES1 | ENDIAN_SET_EL1)
+	msr	sctlr_el1, x0
+
+	/* Coprocessor traps. */
+	mov	x0, #0x33ff
+	msr	cptr_el2, x0			// Disable copro. traps to EL2
+
+	/* SVE register access */
+	mrs	x1, id_aa64pfr0_el1
+	ubfx	x1, x1, #ID_AA64PFR0_SVE_SHIFT, #4
+	cbz	x1, 7f
+
+	bic	x0, x0, #CPTR_EL2_TZ		// Also disable SVE traps
+	msr	cptr_el2, x0			// Disable copro. traps to EL2
+	isb
+	mov	x1, #ZCR_ELx_LEN_MASK		// SVE: Enable full vector
+	msr_s	SYS_ZCR_EL2, x1			// length for EL1.
+
+	/* spsr */
+7:	mov	x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
+		      PSR_MODE_EL1h)
+	msr	spsr_el2, x0
+.endif
+.endm
+
 #endif
 
 #endif /* __ARM_KVM_ASM_H__ */

arch/arm64/kernel/head.S +2 -5

index d8d9caf02834..e7270b63abed 100644
@@ -25,6 +25,7 @@
 #include <asm/image.h>
 #include <asm/kernel-pgtable.h>
 #include <asm/kvm_arm.h>
+#include <asm/kvm_asm.h>
 #include <asm/memory.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/page.h>

@@ -499,153 +500,38 @@ SYM_FUNC_START(el2_setup)
 	isb
 	ret
 
-1:	mov_q	x0, (SCTLR_EL2_RES1 | ENDIAN_SET_EL2)
-	msr	sctlr_el2, x0
-
+1:
 #ifdef CONFIG_ARM64_VHE
 	/*
-	 * Check for VHE being present. For the rest of the EL2 setup,
-	 * x2 being non-zero indicates that we do have VHE, and that the

arch/arm64/kernel/head.S SYM_FUNC_START(el2_setup) · line 511

Quoted 9 lines

arch/arm64/kernel/head.S +3 -3

+	 * Check for VHE being present. x2 being non-zero indicates that we
+	 * do have VHE, and that the kernel is intended to run at EL2.
 	 */
 	mrs	x2, id_aa64mmfr1_el1
 	ubfx	x2, x2, #ID_AA64MMFR1_VHE_SHIFT, #4
-#else
-	mov	x2, xzr
-#endif
+	cbz	x2, el2_setup_nvhe

What initialises x2 to zero when CONFIG_VHE is disabled?

Add handler of host SMCs in KVM nVHE trap handler. Forward all SMCs to EL3 and propagate the result back to EL1. This is done in preparation for validating host SMCs in KVM nVHE protected mode.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/hyp/nvhe/hyp-main.c | 35 ++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

arch/arm64/kvm/hyp/nvhe/hyp-main.c +4 -0

index 19332c20fcde..8661bc7deaa9 100644
@@ -106,6 +106,38 @@ static void handle_host_hcall(struct
 kvm_cpu_context *host_ctxt)
 	host_ctxt->regs.regs[1] = ret;
 }
 
+static void skip_host_instruction(void)
+{
+	write_sysreg_el2(read_sysreg_el2(SYS_ELR) + 4, SYS_ELR);
+}

arch/arm64/kvm/hyp/nvhe/hyp-main.c +6 -0

+	host_ctxt->regs.regs[0] = res.a0;
+	host_ctxt->regs.regs[1] = res.a1;
+	host_ctxt->regs.regs[2] = res.a2;
+	host_ctxt->regs.regs[3] = res.a3;
+}
+

arch/arm64/kvm/hyp/nvhe/hyp-main.c +2 -0

+}
+
 void handle_trap(struct kvm_cpu_context *host_ctxt)
 {

arch/arm64/kvm/hyp/nvhe/hyp-main.c +0 -0

 	u64 esr = read_sysreg_el2(SYS_ESR);

When nVHE hyp starts interception host's PSCI CPU_ON SMCs, it will need to install KVM on the newly booted CPU before returning to the host. Add an entry point which expects the same kvm_nvhe_init_params struct as the __kvm_hyp_init HVC in the CPU_ON context argument (x0).

The entry point initializes EL2 state with the same init_el2_state macro used by the kernel's entry point. It then initializes KVM using the same helper function used in the __kvm_hyp_init HVC.

When done, the entry point branches to a function provided in the init params.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/kvm_asm.h   |  1 +
 arch/arm64/kernel/asm-offsets.c    |  1 +
 arch/arm64/kvm/hyp/nvhe/hyp-init.S | 30 ++++++++++++++++++++++++++++++
 3 files changed, 32 insertions(+)

arch/arm64/include/asm/kvm_asm.h +1 -0

index 893327d1e449..efb4872bb29f 100644
@@ -155,6 +155,7 @@ struct kvm_nvhe_init_params {
 	unsigned long tpidr_el2;
 	unsigned long hyp_stack_ptr;
 	unsigned long vector_ptr;
+	unsigned long psci_cpu_entry_fn;
 };
 
 /* Translate a kernel address @ptr into its equivalent linear mapping 

*/

arch/arm64/kernel/asm-offsets.c +1 -0

index 0cbb86135c7c..ffc84e68ad97 100644
@@ -114,6 +114,7 @@ int main(void)
   DEFINE(NVHE_INIT_TPIDR_EL2,	offsetof(struct kvm_nvhe_init_params,
 tpidr_el2));
   DEFINE(NVHE_INIT_STACK_PTR,	offsetof(struct kvm_nvhe_init_params,
 hyp_stack_ptr));
   DEFINE(NVHE_INIT_VECTOR_PTR,	offsetof(struct kvm_nvhe_init_params,
 vector_ptr));
+  DEFINE(NVHE_INIT_PSCI_CPU_ENTRY_FN,	offsetof(struct

kvm_nvhe_init_params, psci_cpu_entry_fn));
#endif

 #ifdef CONFIG_CPU_PM
   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));

arch/arm64/kvm/hyp/nvhe/hyp-init.S +0 -0

index 1697d25756e9..f999a35b2c8c 100644

arch/arm64/kvm/hyp/nvhe/hyp-init.S +6 -0

 #include <asm/alternative.h>
 #include <asm/assembler.h>

@@ -159,6 +160,35 @@ alternative_else_nop_endif
 	ret
 SYM_CODE_END(___kvm_hyp_init)
 
+SYM_CODE_START(__kvm_hyp_cpu_entry)
+	msr	SPsel, #1			// We want to use SP_EL{1,2}
+
+	/*
+	 * Check that the core was booted in EL2. Loop indefinitely if not
+	 * because it cannot be safely given to the host without installing 

KVM.

arch/arm64/kvm/hyp/nvhe/hyp-init.S +8 -0

+
+	/* Initialize EL2 CPU state to sane values. */
+	mov	x29, x0
+	init_el2_state nvhe
+	mov	x0, x29
+
+	/*
+	 * Load hyp VA of C entry function. Must do so before switching on 

the

arch/arm64/kvm/hyp/nvhe/hyp-init.S +1 -0

+	 * MMU because the struct pointer is PA and not identity-mapped in 

hyp.

Quoted 9 lines

 #ifdef CONFIG_CPU_PM
   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));

arch/arm64/kvm/hyp/nvhe/hyp-init.S +0 -0

index 1697d25756e9..f999a35b2c8c 100644
@@ -6,6 +6,7 @@
 

arch/arm64/kvm/hyp/nvhe/hyp-init.S line 9

Quoted 3 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +1 -0

 #include <linux/arm-smccc.h>
 #include <linux/linkage.h>
+#include <linux/irqchip/arm-gic-v3.h>

This should probably be included from the file that provides init_el2_state.

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +0 -0

 #include <asm/alternative.h>
 #include <asm/assembler.h>

@@ -159,6 +160,35 @@ alternative_else_nop_endif
 	ret
 SYM_CODE_END(___kvm_hyp_init)
 

arch/arm64/kvm/hyp/nvhe/hyp-init.S alternative_else_nop_endif · line 172

Quoted 11 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +6 -0

+SYM_CODE_START(__kvm_hyp_cpu_entry)
+	msr	SPsel, #1			// We want to use SP_EL{1,2}
+
+	/*
+	 * Check that the core was booted in EL2. Loop indefinitely if not
+	 * because it cannot be safely given to the host without installing

KVM.

arch/arm64/kvm/hyp/nvhe/hyp-init.S +4 -0

+	 */
+	mrs	x1, CurrentEL
+	cmp	x1, #CurrentEL_EL2
+	b.ne	.

This is a bit brutal. Consider using a WFE/WFI loop as we have in other places already (see __secondary_too_slow for example).

Quoted 10 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +9 -0

+
+	/* Initialize EL2 CPU state to sane values. */
+	mov	x29, x0
+	init_el2_state nvhe
+	mov	x0, x29
+
+	/*
+	 * Load hyp VA of C entry function. Must do so before switching on the
+	 * MMU because the struct pointer is PA and not identity-mapped in

hyp.

arch/arm64/kvm/hyp/nvhe/hyp-init.S alternative_else_nop_endif · line 189

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +8 -0

+	 */
+	ldr	x29, [x0, #NVHE_INIT_PSCI_CPU_ENTRY_FN]
+
+	/* Enable MMU, set vectors and stack. */
+	bl	___kvm_hyp_init
+
+	/* Leave idmap. */
+	br	x29

To a point I made against an earlier patch: psci_cpu_entry_fn seems to be a HYP
VA, and really needs to be documented as such, because this is pretty hard to
follow otherwise.

arch/arm64/kvm/hyp/nvhe/hyp-init.S alternative_else_nop_endif · line 194

Quoted 5 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +2 -0

+SYM_CODE_END(__kvm_hyp_cpu_entry)
+
 SYM_CODE_START(__kvm_handle_stub_hvc)
 	cmp	x0, #HVC_SOFT_RESTART
 	b.ne	1f

Thanks,

        M.

Signature · 1 line

Jazz is not dead. It just smells funny...

Quoted 9 lines

Quoted 9 lines

 #ifdef CONFIG_CPU_PM
   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));

arch/arm64/kvm/hyp/nvhe/hyp-init.S +0 -0

index 1697d25756e9..f999a35b2c8c 100644
@@ -6,6 +6,7 @@
 

Quoted 5 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S line 9

Quoted 3 lines

arch/arm64/kvm/hyp/nvhe/hyp-init.S +1 -0

 #include <linux/arm-smccc.h>
 #include <linux/linkage.h>
+#include <linux/irqchip/arm-gic-v3.h>

This should probably be included from the file that provides init_el2_state.

Agreed. This is a workaround for the fact that the arm-gic* headers don't play nice with each other (define the same constants).

Including arm-gic-v3.h in
kvm_asm.h will trigger macro redefine warnings in vgic*-v2.c because they include arm-gic.h.

Another option is to create a header just for el2 init. Would that be preferable? Other ideas?

Add a handler of PSCI SMCs in nVHE hyp code. The handler is initialized with the version used by the host's PSCI driver and the function IDs it was configured with. If the SMC function ID matches one of the configured PSCI calls (for v0.1) or falls into the PSCI function ID range (for v0.2+), the SMC is handled by the PSCI handler. For now, all SMCs return PSCI_RET_NOT_SUPPORTED.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/include/asm/kvm_hyp.h   |   4 ++
 arch/arm64/kvm/arm.c               |  13 ++++
 arch/arm64/kvm/hyp/nvhe/Makefile   |   2 +-
 arch/arm64/kvm/hyp/nvhe/hyp-main.c |   4 ++
 arch/arm64/kvm/hyp/nvhe/psci.c     | 102 +++++++++++++++++++++++++++++
 include/uapi/linux/psci.h          |   1 +
 6 files changed, 125 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/kvm/hyp/nvhe/psci.c

arch/arm64/include/asm/kvm_hyp.h +4 -0

index a3289071f3d8..95a2bbbcc7e1 100644
@@ -96,6 +96,10 @@ void deactivate_traps_vhe_put(void);
 
 u64 __guest_enter(struct kvm_vcpu *vcpu);
 
+#ifdef __KVM_NVHE_HYPERVISOR__
+bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt);
+#endif
+
 void __noreturn hyp_panic(void);
 #ifdef __KVM_NVHE_HYPERVISOR__
 void __noreturn __hyp_do_panic(bool restore_host, u64 spsr, u64 elr, 

u64 par);

arch/arm64/kvm/arm.c +1 -0

index 1a57b6025937..28e3bc056225 100644
@@ -19,6 +19,7 @@
 #include <linux/kvm_irqfd.h>
 #include <linux/irqbypass.h>
 #include <linux/sched/stat.h>
+#include <linux/psci.h>
 #include <trace/events/kvm.h>
 
 #define CREATE_TRACE_POINTS

arch/arm64/kvm/hyp/nvhe/psci.c new file +30 -0

@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - Google LLC
+ * Author: David Brazdil <[email protected]>
+ */
+
+#include <asm/kvm_asm.h>
+#include <asm/kvm_hyp.h>
+#include <asm/kvm_mmu.h>
+#include <kvm/arm_hypercalls.h>
+#include <linux/arm-smccc.h>
+#include <linux/psci.h>
+#include <kvm/arm_psci.h>
+#include <uapi/linux/psci.h>
+
+/* Config options set by the host. */
+u32 kvm_host_psci_version = PSCI_VERSION(0, 0);
+u32 kvm_host_psci_function_id[PSCI_FN_MAX];
+
+static u64 get_psci_func_id(struct kvm_cpu_context *host_ctxt)
+{
+	return host_ctxt->regs.regs[0];
+}
+
+static bool is_psci_0_1_call(u64 func_id)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(kvm_host_psci_function_id); ++i) {
+		if (func_id == kvm_host_psci_function_id[i])

arch/arm64/kvm/hyp/nvhe/psci.c new file +3 -0

+}
+
+static unsigned long psci_0_1_handler(u64 func_id, struct

kvm_cpu_context *host_ctxt)

arch/arm64/kvm/hyp/nvhe/psci.c new file +5 -0

+{
+	return PSCI_RET_NOT_SUPPORTED;
+}
+
+static unsigned long psci_0_2_handler(u64 func_id, struct

kvm_cpu_context *host_ctxt)

arch/arm64/kvm/hyp/nvhe/psci.c new file +8 -0

+{
+	switch (func_id) {
+	default:
+		return PSCI_RET_NOT_SUPPORTED;
+	}
+}
+
+static unsigned long psci_1_0_handler(u64 func_id, struct

kvm_cpu_context *host_ctxt)

arch/arm64/kvm/hyp/nvhe/psci.c new file +1 -0

+{

arch/arm64/kvm/hyp/nvhe/psci.c new file +8 -0

+}
+
+bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt)
+{
+	u64 func_id = get_psci_func_id(host_ctxt);
+	unsigned long ret;
+
+	if (!is_psci_call(func_id))

arch/arm64/kvm/hyp/nvhe/psci.c new file +7 -0

+
+	host_ctxt->regs.regs[0] = ret;
+	host_ctxt->regs.regs[1] = 0;
+	host_ctxt->regs.regs[2] = 0;
+	host_ctxt->regs.regs[3] = 0;
+	return true;
+}

include/uapi/linux/psci.h +0 -0

index 2fcad1dd0b0e..0d52b8dbe8c2 100644

Add a host-initialized constant to KVM nVHE hyp code for converting between EL2 linear map virtual addresses and physical addresses. Also add __hyp_pa macro that performs the conversion.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/arm.c           | 15 +++++++++++++++
 arch/arm64/kvm/hyp/nvhe/psci.c |  3 +++
 2 files changed, 18 insertions(+)

arch/arm64/kvm/arm.c +0 -0

index 28e3bc056225..dc7d43d7785a 100644

arch/arm64/kvm/arm.c +2 -0

+
 static void init_cpu_logical_map(void)
 {
 	extern u64 kvm_nvhe_sym(__cpu_logical_map)[NR_CPUS];

@@ -1688,6 +1702,7 @@ static int init_hyp_mode(void)
 		}
 	}
 
+	init_hyp_physvirt_offset();
 	init_cpu_logical_map();
 	init_psci();
 

arch/arm64/kvm/hyp/nvhe/psci.c +0 -0

index 82d3b2c89658..b0b5df590ba5 100644

Add helper macro for computing the PA of a kernel symbol in nVHE hyp code. This will be useful for computing the PA of a PSCI CPU_ON entry point.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/hyp/nvhe/psci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

arch/arm64/kvm/hyp/nvhe/psci.c +0 -0

index b0b5df590ba5..7510b9e174e9 100644
@@ -20,6 +20,16 @@ s64 hyp_physvirt_offset;
 
 #define __hyp_pa(x) ((phys_addr_t)((x)) + hyp_physvirt_offset)
 

Hey David,

Quoted 17 lines · David Brazdil

Add helper macro for computing the PA of a kernel symbol in nVHE hyp code. This will be useful for computing the PA of a PSCI CPU_ON entry point.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/hyp/nvhe/psci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

arch/arm64/kvm/hyp/nvhe/psci.c +0 -0

index b0b5df590ba5..7510b9e174e9 100644
@@ -20,6 +20,16 @@ s64 hyp_physvirt_offset;
 
 #define __hyp_pa(x) ((phys_addr_t)((x)) + hyp_physvirt_offset)
 

arch/arm64/kvm/hyp/nvhe/psci.c s64 hyp_physvirt_offset; · line 32

Quoted 10 lines

arch/arm64/kvm/hyp/nvhe/psci.c +10 -0

+#define __hyp_pa_symbol(sym)					\
+	({							\
+		extern char sym[];				\
+		unsigned long kern_va;				\
+								\
+		asm volatile("ldr %0, =%1" : "=r" (kern_va)	\
+					   : "S" (sym));	\
+		kern_va - kimage_voffset;			\
+	})
+

Could this be simplified to __hyp_pa(hyp_symbol_addr(sym))? That would avoid the dependency on kimage_voffset.

Quoted 21 lines · Quentin Perret

Hey David,

Quoted 18 lines · David Brazdil

Add helper macro for computing the PA of a kernel symbol in nVHE hyp code. This will be useful for computing the PA of a PSCI CPU_ON entry point.

Signed-off-by David Brazdil <[email protected]>

---
 arch/arm64/kvm/hyp/nvhe/psci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

arch/arm64/kvm/hyp/nvhe/psci.c +0 -0

index b0b5df590ba5..7510b9e174e9 100644
@@ -20,6 +20,16 @@ s64 hyp_physvirt_offset;
 
 #define __hyp_pa(x) ((phys_addr_t)((x)) + hyp_physvirt_offset)
 

Quoted 5 lines

Quoted 5 lines

arch/arm64/kvm/hyp/nvhe/psci.c +5 -0

+#define __hyp_pa_symbol(sym)					\
+	({							\
+		extern char sym[];				\
+		unsigned long kern_va;				\
+								\

Quoted 8 lines

arch/arm64/kvm/hyp/nvhe/psci.c s64 hyp_physvirt_offset; · line 32

Quoted 5 lines

arch/arm64/kvm/hyp/nvhe/psci.c +5 -0

+		asm volatile("ldr %0, =%1" : "=r" (kern_va)	\
+					   : "S" (sym));	\
+		kern_va - kimage_voffset;			\
+	})
+

Could this be simplified to __hyp_pa(hyp_symbol_addr(sym))? That would avoid the dependency on kimage_voffset.

I'm going to move away from evaluating kimage_voffset at runtime anyway, see [1].

Thanks,

        M.

[1] https://lore.kernel.org/r/[email protected]

Signature · 1 line

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