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sunxi: video: native vga support

PATCH New Hans de Goede 2 participants 9 messages Dec 27, 2014 – Dec 29, 2014

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#0 lore raw

cover sunxi: video: native vga support

Hi Ian,

Here is my last sunxi-video patch series, this time adding support for the native vga out found on the A10 / A20 SoCs, and used e.g. on the Cubietruck.

With this patch series by default (can be overridden through video-mode env.) the display will fallback to 1024x768 over VGA when no HDMI cable is plugged in on boards with a VGA connector. This way people using VGA can at least see something, which makes it a lot easier to set the env. when not using a serial console.

Regards,

Hans

#1 lore raw

PATCH 1/4 sunxi: video: Fix tcon0 hsync / vsync setting

It turns out that the problems I was seeing were due to a bad powersupply, so enable proper negative hsync / vsync support.

Also adjust various defconfigs to keep the hsync and vsync for the lcd panels positive, changing sync:0 into sync:3.

---
 arch/arm/include/asm/arch-sunxi/display.h  |  2 ++
 configs/A10s-OLinuXino-M-lcd7_defconfig    |  2 +-
 configs/A13-OLinuXinoM_defconfig           |  2 +-
 configs/A13-OLinuXino_defconfig            |  2 +-
 configs/A20-OLinuXino_MICRO-lcd7_defconfig |  2 +-
 configs/Ippo_q8h_v1_2_defconfig            |  2 +-
 configs/Ippo_q8h_v5_defconfig              |  2 +-
 drivers/video/sunxi_display.c              | 15 ++++++++-------
 8 files changed, 16 insertions(+), 13 deletions(-)
arch/arm/include/asm/arch-sunxi/display.h +2 -0
index dcb2fe4..908c5d9 100644
@@ -174,6 +174,8 @@ struct sunxi_hdmi_reg {
  */
 #define SUNXI_LCDC_X(x)				(((x) - 1) << 16)
 #define SUNXI_LCDC_Y(y)				(((y) - 1) << 0)
+#define SUNXI_LCDC_TCON_VSYNC_MASK		(1 << 24)
+#define SUNXI_LCDC_TCON_HSYNC_MASK		(1 << 25)
 #define SUNXI_LCDC_CTRL_IO_MAP_MASK		(1 << 0)
 #define SUNXI_LCDC_CTRL_IO_MAP_TCON0		(0 << 0)
 #define SUNXI_LCDC_CTRL_IO_MAP_TCON1		(1 << 0)
configs/A10s-OLinuXino-M-lcd7_defconfig +1 -1
index eafa974..cbaa04d 100644
@@ -3,7 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI"
 CONFIG_FDTFILE="sun5i-a10s-olinuxino-micro.dtb"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=1
 CONFIG_USB1_VBUS_PIN="PB10"
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="PB9"
 CONFIG_VIDEO_LCD_BL_PWM="PB2"
 +S:CONFIG_MMC0_CD_PIN="PG1"
configs/A13-OLinuXinoM_defconfig +1 -1
index 7790460..1a99418 100644
@@ -6,7 +6,7 @@ CONFIG_VIDEO_HDMI=n
 CONFIG_VIDEO_VGA_VIA_LCD=y
 # For use with the Olimex 7" LCD module, adjust timings for other displays
 # Set video-mode=sunxi:800x600-24 at 60,monitor=lcd in the env. to enable
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="PB10"
 CONFIG_VIDEO_LCD_BL_PWM="PB2"
 +S:CONFIG_ARM=y
configs/A13-OLinuXino_defconfig +1 -1
index 944f2e5..7df6951 100644
@@ -6,7 +6,7 @@ CONFIG_VIDEO_HDMI=n
 CONFIG_VIDEO_VGA_VIA_LCD=y
 # For use with the Olimex 7" LCD module, adjust timings for other displays
 # Set video-mode=sunxi:800x600-24@60,monitor=lcd in the env. to enable
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="AXP0-0"
 CONFIG_VIDEO_LCD_BL_PWM="PB2"
 +S:CONFIG_ARM=y
configs/A20-OLinuXino_MICRO-lcd7_defconfig +1 -1
index 05674d7..71afbff 100644
@@ -2,7 +2,7 @@ CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI"
 CONFIG_FDTFILE="sun7i-a20-olinuxino-micro.dtb"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=3
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="PH8"
 CONFIG_VIDEO_LCD_BL_PWM="PB2"
 +S:CONFIG_MMC0_CD_PIN="PH1"
configs/Ippo_q8h_v1_2_defconfig +1 -1
index b1d07c5..0447b06 100644
@@ -1,7 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
 CONFIG_FDTFILE="sun8i-a23-ippo-q8h-v1.2.dtb"
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:167,up:31,lo:13,hs:1,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:167,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="PH7"
 CONFIG_VIDEO_LCD_BL_EN="PH6"
 CONFIG_VIDEO_LCD_BL_PWM="PH0"
configs/Ippo_q8h_v5_defconfig +1 -1
index f3dadca..4e82bf9 100644
@@ -1,7 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
 CONFIG_FDTFILE="sun8i-a23-ippo-q8h-v5.dtb"
-CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:0,vmode:0"
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"
 CONFIG_VIDEO_LCD_POWER="PH7"
 CONFIG_VIDEO_LCD_BL_EN="PH6"
 CONFIG_VIDEO_LCD_BL_PWM="PH0"
drivers/video/sunxi_display.c +8 -7
index a20ff57..669c46c 100644
@@ -506,7 +506,7 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode)
 {
 	struct sunxi_lcdc_reg * const lcdc =
 		(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
-	int bp, clk_delay, clk_div, clk_double, pin, total;
+	int bp, clk_delay, clk_div, clk_double, pin, total, val;
 
 	for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++)
 		sunxi_gpio_set_cfgpin(pin, SUNXI_GPD0_LCD0);
@@ -561,12 +561,13 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode)
 		       &lcdc->frame_ctrl[0]);
 	}
 
-	/*
-	 * Bit 24 and 25 of tcon0_io_polarity can be used to invert hsync /
-	 * vsync polarity, but this leads to noise problems, so we always
-	 * keep the polarity positive.
-	 */
-	writel(0, &lcdc->tcon0_io_polarity);
+	val = 0;
+	if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
+		val |= SUNXI_LCDC_TCON_HSYNC_MASK;
+	if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
+		val |= SUNXI_LCDC_TCON_VSYNC_MASK;
+	writel(val, &lcdc->tcon0_io_polarity);
+
 	writel(0, &lcdc->tcon0_io_tristate);
 }
 
Signature · 1 line
2.1.0
#2 lore raw

PATCH 1/4 sunxi: video: Fix tcon0 hsync / vsync setting

Quoted 7 lines · Hans de Goede

It turns out that the problems I was seeing were due to a bad powersupply, so enable proper negative hsync / vsync support.

Also adjust various defconfigs to keep the hsync and vsync for the lcd panels positive, changing sync:0 into sync:3.

#3 lore raw

PATCH 2/4 sunxi: video: Add support for using PORTD hsync/vsync pins with tcon1

In reply to Hans de Goede

Add support for using PORTD hsync/vsync pins with tcon1, this is a preparation patch for adding native VGA support.

---
 drivers/video/sunxi_display.c | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)
drivers/video/sunxi_display.c +19 -3
index 669c46c..0dd5aa1 100644
@@ -574,11 +574,12 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode)
 #ifdef CONFIG_VIDEO_HDMI
 
 static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
-				      int *clk_div, int *clk_double)
+				      int *clk_div, int *clk_double,
+				      bool use_portd_hvsync)
 {
 	struct sunxi_lcdc_reg * const lcdc =
 		(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
-	int bp, clk_delay, total;
+	int bp, clk_delay, total, val;
 
 	/* Use tcon1 */
 	clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
@@ -608,6 +609,21 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
 	writel(SUNXI_LCDC_X(mode->hsync_len) | SUNXI_LCDC_Y(mode->vsync_len),
 	       &lcdc->tcon1_timing_sync);
 
+	if (use_portd_hvsync) {
+		sunxi_gpio_set_cfgpin(SUNXI_GPD(26), SUNXI_GPD0_LCD0);
+		sunxi_gpio_set_cfgpin(SUNXI_GPD(27), SUNXI_GPD0_LCD0);
+
+		val = 0;
+		if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+			val |= SUNXI_LCDC_TCON_HSYNC_MASK;
+		if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+			val |= SUNXI_LCDC_TCON_VSYNC_MASK;
+		writel(val, &lcdc->tcon1_io_polarity);
+
+		clrbits_le32(&lcdc->tcon1_io_tristate,
+			     SUNXI_LCDC_TCON_VSYNC_MASK |
+			     SUNXI_LCDC_TCON_HSYNC_MASK);
+	}
 	sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
 }
 
@@ -751,7 +767,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
 #ifdef CONFIG_VIDEO_HDMI
 		int clk_div, clk_double;
 		sunxi_composer_mode_set(mode, address);
-		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double);
+		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
 		sunxi_hdmi_mode_set(mode, clk_div, clk_double);
 		sunxi_composer_enable();
 		sunxi_lcdc_enable();
Signature · 1 line
2.1.0
#5 lore raw

PATCH 3/4 sunxi: video: Fallback from HDMI to VGA on boards with VGA

In reply to Hans de Goede

If a board has no LCD, but does have VGA fallback to VGA when no HDMI cable is connected (unless hpd=0).

---
 doc/README.video              |  3 +--
 drivers/video/sunxi_display.c | 47 ++++++++++++++++++++++++-------------------
 2 files changed, 27 insertions(+), 23 deletions(-)
doc/README.video +1 -2
index cfe6318..2c55d6a 100644
@@ -50,8 +50,7 @@ The sunxi u-boot driver supports the following video-mode options:
 
 - hpd=[0|1] - Enable use of the hdmi HotPlug Detect feature
  0: Disabled. Configure dvi/hdmi output even if no cable is detected
- 1: Enabled. If a LCD has been configured fallback to the LCD when no cable is
-    detected, if no LCD is configured, disable video ouput.
+ 1: Enabled.  Fallback to the lcd / vga / none in that order (if available)
  Defaults to hpd=1.
 
 - edid=[0|1] - Enable use of DDC + EDID to get monitor info
drivers/video/sunxi_display.c +26 -21

59 lines not on this page · raw message

Signature · 1 line
2.1.0
#6 lore raw

PATCH 4/4 sunxi: video: Add VGA output support

In reply to Hans de Goede

Add support for VGA directly from the sunxi SoC / display engine.

---
 arch/arm/include/asm/arch-sunxi/clock_sun4i.h |  2 +
 arch/arm/include/asm/arch-sunxi/display.h     | 76 +++++++++++++++++++++++++++
 board/sunxi/Kconfig                           |  9 +++-
 configs/A20-OLinuXino_MICRO_defconfig         |  1 +
 configs/Cubietruck_defconfig                  |  1 +
 configs/Mele_A1000G_defconfig                 |  1 +
 configs/Mele_A1000_defconfig                  |  1 +
 configs/Mele_M3_defconfig                     |  1 +
 drivers/video/sunxi_display.c                 | 60 ++++++++++++++++++---
 9 files changed, 143 insertions(+), 9 deletions(-)
arch/arm/include/asm/arch-sunxi/clock_sun4i.h +2 -0
index dbc5e58..64b5c38 100644
@@ -190,6 +190,8 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_HDMI		11
 #define AHB_GATE_OFFSET_LCD1		5
 #define AHB_GATE_OFFSET_LCD0		4
+#define AHB_GATE_OFFSET_TVE1		3
+#define AHB_GATE_OFFSET_TVE0		2
 
 #define CCM_AHB_GATE_GPS (0x1 << 26)
 #define CCM_AHB_GATE_SDRAM (0x1 << 14)
arch/arm/include/asm/arch-sunxi/display.h +76 -0

88 lines not on this page · raw message

board/sunxi/Kconfig +8 -1
index c7643cb..0cbfb26 100644
@@ -291,9 +291,16 @@ config VIDEO_HDMI
 	---help---
 	Say Y here to add support for outputting video over HDMI.
 
+config VIDEO_VGA
+	boolean "VGA output support"
+	depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
+	default n
+	---help---
+	Say Y here to add support for outputting video over VGA.
+
 config VIDEO_VGA_VIA_LCD
 	boolean "VGA via LCD controller support"
-	depends on VIDEO
+	depends on VIDEO && MACH_SUN5I
 	default n
 	---help---
 	Say Y here to add support for external DACs connected to the parallel
configs/A20-OLinuXino_MICRO_defconfig +1 -0
index 1b9668d..1c5a6f7 100644
@@ -2,6 +2,7 @@ CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI"
 CONFIG_FDTFILE="sun7i-a20-olinuxino-micro.dtb"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=3
+CONFIG_VIDEO_VGA=y
 +S:CONFIG_MMC0_CD_PIN="PH1"
 +S:CONFIG_MMC3_CD_PIN="PH11"
 +S:CONFIG_ARM=y
configs/Cubietruck_defconfig +1 -0
index b1f9f93..bc44410 100644
@@ -1,6 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI"
 CONFIG_FDTFILE="sun7i-a20-cubietruck.dtb"
+CONFIG_VIDEO_VGA=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_SUNXI=y
 +S:CONFIG_MACH_SUN7I=y
configs/Mele_A1000G_defconfig +1 -0
index 2f4bf72..9cb3285 100644
@@ -1,6 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI"
 CONFIG_FDTFILE="sun4i-a10-a1000.dtb"
+CONFIG_VIDEO_VGA=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_SUNXI=y
 +S:CONFIG_MACH_SUN4I=y
configs/Mele_A1000_defconfig +1 -0
index e2912b0..97d9454 100644
@@ -1,6 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI"
 CONFIG_FDTFILE="sun4i-a10-a1000.dtb"
+CONFIG_VIDEO_VGA=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_SUNXI=y
 +S:CONFIG_MACH_SUN4I=y
configs/Mele_M3_defconfig +1 -0
index fe9ba11..141d565 100644
@@ -1,6 +1,7 @@
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,USB_EHCI"
 CONFIG_FDTFILE="sun7i-a20-m3.dtb"
+CONFIG_VIDEO_VGA=y
 +S:CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 +S:CONFIG_MMC0_CD_PIN="PH1"
 +S:CONFIG_ARM=y
drivers/video/sunxi_display.c +52 -8

120 lines not on this page · raw message

Signature · 1 line
2.1.0
#7 lore raw

PATCH 4/4 sunxi: video: Add VGA output support

arch/arm/include/asm/arch-sunxi/display.h struct sunxi_hdmi_reg { · line 163

Quoted 11 lines · Hans de Goede
arch/arm/include/asm/arch-sunxi/display.h +3 -0
index 908c5d9..8c25ad4 100644
@@ -158,6 +158,52 @@ struct sunxi_hdmi_reg {
 };
 
 /*
+ * This is based on the A10s User Manual, and the A10s only supports
+ * composite video and not vga like the A10 / A20 does, still other
+ * then the removed vga out capability the tvencoder seems to be the same.

You mean "other than" I think.

Other than (sorry ;-)) that:

#8 lore raw

PATCH 4/4 sunxi: video: Add VGA output support

Hi,

Quoted 8 lines · Ian Campbell
Quoted 7 lines · Hans de Goede
arch/arm/include/asm/arch-sunxi/display.h +0 -0
index 908c5d9..8c25ad4 100644
@@ -158,6 +158,52 @@ struct sunxi_hdmi_reg {
  };
 
Quoted 6 lines

arch/arm/include/asm/arch-sunxi/display.h struct sunxi_hdmi_reg { · line 163

Quoted 4 lines
arch/arm/include/asm/arch-sunxi/display.h +3 -0
  /*
+ * This is based on the A10s User Manual, and the A10s only supports
+ * composite video and not vga like the A10 / A20 does, still other
+ * then the removed vga out capability the tvencoder seems to be the same.

You mean "other than" I think.

Fixed in my personal tree, and added your ack.

Thanks for all the reviews!

I'll go and poke Anatolij to get his ack for the videomodes.c changes, with that (+ a respin of a few remaining patches you had comments on) the entire display series can be queued up for merging in next.

Regards,

Hans