[PATCH v3 0/7]
Subsystems (5)
v3 cover [PATCH v3 0/7]
Hi everyone,
This set of patches add the support for the Armada 385 AP board.
It also adds a few clean ups here and there, a few missing pin functions needed for the board, etc.
Maxime
Changes from v2:
- Removed the i2c1 bus that is not used
- Added comments for the i2c0 and the UARTs
- Removed the i2c clk-frequency property
- Fixed the SPI-NOR maximum frequency
- Fixed the phy nodes unit addresses
- Add the /chosen/stdout-path property
- Changed the filename to match the board compatible
Changes from v1:
- Removed USB3 support. This required some additional patches for the phy and USB drivers that are not really related to this serie. This will be submitted as a separate one.
- Removed earlyprintk from the default bootargs
- Removed two unneeded ranges
- Changed the phy pins node name to mdio
- Moved most of the pinctrl nodes to the DTSI
- Added a comment to mention why the phy reference clock is needed.
- Rebased on top of 3.19-rc1
Maxime Ripard (7):
ARM: mvebu: Rename DEBUG_LL to indicate UART index
ARM: mvebu: Add UART1 as DEBUG_LL possible target
ARM: mvebu: a38x: Fix node names
pinctrl: mvebu: a38x: Add UART1 muxing options
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
arch/arm/Kconfig.debug | 35 +++++-- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-380.dtsi | 3 +- arch/arm/boot/dts/armada-385-db-ap.dts | 150 +++++++++++++++++++++++++++++ arch/arm/boot/dts/armada-385-db.dts | 2 +- arch/arm/boot/dts/armada-385-rd.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 3 +- arch/arm/boot/dts/armada-38x.dtsi | 44 ++++++++- drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 +- 9 files changed, 226 insertions(+), 20 deletions(-) create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
Signature · 1 line
2.2.1
PATCH v3 1/7 ARM: mvebu: Rename DEBUG_LL to indicate UART index
The mvebu SoCs actually have more UARTs than just the one exposed in DEBUG_LL yet.
In order to differentiate them, Add the index in the configuration options and their help.
--- arch/arm/Kconfig.debug | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
arch/arm/Kconfig.debug +9 -9
@@ -455,13 +455,13 @@ choice Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration options based on your needs. - config DEBUG_MVEBU_UART - bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)" + config DEBUG_MVEBU_UART0 + bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)" depends on ARCH_MVEBU select DEBUG_UART_8250 help Say Y here if you want kernel low-level debugging support - on MVEBU based platforms. + on MVEBU based platforms on UART0. This option should be used with the old bootloaders that left the internal registers mapped at
@@ -474,13 +474,13 @@ choice when u-boot hands over to the kernel, the system silently crashes, with no serial output at all. - config DEBUG_MVEBU_UART_ALTERNATE - bool "Kernel low-level debugging messages via MVEBU UART (new bootloaders)" + config DEBUG_MVEBU_UART0_ALTERNATE + bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)" depends on ARCH_MVEBU select DEBUG_UART_8250 help Say Y here if you want kernel low-level debugging support - on MVEBU based platforms. + on MVEBU based platforms on UART0. This option should be used with the new bootloaders that remap the internal registers at 0xf1000000.
@@ -1282,7 +1282,7 @@ config DEBUG_UART_PHYS default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX - default 0xd0012000 if DEBUG_MVEBU_UART + default 0xd0012000 if DEBUG_MVEBU_UART0 default 0xc81004c0 if DEBUG_MESON_UARTAO default 0xd4017000 if DEBUG_MMP_UART2 default 0xd4018000 if DEBUG_MMP_UART3
@@ -1296,7 +1296,7 @@ config DEBUG_UART_PHYS default 0xe8008000 if DEBUG_R7S72100_SCIF2 default 0xf0000be0 if ARCH_EBSA110 default 0xf040ab00 if DEBUG_BRCMSTB_UART - default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE + default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ ARCH_ORION5X default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1377,7 +1377,7 @@ config DEBUG_UART_VIRT default 0xfeb30c00 if DEBUG_KEYSTONE_UART0 default 0xfeb31000 if DEBUG_KEYSTONE_UART1 default 0xfec02000 if DEBUG_SOCFPGA_UART - default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE + default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
Signature · 1 line
2.2.1
PATCH v3 2/7 ARM: mvebu: Add UART1 as DEBUG_LL possible target
In reply to Maxime RipardSome mvebu boards have the UART1 more easily accessible than the other UARTs found on the system.
Add a debug_ll option for this case.
--- arch/arm/Kconfig.debug | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm/Kconfig.debug +17 -0
@@ -489,6 +489,21 @@ choice when u-boot hands over to the kernel, the system silently crashes, with no serial output at all. + config DEBUG_MVEBU_UART1_ALTERNATE + bool "Kernel low-level debugging messages via MVEBU UART1 (new bootloaders)" + depends on ARCH_MVEBU + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on MVEBU based platforms on UART1. + + This option should be used with the new bootloaders + that remap the internal registers at 0xf1000000. + + If the wrong DEBUG_MVEBU_UART* option is selected, + when u-boot hands over to the kernel, the system + silently crashes, with no serial output at all. + config DEBUG_VF_UART bool "Vybrid UART" depends on SOC_VF610
@@ -1297,6 +1312,7 @@ config DEBUG_UART_PHYS default 0xf0000be0 if ARCH_EBSA110 default 0xf040ab00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE + default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ ARCH_ORION5X default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1378,6 +1394,7 @@ config DEBUG_UART_VIRT default 0xfeb31000 if DEBUG_KEYSTONE_UART1 default 0xfec02000 if DEBUG_SOCFPGA_UART default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE + default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
Signature · 1 line
2.2.1
PATCH v3 3/7 ARM: mvebu: a38x: Fix node names
In reply to Maxime RipardSome nodes in the DTs have a reg property but no unit name in their node name.
This contradicts the way the ePAPR defines the node names. Fix this.
--- arch/arm/boot/dts/armada-380.dtsi | 2 +- arch/arm/boot/dts/armada-385-db.dts | 2 +- arch/arm/boot/dts/armada-385-rd.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/armada-380.dtsi +1 -1
@@ -32,7 +32,7 @@ soc { internal-regs { - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6810-pinctrl"; reg = <0x18000 0x20>; };
arch/arm/boot/dts/armada-385-db.dts +1 -1
@@ -74,7 +74,7 @@ phy-mode = "rgmii-id"; }; - mdio { + mdio at 72004 { phy0: ethernet-phy at 0 { reg = <0>; };
arch/arm/boot/dts/armada-385-rd.dts +1 -1
@@ -67,7 +67,7 @@ }; - mdio { + mdio at 72004 { phy0: ethernet-phy at 0 { reg = <0>; };
arch/arm/boot/dts/armada-385.dtsi +1 -1
@@ -37,7 +37,7 @@ soc { internal-regs { - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
arch/arm/boot/dts/armada-38x.dtsi +2 -2
@@ -193,7 +193,7 @@ status = "disabled"; }; - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
@@ -373,7 +373,7 @@ status = "disabled"; }; - mdio { + mdio at 72004 { #address-cells = <1>; #size-cells = <0>; compatible = "marvell,orion-mdio";
Signature · 1 line
2.2.1
PATCH v3 4/7 pinctrl: mvebu: a38x: Add UART1 muxing options
In reply to Maxime RipardThe MPP19 and MMP20 pins also have the ability to be muxed to the uart1 function.
Add this case to the pinctrl driver.
--- drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/pinctrl/mvebu/pinctrl-armada-38x.c +4 -2
@@ -145,14 +145,16 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = { MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS), MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS), MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS), - MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)), + MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS), + MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),MPP_MODE (20 ,MPP_VAR_FUNCTION (0 ,"gpio" ,NULL ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (1 ,"ge0" ,"txclk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (2 ,"ptp" ,"clk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (3 ,"pcie1" ,"rstout" ,V_88F6820_PLUS ),MPP_VAR_FUNCTION (4 ,"sata0" ,"prsnt" ,V_88F6810_PLUS ), -MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS )), +MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS ), +MPP_VAR_FUNCTION (6 ,"ua1" ,"txd" ,V_88F6810_PLUS )), MPP_MODE(21, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS), MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
Signature · 1 line
2.2.1
Andrew Lunn
maintainerPATCH v3 4/7 pinctrl: mvebu: a38x: Add UART1 muxing options
Quoted 37 lines · Maxime Ripard
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1 function.
Add this case to the pinctrl driver.
Signed-off-by Maxime Ripard <[email protected]>Acked-by Jason Cooper <[email protected]>--- drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)drivers/pinctrl/mvebu/pinctrl-armada-38x.c +4
-2@@ -145,14 +145,16 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = { MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS), MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS), MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS), - MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)), + MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS), + MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),MPP_MODE (20 ,MPP_VAR_FUNCTION (0 ,"gpio" ,NULL ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (1 ,"ge0" ,"txclk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (2 ,"ptp" ,"clk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (3 ,"pcie1" ,"rstout" ,V_88F6820_PLUS ),MPP_VAR_FUNCTION (4 ,"sata0" ,"prsnt" ,V_88F6810_PLUS ), -MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS )), +MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS ), +MPP_VAR_FUNCTION (6 ,"ua1" ,"txd" ,V_88F6810_PLUS )), MPP_MODE(21, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS), MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),Signature · 1 line
2.2.1
Hi Linus
I can take this though mvebu->arm-soc if you want? Or you can take it. Please let me know your preference.
Andrew
PATCH v3 5/7 ARM: mvebu: A38x: Remove redundant pinctrl informations
In reply to Maxime RipardThe compatible set in the armada-38x DTSI is always overridden, and the reg defined in there is duplicated in the armada-380 and armada-385 DTSIs.
Remove these useless items.
--- arch/arm/boot/dts/armada-380.dtsi | 1 - arch/arm/boot/dts/armada-385.dtsi | 1 - arch/arm/boot/dts/armada-38x.dtsi | 1 - 3 files changed, 3 deletions(-)
arch/arm/boot/dts/armada-380.dtsi +0 -1
@@ -34,7 +34,6 @@ internal-regs { pinctrl at 18000 { compatible = "marvell,mv88f6810-pinctrl"; - reg = <0x18000 0x20>; }; };
arch/arm/boot/dts/armada-385.dtsi +0 -1
@@ -39,7 +39,6 @@ internal-regs { pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; - reg = <0x18000 0x20>; }; };
arch/arm/boot/dts/armada-38x.dtsi +0 -1
@@ -194,7 +194,6 @@ }; pinctrl at 18000 { - compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
Signature · 1 line
2.2.1
PATCH v3 6/7 ARM: mvebu: Add a number of pinctrl functions
In reply to Maxime RipardSome pinctrl functions can be shared with all DTS out there, since they are generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid duplication.
--- arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +39 -0
@@ -195,6 +195,45 @@ pinctrl at 18000 { reg = <0x18000 0x20>; + + ge0_rgmii_pins: ge-rgmii-pins-0 { + marvell,pins = "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "ge0"; + }; + + i2c0_pins: i2c-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; + }; + + mdio_pins: mdio-pins { + marvell,pins = "mpp4", "mpp5"; + marvell,function = "ge"; + }; + + ref_clk0_pins: ref-clk-pins-0 { + marvell,pins = "mpp45"; + marvell,function = "ref"; + }; + + spi1_pins: spi-pins-1 { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59"; + marvell,function = "spi1"; + }; + + uart0_pins: uart-pins-0 { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "ua0"; + }; + + uart1_pins: uart-pins-1 { + marvell,pins = "mpp19", "mpp20"; + marvell,function = "ua1"; + }; }; gpio0: gpio at 18100 {
Signature · 1 line
2.2.1
PATCH v3 7/7 ARM: mvebu: Add Armada 385 Access Point Development Board support
In reply to Maxime RipardThe A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-db-ap.dts | 150 +++++++++++++++++++++++++++++++++ 2 files changed, 151 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -535,6 +535,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-385-db.dtb \ + armada-385-db-ap.dtb \ armada-385-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \
arch/arm/boot/dts/armada-385-db-ap.dts new file +150 -0
150 lines not on this page · raw message
Signature · 1 line
2.2.1
v3 cover [PATCH v3 0/7]
In reply to Maxime RipardHi Maxime, Andrew,
Quoted 6 lines · Maxime Ripard
Hi everyone,
This set of patches add the support for the Armada 385 AP board.
It also adds a few clean ups here and there, a few missing pin functions needed for the board, etc.
Maxime,
You forgot to write a topic for this email :)
Andrew,
If you want, in order to ease your job, I can send a series including the patches from Maxime and my patches for this 2 new Armada 38x boards: AP and GP.
But before this I really would like to have the answer from Nadav to switch to the dual license GPL/X11.
Thanks,
Gregory
Quoted 44 lines
Maxime
Changes from v2:
- Removed the i2c1 bus that is not used
- Added comments for the i2c0 and the UARTs
- Removed the i2c clk-frequency property
- Fixed the SPI-NOR maximum frequency
- Fixed the phy nodes unit addresses
- Add the /chosen/stdout-path property
- Changed the filename to match the board compatibleChanges from v1:
- Removed USB3 support. This required some additional patches for the phy and USB drivers that are not really related to this serie. This will be submitted as a separate one.
- Removed earlyprintk from the default bootargs
- Removed two unneeded ranges
- Changed the phy pins node name to mdio
- Moved most of the pinctrl nodes to the DTSI
- Added a comment to mention why the phy reference clock is needed.
- Rebased on top of 3.19-rc1Maxime Ripard (7):
ARM: mvebu: RenameDEBUG_LLto indicate UART index
ARM: mvebu: Add UART1 asDEBUG_LLpossible target
ARM: mvebu: a38x: Fix node names
pinctrl: mvebu: a38x: Add UART1 muxing options
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board supportarch/arm/Kconfig.debug | 35 +++++-- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-380.dtsi | 3 +- arch/arm/boot/dts/armada-385-db-ap.dts | 150 +++++++++++++++++++++++++++++ arch/arm/boot/dts/armada-385-db.dts | 2 +- arch/arm/boot/dts/armada-385-rd.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 3 +- arch/arm/boot/dts/armada-38x.dtsi | 44 ++++++++- drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 +- 9 files changed, 226 insertions(+), 20 deletions(-) create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com