Exynos: move i2c driver to dm api

This PMIC is not common for all Exynos5250
based boards, so should be romoved from
common config.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/exynos5250-common.h | 3 ---
 1 file changed, 3 deletions(-)

include/configs/exynos5250-common.h +0 -4

index 6714313..ae0e5ff 100644
@@ -28,9 +28,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR        CONFIG_IRAM_STACK
 
-/* PMIC */
-#define CONFIG_POWER_MAX77686
-
 /* Sound */
 #define CONFIG_CMD_SOUND
 #ifdef CONFIG_CMD_SOUND
--

1.9.1

This commit enable support for the above driver, which was disabled in common config.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/smdk5250.h | 2 ++
 1 file changed, 2 insertions(+)

This patch modify i2c nodes in exynos4.dtsi with:
- adding proper interrupts arrays for each i2c node, which allows to decode periph id
- add reg address for each i2c node for i2c driver internal use

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Lukasz Majewski <[email protected]>

---
 arch/arm/dts/exynos4.dtsi | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

Without this alias setting, the seq numbers
of the i2c devices are wrong.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 arch/arm/dts/exynos5250-arndale.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

Some versions of Exynos5 supports High-Speed I2C, on few interfaces, this change allows support this.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Akshay Saraswat <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 arch/arm/cpu/armv7/exynos/pinmux.c | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

This commit adjusts the s3c24x0 driver to new i2c api based on driver-model. The driver supports standard and high-speed i2c as previous.

Tested on Trats2 and Arndale (also with HS).

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Heiko Schocher <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  drivers/i2c/s3c24x0_i2c.c | 254 ++++++++++++++++++++++++++++++++++++++++------
  1 file changed, 222 insertions(+), 32 deletions(-)

drivers/i2c/s3c24x0_i2c.c +21 -4

index fd328f0..c21d479 100644
@@ -9,8 +9,9 @@
   * as they seem to have the same I2C controller inside.
   * The different address mapping is handled by the s3c24xx.h files below.
   */
-
  #include <common.h>
+#include <errno.h>
+#include <dm.h>
  #include <fdtdec.h>
  #if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
  #include <asm/arch/clk.h>

@@ -121,13 +122,23 @@
  #define CONFIG_MAX_I2C_NUM 1
  #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
  /*
   * For SPL boot some boards need i2c before SDRAM is initialised so force
   * variables to live in SRAM
   */
+#ifdef CONFIG_SYS_I2C
  static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
  			__attribute__((section(".data")));
+#endif
 
+enum exynos_i2c_type {
+	EXYNOS_I2C_STD,
+	EXYNOS_I2C_HS,
+};
+
+#ifdef CONFIG_SYS_I2C
  /**
   * Get a pointer to the given bus index
   *

@@ -147,6 +158,7 @@ static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
  	debug("Undefined bus: %d\n", bus_idx);
  	return NULL;
  }
+#endif
 
  #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
  static int GetI2CSDA(void)

@@ -251,6 +263,7 @@ static void ReadWriteByte(struct s3c24x0_i2c *i2c)
  	writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon);
  }
 
+#ifdef CONFIG_SYS_I2C
  static struct s3c24x0_i2c *get_base_i2c(int bus)
  {
  #ifdef CONFIG_EXYNOS4

@@ -267,6 +280,7 @@ static struct s3c24x0_i2c *get_base_i2c(int bus)
  	return s3c24x0_get_base_i2c();
  #endif
  }
+#endif
 
  static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
  {

@@ -398,18 +412,20 @@ static void exynos5_i2c_reset(struct s3c24x0_i2c_bus *i2c_bus)
  	hsi2c_ch_init(i2c_bus);
  }
 
+#ifdef CONFIG_SYS_I2C
  static void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
  {
  	struct s3c24x0_i2c *i2c;
  	struct s3c24x0_i2c_bus *bus;
-
  #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
  	struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
  #endif
  	ulong start_time = get_timer(0);
 
-	/* By default i2c channel 0 is the current bus */
  	i2c = get_base_i2c(adap->hwadapnr);
+	bus = &i2c_bus[adap->hwadapnr];
+	if (!bus)
+		return;
 
  	/*
  	 * In case the previous transfer is still going, wait to give it a

@@ -470,12 +486,13 @@ static void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
  #endif
  	}
  #endif /* #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) */
+
  	i2c_ch_init(i2c, speed, slaveadd);
 
-	bus = &i2c_bus[adap->hwadapnr];
  	bus->active = true;
  	bus->regs = i2c;
  }
+#endif /* CONFIG_SYS_I2C */
 
  /*
   * Poll the appropriate bit of the fifo status register until the interface is

drivers/i2c/s3c24x0_i2c.c +0 -0

  	conf = len | HSI2C_MASTER_RUN;
 
  	if (issue_stop)

@@ -698,14 +714,24 @@ static int hsi2c_read(struct exynos5_hsi2c *i2c,
  	return rv;
  }
 

drivers/i2c/s3c24x0_i2c.c +20 -14

+#ifdef CONFIG_SYS_I2C
  	i2c_bus = get_bus(adap->hwadapnr);
+#else
+	if (!dev)
+		return -ENODEV;
+
+	i2c_bus = dev_get_priv(dev);
+#endif
  	if (!i2c_bus)
-		return -1;
+		return -ENODEV;
 
  	i2c_bus->clock_frequency = speed;
 

@@ -715,23 +741,12 @@ static unsigned int s3c24x0_i2c_set_bus_speed(struct i2c_adapter *adap,
  		hsi2c_ch_init(i2c_bus);
  	} else {
  		i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
-			    CONFIG_SYS_I2C_S3C24X0_SLAVE);
+				    CONFIG_SYS_I2C_S3C24X0_SLAVE);
  	}
 
  	return 0;
  }
 
-#ifdef CONFIG_EXYNOS5
-static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
-{
-	/* This will override the speed selected in the fdt for that port */
-	debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
-	if (i2c_set_bus_speed(speed))
-		printf("i2c_init: failed to init bus %d for speed = %d\n",
-						adap->hwadapnr, speed);
-}
-#endif
-
  /*
   * cmd_type is 0 for write, 1 for read.
   *

@@ -844,15 +859,24 @@ bailout:
  	return result;
  }
 
+#ifdef CONFIG_SYS_I2C
  static int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
+#else
+static int s3c24x0_i2c_probe(struct udevice *dev, uint chip, uint chip_flags)
+#endif
  {
  	struct s3c24x0_i2c_bus *i2c_bus;
  	uchar buf[1];
  	int ret;
 
+#ifdef CONFIG_SYS_I2C
  	i2c_bus = get_bus(adap->hwadapnr);
+#else
+	i2c_bus = dev_get_priv(dev);
+#endif
  	if (!i2c_bus)
-		return -1;
+		return -ENODEV;
+
  	buf[0] = 0;
 
  	/*

@@ -871,6 +895,7 @@ static int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
  	return ret != I2C_OK;
  }
 
+#ifdef CONFIG_SYS_I2C
  static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
  			    int alen, uchar *buffer, int len)
  {

drivers/i2c/s3c24x0_i2c.c +1 -4

+
  	if (alen > 4) {
  		debug("I2C read: addr len %d not supported\n", alen);
  		return 1;

@@ -906,10 +935,6 @@ static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
  		chip |= ((addr >> (alen * 8)) &
  			 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  #endif
-	i2c_bus = get_bus(adap->hwadapnr);
-	if (!i2c_bus)
-		return -1;
-
  	if (i2c_bus->is_highspeed)
  		ret = hsi2c_read(i2c_bus->hsregs, chip, &xaddr[4 - alen],
  				 alen, buffer, len);

drivers/i2c/s3c24x0_i2c.c +13 -7

+
  	if (alen > 4) {
  		debug("I2C write: addr len %d not supported\n", alen);
  		return 1;

@@ -960,10 +989,6 @@ static int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
  		chip |= ((addr >> (alen * 8)) &
  			 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  #endif
-	i2c_bus = get_bus(adap->hwadapnr);
-	if (!i2c_bus)
-		return -1;
-
  	if (i2c_bus->is_highspeed)
  		ret = hsi2c_write(i2c_bus->hsregs, chip, &xaddr[4 - alen],
  				  alen, buffer, len, true);

@@ -1010,7 +1035,7 @@ static void process_nodes(const void *blob, int node_list[], int count,
  						CONFIG_SYS_I2C_S3C24X0_SPEED);
  		bus->node = node;
  		bus->bus_num = i;
-		exynos_pinmux_config(bus->id, 0);
+		exynos_pinmux_config(PERIPH_ID_I2C0 + bus->id, 0);
 
  		/* Mark position as used */
  		node_list[i] = -1;

@@ -1033,7 +1058,6 @@ void board_i2c_init(const void *blob)
  		COMPAT_SAMSUNG_EXYNOS5_I2C, node_list,
  		CONFIG_MAX_I2C_NUM);
  	process_nodes(blob, node_list, count, 1);
-
  }
 
  int i2c_get_bus_num_fdt(int node)

@@ -1077,7 +1101,17 @@ int i2c_reset_port_fdt(const void *blob, int node)
 
  	return 0;
  }
-#endif
+#endif /* CONFIG_OF_CONTROL */
+
+#ifdef CONFIG_EXYNOS5
+static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
+{
+	/* This will override the speed selected in the fdt for that port */
+	debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
+	if (i2c_set_bus_speed(speed))
+		error("i2c_init: failed to init bus for speed = %d", speed);
+}
+#endif /* CONFIG_EXYNOS5 */
 
  /*
   * Register s3c24x0 i2c adapters

@@ -1247,3 +1281,159 @@ U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
  			CONFIG_SYS_I2C_S3C24X0_SPEED,
  			CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
  #endif

drivers/i2c/s3c24x0_i2c.c +11 -0

+
+	if (i2c_bus->is_highspeed) {
+		ret = hsi2c_write(i2c_bus->hsregs, chip, 0, 0,
+				  buffer, len, true);
+		if (ret)
+			exynos5_i2c_reset(i2c_bus);
+	} else {
+		ret = i2c_transfer(i2c_bus->regs, I2C_WRITE,
+				   chip << 1, 0, 0, buffer, len);
+	}
+

drivers/i2c/s3c24x0_i2c.c +16 -0

+
+	if (i2c_bus->is_highspeed) {
+		ret = hsi2c_read(i2c_bus->hsregs, chip, 0, 0, buffer, len);
+		if (ret)
+			exynos5_i2c_reset(i2c_bus);
+	} else {
+		ret = i2c_transfer(i2c_bus->regs, I2C_READ,
+				   chip << 1, 0, 0, buffer, len);
+	}
+
+	return ret != I2C_OK;
+}
+
+static int s3c24x0_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
+			    int nmsgs)
+{

drivers/i2c/s3c24x0_i2c.c +23 -0

+
+	for (; nmsgs > 0; nmsgs--, msg++) {
+		bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD);
+
+		if (msg->flags & I2C_M_RD) {
+			ret = i2c_read_data(i2c_bus, msg->addr, msg->buf,
+					    msg->len);
+		} else {
+			ret = i2c_write_data(i2c_bus, msg->addr, msg->buf,
+					     msg->len, next_is_read);
+		}
+		if (ret)
+			return -EREMOTEIO;
+	}
+
+	return 0;
+}
+
+static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct s3c24x0_i2c_bus *i2c_bus;
+	int node;

drivers/i2c/s3c24x0_i2c.c +56 -0

+	}
+
+	if (!dev->of_id) {
+		error("%s: no compat ids!", dev->name);
+		return -EINVAL;
+	}
+	i2c_bus->is_highspeed = dev->of_id->data;
+
+	node = dev->of_offset;
+
+	if (i2c_bus->is_highspeed) {
+		i2c_bus->hsregs = (struct exynos5_hsi2c *)
+				fdtdec_get_addr(blob, node, "reg");
+	} else {
+		i2c_bus->regs = (struct s3c24x0_i2c *)
+				fdtdec_get_addr(blob, node, "reg");
+	}
+
+	i2c_bus->id = pinmux_decode_periph_id(blob, node);
+
+	i2c_bus->clock_frequency = fdtdec_get_int(blob, node,
+						"clock-frequency",
+						CONFIG_SYS_I2C_S3C24X0_SPEED);
+	i2c_bus->node = node;
+	i2c_bus->bus_num = dev->seq;
+
+	exynos_pinmux_config(i2c_bus->id, i2c_bus->is_highspeed);
+
+	i2c_bus->active = true;
+
+	return 0;
+}
+
+static int s3c_i2c_child_pre_probe(struct udevice *dev)
+{
+	struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
+
+	if (dev->of_offset == -1)
+		return 0;
+	return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset,
+					   i2c_chip);
+}
+
+static const struct dm_i2c_ops s3c_i2c_ops = {
+	.xfer		= s3c24x0_i2c_xfer,
+	.probe_chip	= s3c24x0_i2c_probe,
+	.set_bus_speed	= s3c24x0_i2c_set_bus_speed,
+};
+
+static const struct udevice_id s3c_i2c_ids[] = {
+	{ .compatible = "samsung,s3c2440-i2c", .data = EXYNOS_I2C_STD },
+	{ .compatible = "samsung,exynos5-hsi2c", .data = EXYNOS_I2C_HS },
+	{ }
+};
+
+U_BOOT_DRIVER(i2c_s3c) = {

Hello Przemyslaw Marczak,

just some nitpick ...

Am 08.01.2015 12:33, schrieb Przemyslaw Marczak:

Quoted 125 lines

This commit adjusts the s3c24x0 driver to new i2c api based on driver-model. The driver supports standard and high-speed i2c as previous.

Tested on Trats2 and Arndale (also with HS).

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Simon Glass <[email protected]>

Cc Heiko Schocher <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  drivers/i2c/s3c24x0_i2c.c | 254
++++++++++++++++++++++++++++++++++++++++------
  1 file changed, 222 insertions(+), 32 deletions(-)

drivers/i2c/s3c24x0_i2c.c +0 -0

index fd328f0..c21d479 100644
@@ -9,8 +9,9 @@
   * as they seem to have the same I2C controller inside.
   * The different address mapping is handled by the s3c24xx.h files

below.
*/

drivers/i2c/s3c24x0_i2c.c +4 -1

-
  #include <common.h>
+#include <errno.h>
+#include <dm.h>
  #include <fdtdec.h>
  #if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
  #include <asm/arch/clk.h>

@@ -121,13 +122,23 @@
  #define CONFIG_MAX_I2C_NUM 1
  #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
  /*
   * For SPL boot some boards need i2c before SDRAM is initialised so

force
* variables to live in SRAM
*/

drivers/i2c/s3c24x0_i2c.c +9 -0

+#ifdef CONFIG_SYS_I2C
  static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
              __attribute__((section(".data")));
+#endif
 
+enum exynos_i2c_type {
+    EXYNOS_I2C_STD,
+    EXYNOS_I2C_HS,
+};
+
+#ifdef CONFIG_SYS_I2C
  /**
   * Get a pointer to the given bus index
   *

@@ -147,6 +158,7 @@ static struct s3c24x0_i2c_bus *get_bus(unsigned
 int bus_idx)
      debug("Undefined bus: %d\n", bus_idx);
      return NULL;
  }
+#endif
 
  #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)

static int GetI2CSDA(void)

drivers/i2c/s3c24x0_i2c.c +2 -0

@@ -251,6 +263,7 @@ static void ReadWriteByte(struct s3c24x0_i2c *i2c)
      writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon);
  }
 
+#ifdef CONFIG_SYS_I2C
  static struct s3c24x0_i2c *get_base_i2c(int bus)
  {
  #ifdef CONFIG_EXYNOS4

@@ -267,6 +280,7 @@ static struct s3c24x0_i2c *get_base_i2c(int bus)
      return s3c24x0_get_base_i2c();
  #endif
  }
+#endif
 
  static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int
 slaveadd)

  {

drivers/i2c/s3c24x0_i2c.c +4 -2

@@ -398,18 +412,20 @@ static void exynos5_i2c_reset(struct
 s3c24x0_i2c_bus *i2c_bus)
      hsi2c_ch_init(i2c_bus);
  }
 
+#ifdef CONFIG_SYS_I2C
  static void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed,
 int slaveadd)
  {
      struct s3c24x0_i2c *i2c;
      struct s3c24x0_i2c_bus *bus;
-
  #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
      struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
  #endif
      ulong start_time = get_timer(0);
 
-    /* By default i2c channel 0 is the current bus */
      i2c = get_base_i2c(adap->hwadapnr);
+    bus = &i2c_bus[adap->hwadapnr];
+    if (!bus)
+        return;
 

/*
* In case the previous transfer is still going, wait to give it a

drivers/i2c/s3c24x0_i2c.c +2 -1

@@ -470,12 +486,13 @@ static void s3c24x0_i2c_init(struct i2c_adapter
 *adap, int speed, int slaveadd)
  #endif
      }
  #endif /* #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) */
+
      i2c_ch_init(i2c, speed, slaveadd);
 
-    bus = &i2c_bus[adap->hwadapnr];
      bus->active = true;
      bus->regs = i2c;
  }
+#endif /* CONFIG_SYS_I2C */
 
  /*

* Poll the appropriate bit of the fifo status register until the
interface is

drivers/i2c/s3c24x0_i2c.c static int hsi2c_prepare_transaction(struct · line 549

Quoted 5 lines

drivers/i2c/s3c24x0_i2c.c +0 -1

@@ -545,7 +562,6 @@ static int hsi2c_prepare_transaction(struct
 exynos5_hsi2c *i2c,
                       bool issue_stop)
  {
      u32 conf;
-

why do you delete this empty line?

Quoted 7 lines

drivers/i2c/s3c24x0_i2c.c +0 -0

      conf = len | HSI2C_MASTER_RUN;
 

if (issue_stop)

drivers/i2c/s3c24x0_i2c.c +0 -0

@@ -698,14 +714,24 @@ static int hsi2c_read(struct exynos5_hsi2c *i2c,
      return rv;
  }
 

drivers/i2c/s3c24x0_i2c.c static int hsi2c_read(struct exynos5_hsi2c *i2c, · line 705

Quoted 11 lines

drivers/i2c/s3c24x0_i2c.c +5 -2

+#ifdef CONFIG_SYS_I2C
  static unsigned int s3c24x0_i2c_set_bus_speed(struct i2c_adapter *adap,
-                      unsigned int speed)
+                          unsigned int speed)
+#else
+static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, unsigned
 int speed)
+#endif
  {
      struct s3c24x0_i2c_bus *i2c_bus;
-

here too ...

Quoted 83 lines

drivers/i2c/s3c24x0_i2c.c +9 -13

+#ifdef CONFIG_SYS_I2C
      i2c_bus = get_bus(adap->hwadapnr);
+#else
+    if (!dev)
+        return -ENODEV;
+
+    i2c_bus = dev_get_priv(dev);
+#endif
      if (!i2c_bus)
-        return -1;
+        return -ENODEV;
 
      i2c_bus->clock_frequency = speed;

@@ -715,23 +741,12 @@ static unsigned int
 s3c24x0_i2c_set_bus_speed(struct i2c_adapter *adap,
          hsi2c_ch_init(i2c_bus);
      } else {
          i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
-                CONFIG_SYS_I2C_S3C24X0_SLAVE);
+                    CONFIG_SYS_I2C_S3C24X0_SLAVE);
      }
 
      return 0;
  }
 
-#ifdef CONFIG_EXYNOS5
-static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int
 slaveaddr)
-{
-    /* This will override the speed selected in the fdt for that port */
-    debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
-    if (i2c_set_bus_speed(speed))
-        printf("i2c_init: failed to init bus %d for speed = %d\n",
-                        adap->hwadapnr, speed);
-}
-#endif
-
  /*

* cmd_type is 0 for write, 1 for read.
*

drivers/i2c/s3c24x0_i2c.c +10 -1

@@ -844,15 +859,24 @@ bailout:
      return result;
  }
 
+#ifdef CONFIG_SYS_I2C
  static int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
+#else
+static int s3c24x0_i2c_probe(struct udevice *dev, uint chip, uint
 chip_flags)
+#endif
  {
      struct s3c24x0_i2c_bus *i2c_bus;
      uchar buf[1];
      int ret;
 
+#ifdef CONFIG_SYS_I2C
      i2c_bus = get_bus(adap->hwadapnr);
+#else
+    i2c_bus = dev_get_priv(dev);
+#endif
      if (!i2c_bus)
-        return -1;
+        return -ENODEV;
+
      buf[0] = 0;
 

      /*

drivers/i2c/s3c24x0_i2c.c +1 -0

@@ -871,6 +895,7 @@ static int s3c24x0_i2c_probe(struct i2c_adapter
 *adap, uchar chip)
      return ret != I2C_OK;
  }
 
+#ifdef CONFIG_SYS_I2C
  static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip,
 uint addr,

int alen, uchar *buffer, int len)
{

drivers/i2c/s3c24x0_i2c.c +0 -0

@@ -878,6 +903,10 @@ static int s3c24x0_i2c_read(struct i2c_adapter
 *adap, uchar chip, uint addr,
      uchar xaddr[4];
      int ret;
 

drivers/i2c/s3c24x0_i2c.c static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, · line 908

Quoted 3 lines

drivers/i2c/s3c24x0_i2c.c +3 -0

+    i2c_bus = get_bus(adap->hwadapnr);
+    if (!i2c_bus)
+        return -1;

above you change "return -1" to "return -ENODEV" ... Shouldn;t we use here also an errno? Suggestion -EFAULT?

Quoted 17 lines

drivers/i2c/s3c24x0_i2c.c +1 -0

+
      if (alen > 4) {
          debug("I2C read: addr len %d not supported\n", alen);

          return 1;

drivers/i2c/s3c24x0_i2c.c +0 -4

@@ -906,10 +935,6 @@ static int s3c24x0_i2c_read(struct i2c_adapter
 *adap, uchar chip, uint addr,
          chip |= ((addr >> (alen * 8)) &
               CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  #endif
-    i2c_bus = get_bus(adap->hwadapnr);
-    if (!i2c_bus)
-        return -1;
-
      if (i2c_bus->is_highspeed)
          ret = hsi2c_read(i2c_bus->hsregs, chip, &xaddr[4 - alen],

                   alen, buffer, len);

drivers/i2c/s3c24x0_i2c.c static int s3c24x0_i2c_write(struct i2c_adapter · line 964

Quoted 7 lines

drivers/i2c/s3c24x0_i2c.c +3 -0

@@ -933,6 +958,10 @@ static int s3c24x0_i2c_write(struct i2c_adapter
 *adap, uchar chip, uint addr,
      uchar xaddr[4];
      int ret;
 
+    i2c_bus = get_bus(adap->hwadapnr);
+    if (!i2c_bus)
+        return -1;

here too ...

Quoted 59 lines

drivers/i2c/s3c24x0_i2c.c +1 -0

+
      if (alen > 4) {
          debug("I2C write: addr len %d not supported\n", alen);

          return 1;

drivers/i2c/s3c24x0_i2c.c +0 -4

@@ -960,10 +989,6 @@ static int s3c24x0_i2c_write(struct i2c_adapter
 *adap, uchar chip, uint addr,
          chip |= ((addr >> (alen * 8)) &
               CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  #endif
-    i2c_bus = get_bus(adap->hwadapnr);
-    if (!i2c_bus)
-        return -1;
-
      if (i2c_bus->is_highspeed)
          ret = hsi2c_write(i2c_bus->hsregs, chip, &xaddr[4 - alen],

                    alen, buffer, len, true);

drivers/i2c/s3c24x0_i2c.c +1 -1

@@ -1010,7 +1035,7 @@ static void process_nodes(const void *blob, int
 node_list[], int count,
                          CONFIG_SYS_I2C_S3C24X0_SPEED);
          bus->node = node;
          bus->bus_num = i;
-        exynos_pinmux_config(bus->id, 0);
+        exynos_pinmux_config(PERIPH_ID_I2C0 + bus->id, 0);
 
          /* Mark position as used */

          node_list[i] = -1;

drivers/i2c/s3c24x0_i2c.c +11 -2

@@ -1033,7 +1058,6 @@ void board_i2c_init(const void *blob)
          COMPAT_SAMSUNG_EXYNOS5_I2C, node_list,
          CONFIG_MAX_I2C_NUM);
      process_nodes(blob, node_list, count, 1);
-
  }
 
  int i2c_get_bus_num_fdt(int node)

@@ -1077,7 +1101,17 @@ int i2c_reset_port_fdt(const void *blob, int node)
 
      return 0;
  }
-#endif
+#endif /* CONFIG_OF_CONTROL */
+
+#ifdef CONFIG_EXYNOS5
+static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int
 slaveaddr)
+{
+    /* This will override the speed selected in the fdt for that port */
+    debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
+    if (i2c_set_bus_speed(speed))
+        error("i2c_init: failed to init bus for speed = %d", speed);
+}
+#endif /* CONFIG_EXYNOS5 */
 
  /*

* Register s3c24x0 i2c adapters

drivers/i2c/s3c24x0_i2c.c +0 -0

@@ -1247,3 +1281,159 @@ U_BOOT_I2C_ADAP_COMPLETE(s3c0,
 s3c24x0_i2c_init, s3c24x0_i2c_probe,
              CONFIG_SYS_I2C_S3C24X0_SPEED,
              CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
  #endif

drivers/i2c/s3c24x0_i2c.c U_BOOT_I2C_ADAP_COMPLETE(s3c0, · line 1293

Quoted 10 lines

drivers/i2c/s3c24x0_i2c.c +10 -0

+#endif /* CONFIG_SYS_I2C */
+
+#ifdef CONFIG_DM_I2C
+static int i2c_write_data(struct s3c24x0_i2c_bus *i2c_bus, uchar chip,
+              uchar *buffer, int len, bool end_with_repeated_start)
+{
+    int ret;
+
+    if (!i2c_bus)
+        return -1;

and here

Quoted 11 lines

drivers/i2c/s3c24x0_i2c.c +11 -0

+
+    if (i2c_bus->is_highspeed) {
+        ret = hsi2c_write(i2c_bus->hsregs, chip, 0, 0,
+                  buffer, len, true);
+        if (ret)
+            exynos5_i2c_reset(i2c_bus);
+    } else {
+        ret = i2c_transfer(i2c_bus->regs, I2C_WRITE,
+                   chip << 1, 0, 0, buffer, len);
+    }
+

drivers/i2c/s3c24x0_i2c.c U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe, · line 1314

Quoted 10 lines

drivers/i2c/s3c24x0_i2c.c +10 -0

+    return ret != I2C_OK;
+}
+
+static int i2c_read_data(struct s3c24x0_i2c_bus  *i2c_bus, uchar chip,
+             uchar *buffer, int len)
+{
+    int ret;
+
+    if (!i2c_bus)
+        return -1;

and here

Quoted 16 lines

drivers/i2c/s3c24x0_i2c.c +16 -0

+
+    if (i2c_bus->is_highspeed) {
+        ret = hsi2c_read(i2c_bus->hsregs, chip, 0, 0, buffer, len);
+        if (ret)
+            exynos5_i2c_reset(i2c_bus);
+    } else {
+        ret = i2c_transfer(i2c_bus->regs, I2C_READ,
+                   chip << 1, 0, 0, buffer, len);
+    }
+
+    return ret != I2C_OK;
+}
+
+static int s3c24x0_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
+                int nmsgs)
+{

drivers/i2c/s3c24x0_i2c.c U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe, · line 1340

Quoted 10 lines

drivers/i2c/s3c24x0_i2c.c +10 -0

+    struct s3c24x0_i2c_bus *i2c_bus;
+    int ret;
+
+    if (!dev)
+        return -ENODEV;
+
+    i2c_bus = dev_get_priv(dev);
+
+    if (!i2c_bus)
+        return -1;

and here...

Quoted 30 lines

drivers/i2c/s3c24x0_i2c.c +30 -0

+
+    for (; nmsgs > 0; nmsgs--, msg++) {
+        bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD);
+
+        if (msg->flags & I2C_M_RD) {
+            ret = i2c_read_data(i2c_bus, msg->addr, msg->buf,
+                        msg->len);
+        } else {
+            ret = i2c_write_data(i2c_bus, msg->addr, msg->buf,
+                         msg->len, next_is_read);
+        }
+        if (ret)
+            return -EREMOTEIO;
+    }
+
+    return 0;
+}
+
+static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)
+{
+    const void *blob = gd->fdt_blob;
+    struct s3c24x0_i2c_bus *i2c_bus;
+    int node;
+
+    if (!dev) {
+        error("%s: no such device!", dev->name);
+        return -ENODEV;
+    }
+
+    i2c_bus = dev_get_priv(dev);

drivers/i2c/s3c24x0_i2c.c U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe, · line 1373

Quoted 3 lines

drivers/i2c/s3c24x0_i2c.c +3 -0

+    if (!i2c_bus) {
+        error("%s: i2c bus not allocated!", dev->name);
+        return -EINVAL;

ah, here if no bus is found you return -EINVAL ... as EINVAL is used below again, I prefer to use another errno here ... as suggested EFAULT or maybe ENOENT? ... but please for all occurrences of "if (!i2c_bus) {" the same value, thanks!

Quoted 57 lines

drivers/i2c/s3c24x0_i2c.c +56 -0

+    }
+
+    if (!dev->of_id) {
+        error("%s: no compat ids!", dev->name);
+        return -EINVAL;
+    }
+    i2c_bus->is_highspeed = dev->of_id->data;
+
+    node = dev->of_offset;
+
+    if (i2c_bus->is_highspeed) {
+        i2c_bus->hsregs = (struct exynos5_hsi2c *)
+                fdtdec_get_addr(blob, node, "reg");
+    } else {
+        i2c_bus->regs = (struct s3c24x0_i2c *)
+                fdtdec_get_addr(blob, node, "reg");
+    }
+
+    i2c_bus->id = pinmux_decode_periph_id(blob, node);
+
+    i2c_bus->clock_frequency = fdtdec_get_int(blob, node,
+                        "clock-frequency",
+                        CONFIG_SYS_I2C_S3C24X0_SPEED);
+    i2c_bus->node = node;
+    i2c_bus->bus_num = dev->seq;
+
+    exynos_pinmux_config(i2c_bus->id, i2c_bus->is_highspeed);
+
+    i2c_bus->active = true;
+
+    return 0;
+}
+
+static int s3c_i2c_child_pre_probe(struct udevice *dev)
+{
+    struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
+
+    if (dev->of_offset == -1)
+        return 0;
+    return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset,
+                       i2c_chip);
+}
+
+static const struct dm_i2c_ops s3c_i2c_ops = {
+    .xfer        = s3c24x0_i2c_xfer,
+    .probe_chip    = s3c24x0_i2c_probe,
+    .set_bus_speed    = s3c24x0_i2c_set_bus_speed,
+};
+
+static const struct udevice_id s3c_i2c_ids[] = {
+    { .compatible = "samsung,s3c2440-i2c", .data = EXYNOS_I2C_STD },
+    { .compatible = "samsung,exynos5-hsi2c", .data = EXYNOS_I2C_HS },
+    { }
+};
+
+U_BOOT_DRIVER(i2c_s3c) = {

drivers/i2c/s3c24x0_i2c.c U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe, · line 1439

Quoted 10 lines

drivers/i2c/s3c24x0_i2c.c +10 -0

+    .name    = "i2c_s3c",
+    .id    = UCLASS_I2C,
+    .of_match = s3c_i2c_ids,
+    .ofdata_to_platdata = s3c_i2c_ofdata_to_platdata,
+    .per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
+    .child_pre_probe = s3c_i2c_child_pre_probe,
+    .priv_auto_alloc_size = sizeof(struct s3c24x0_i2c_bus),
+    .ops    = &s3c_i2c_ops,
+};
+#endif /* CONFIG_DM_I2C */

Thanks for your work!

bye,
Heiko

Hello Heiko Schocher,

Quoted 5 lines · Heiko Schocher

Hello Przemyslaw Marczak,

just some nitpick ...

Thank you for the review, I will fix this in the next patchset version.

Hi Przemyslaw,

Quoted 9 lines · Przemyslaw Marczak

Hello Heiko Schocher,

Quoted 5 lines · Heiko Schocher

Hello Przemyslaw Marczak,

just some nitpick ...

[snip]

Quoted 1 line

Thank you for the review, I will fix this in the next patchset version.

I'd like to apply this to u-boot-dm soon - can you please resend this patch with the nits fixed? I don't have any comments beyond what Heiko says.

Also, you probably saw the compatibility layer for I2C which should make it possible for you to run the old PMIC framework with I2C using driver model. It should make it easier to get everything done. It is in u-boot-dm/testing.

Regards,
Simon

This commit allows for test i2c drivers with new i2c api on Exynos5xxx based boards.

The S3C24X0 I2C driver supports driver model I2C api, but i2c peripherials drivers on exynos5 boards doesn't. So this commit allows for test ported driver before switch the Exynos5 boards to DM I2C at all.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Akshay Saraswat <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/exynos5-common.h | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

include/configs/exynos5-common.h +0 -7

index ad63f3c..b7af8a5 100644
@@ -54,13 +54,6 @@
 #define CONFIG_CMD_DTT
 #define CONFIG_TMU_CMD_DTT
 
-/* TPM */
-#define CONFIG_TPM
-#define CONFIG_CMD_TPM
-#define CONFIG_TPM_TIS_I2C
-#define CONFIG_TPM_TIS_I2C_BUS_NUMBER	3
-#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR	0x20
-
 /* MMC SPL */
 #define COPY_BL2_FNPTR_ADDR	0x02020030
 #define CONFIG_SUPPORT_EMMC_BOOT

include/configs/exynos5-common.h +8 -2

 #define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
 #define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C
+#define CONFIG_I2C_MULTI_BUS
+#endif /* ifndef CONFIG_DM_I2C */
 #define CONFIG_I2C_EDID
 
+/* TPM */
+#ifndef CONFIG_DM_I2C

This commit allows for test i2c drivers with new i2c api on Exynos5xxx based boards.

The S3C24X0 I2C driver supports driver model I2C api, but i2c peripherials drivers on exynos5 boards doesn't. So this commit allows for test ported driver before switch the Exynos5 boards to DM I2C at all.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Akshay Saraswat <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  include/configs/exynos5-common.h | 29 ++++++++++++++++++-----------
  1 file changed, 18 insertions(+), 11 deletions(-)

include/configs/exynos5-common.h +0 -7

index ad63f3c..b7af8a5 100644
@@ -54,13 +54,6 @@
  #define CONFIG_CMD_DTT
  #define CONFIG_TMU_CMD_DTT
 
-/* TPM */
-#define CONFIG_TPM
-#define CONFIG_CMD_TPM
-#define CONFIG_TPM_TIS_I2C
-#define CONFIG_TPM_TIS_I2C_BUS_NUMBER	3
-#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR	0x20
-
  /* MMC SPL */
  #define COPY_BL2_FNPTR_ADDR	0x02020030
  #define CONFIG_SUPPORT_EMMC_BOOT

include/configs/exynos5-common.h +15 -2

  #define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
  #define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
  #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C
+#define CONFIG_I2C_MULTI_BUS
+#endif /* ifndef CONFIG_DM_I2C */
  #define CONFIG_I2C_EDID
 
+/* TPM */
+#ifndef CONFIG_DM_I2C
+#define CONFIG_TPM
+#define CONFIG_CMD_TPM
+#define CONFIG_TPM_TIS_I2C
+#define CONFIG_TPM_TIS_I2C_BUS_NUMBER	3
+#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR	0x20
+#endif
+
  /* SPI */
  #ifdef CONFIG_SPI_FLASH
  #define CONFIG_EXYNOS_SPI

Hello Przemyslaw Marczak,

Am 08.01.2015 12:33, schrieb Przemyslaw Marczak:

Quoted 3 lines

This commit allows for test i2c drivers with new i2c api on Exynos5xxx based boards.

Quoted 4 lines

The S3C24X0 I2C driver supports driver model I2C api, but i2c peripherials drivers on exynos5 boards doesn't. So this commit allows for test ported driver before switch the Exynos5 boards to DM I2C at all.

Hmm... so this is just a patch for test purposes not for mainline?

Quoted 28 lines

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Akshay Saraswat <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  include/configs/exynos5-common.h | 29 ++++++++++++++++++-----------
  1 file changed, 18 insertions(+), 11 deletions(-)

include/configs/exynos5-common.h +0 -7

index ad63f3c..b7af8a5 100644
@@ -54,13 +54,6 @@
  #define CONFIG_CMD_DTT
  #define CONFIG_TMU_CMD_DTT
 
-/* TPM */
-#define CONFIG_TPM
-#define CONFIG_CMD_TPM
-#define CONFIG_TPM_TIS_I2C
-#define CONFIG_TPM_TIS_I2C_BUS_NUMBER    3
-#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR    0x20
-
  /* MMC SPL */
  #define COPY_BL2_FNPTR_ADDR    0x02020030
  #define CONFIG_SUPPORT_EMMC_BOOT

include/configs/exynos5-common.h line 124

Quoted 8 lines

include/configs/exynos5-common.h +3 -2

@@ -126,15 +119,29 @@
  #define SPI_FLASH_UBOOT_POS    (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
 
  /* I2C */
-#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_SYS_I2C
+#if 0 /* For test */
+#define CONFIG_DM_I2C
+#endif

Hmm.. no, please no dead code in mainline ... maybe you enable "CONFIG_DM_I2C" if "CONFIG_DM" is set?

bye,
Heiko

Quoted 13 lines

include/configs/exynos5-common.h +6 -2

  #define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_S3C24X0_SPEED    100000        /* 100 Kbps */
  #define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_S3C24X0_SPEED    100000        /* 100 Kbps */
  #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C
+#define CONFIG_I2C_MULTI_BUS
+#endif /* ifndef CONFIG_DM_I2C */
  #define CONFIG_I2C_EDID
 

include/configs/exynos5-common.h line 147

Quoted 13 lines

include/configs/exynos5-common.h +9 -0

+/* TPM */
+#ifndef CONFIG_DM_I2C
+#define CONFIG_TPM
+#define CONFIG_CMD_TPM
+#define CONFIG_TPM_TIS_I2C
+#define CONFIG_TPM_TIS_I2C_BUS_NUMBER    3
+#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR    0x20
+#endif
+
  /* SPI */
  #ifdef CONFIG_SPI_FLASH
  #define CONFIG_EXYNOS_SPI

Most i2c peripherals for this board doesn't support new i2c api. So CONFIG_DM_I2C on this board can be enabled for test only. The i2c command works fine with it.
This is the first step before adding support to the new power framework soon.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Lukasz Majewski <[email protected]>

Cc Jaehoon Chung <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/trats2.h | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

include/configs/trats2.h +0 -0

index 42481ab..8b099dd 100644

include/configs/trats2.h +9 -2

 #define CONFIG_CMD_I2C
-
-#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_S3C24X0
 #define CONFIG_SYS_I2C_S3C24X0_SPEED	100000
 #define CONFIG_SYS_I2C_S3C24X0_SLAVE	0
+
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
 #define CONFIG_MAX_I2C_NUM		8
+
 #define CONFIG_SYS_I2C_SOFT
 #define CONFIG_SYS_I2C_SOFT_SPEED	50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00

@@ -177,6 +180,8 @@
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 #define CONFIG_SYS_I2C_INIT_BOARD
 
+#include <asm/arch/gpio.h>
+
 #ifndef __ASSEMBLY__
 int get_soft_i2c_scl_pin(void);
 int get_soft_i2c_sda_pin(void);

@@ -192,6 +197,7 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_POWER_MUIC_MAX77693
 #define CONFIG_POWER_FG_MAX77693
 #define CONFIG_POWER_BATTERY_TRATS2
+#endif /* ifndef CONFIG_DM_I2C */
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA

@@ -203,11 +209,13 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_MISC_INIT_R
 
 /* Download menu - Samsung common */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_LCD_MENU
 #define CONFIG_LCD_MENU_BOARD
 
 /* Download menu - definitions for check keys */
 #ifndef __ASSEMBLY__
+#include <power/pmic.h>
 #include <power/max77686_pmic.h>
 
 #define KEY_PWR_PMIC_NAME		"MAX77686_PMIC"

Quoted 21 lines · Przemyslaw Marczak

Most i2c peripherals for this board doesn't support new i2c api. So CONFIG_DM_I2C on this board can be enabled for test only. The i2c command works fine with it.
This is the first step before adding support to the new power framework soon.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Lukasz Majewski <[email protected]>

Cc Jaehoon Chung <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  include/configs/trats2.h | 17 +++++++++++++----
  1 file changed, 13 insertions(+), 4 deletions(-)

include/configs/trats2.h +0 -0

index 42481ab..8b099dd 100644

include/configs/trats2.h line 164

Quoted 8 lines

include/configs/trats2.h +3 -2

@@ -159,15 +159,18 @@
  #define CONFIG_RANDOM_UUID
 
  /* I2C */
-#include <asm/arch/gpio.h>
-
+#if 0 /* For test */
+#define CONFIG_DM_I2C
+#endif

please remove test code.

Quoted 51 lines

include/configs/trats2.h +10 -2

  #define CONFIG_CMD_I2C
-
-#define CONFIG_SYS_I2C
  #define CONFIG_SYS_I2C_S3C24X0
  #define CONFIG_SYS_I2C_S3C24X0_SPEED	100000
  #define CONFIG_SYS_I2C_S3C24X0_SLAVE	0
+
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
  #define CONFIG_MAX_I2C_NUM		8
+
  #define CONFIG_SYS_I2C_SOFT
  #define CONFIG_SYS_I2C_SOFT_SPEED	50000
  #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00

@@ -177,6 +180,8 @@
  #define CONFIG_SOFT_I2C_READ_REPEATED_START
  #define CONFIG_SYS_I2C_INIT_BOARD
 
+#include <asm/arch/gpio.h>
+
  #ifndef __ASSEMBLY__
  int get_soft_i2c_scl_pin(void);
  int get_soft_i2c_sda_pin(void);

@@ -192,6 +197,7 @@ int get_soft_i2c_sda_pin(void);
  #define CONFIG_POWER_MUIC_MAX77693
  #define CONFIG_POWER_FG_MAX77693
  #define CONFIG_POWER_BATTERY_TRATS2
+#endif /* ifndef CONFIG_DM_I2C */
 
  /* Security subsystem - enable hw_rand() */
  #define CONFIG_EXYNOS_ACE_SHA

@@ -203,11 +209,13 @@ int get_soft_i2c_sda_pin(void);
  #define CONFIG_MISC_INIT_R
 
  /* Download menu - Samsung common */
+#ifndef CONFIG_DM_I2C
  #define CONFIG_LCD_MENU
  #define CONFIG_LCD_MENU_BOARD
 
  /* Download menu - definitions for check keys */
  #ifndef __ASSEMBLY__
+#include <power/pmic.h>
  #include <power/max77686_pmic.h>
 
  #define KEY_PWR_PMIC_NAME		"MAX77686_PMIC"

@@ -219,6 +227,7 @@ int get_soft_i2c_sda_pin(void);
  #define KEY_VOL_UP_GPIO			EXYNOS4X12_GPIO_X22
  #define KEY_VOL_DOWN_GPIO		EXYNOS4X12_GPIO_X33
  #endif /* __ASSEMBLY__ */
+#endif
 

include/configs/trats2.h int get_soft_i2c_sda_pin(void); · line 233

Quoted 3 lines

include/configs/trats2.h +0 -0

  /* LCD console */
  #define LCD_BPP                 LCD_COLOR16

Thanks,
Minkyu Kang

There is no MAX77686 pmic on this board,
so the driver support should be removed.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/arndale.h | 2 --
 1 file changed, 2 deletions(-)

include/configs/arndale.h +0 -3

index d68993b..3ad4a9b 100644
@@ -51,8 +51,6 @@
 /* PMIC */
 #define CONFIG_PMIC
 #define CONFIG_POWER_I2C
-#define CONFIG_POWER_MAX77686
-
 
 #define CONFIG_PREBOOT
 
--

1.9.1

Quoted 20 lines · Przemyslaw Marczak

There is no MAX77686 pmic on this board,
so the driver support should be removed.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 include/configs/arndale.h | 2 --
 1 file changed, 2 deletions(-)

include/configs/arndale.h +0 -2

index d68993b..3ad4a9b 100644
@@ -51,8 +51,6 @@
 /* PMIC */
 #define CONFIG_PMIC
 #define CONFIG_POWER_I2C
-#define CONFIG_POWER_MAX77686
-
 

Quoted 5 lines

include/configs/arndale.h +0 -1

 #define CONFIG_PREBOOT
 
--

1.9.1

Acked-by Simon Glass <[email protected]>

This patchset adds support to driver model i2c api for Exynos i2c driver. Few boards are using this driver, but the board peripherals are not ported to the new api yet. So this can't be enabled with the full board functionality.

In this case each Exynos5 based boards have fixed config dependencies Helloafor testing the dm i2c api with the new i2c driver. This will facilitate the peripheral porting.

For test, just enable CONFIG_DM_I2C in exynos5-common.h. The i2c command should work with this as previous.

This patchset also provides some changes related to Exynos4 boards. Most Exynos4 boards requires only pmic support, and this will be done with the new pmic framework soon.

Przemyslaw Marczak (18):
arndale: config: disable max77686 support
exynos5250: config: disable max77686 driver
smdk5250: config: enable max77686 driver support
exynos4: dts: add missing i2c properties
arndale: dts: add missing i2c aliases
exynos5: pinmux: check flag for i2c config
dm: i2c: s3c24x0: adjust to dm-i2c api
exynos5: config: prepare for dm i2c support
exynos5250: config: temporary disable sound for dm i2c
arndale: config: temporary disable pmic for dm i2c
exynos5-dt: config: temporary disable pmic for dm i2c
snow: config: temporary disable cros ec i2c for dm i2c
smdk5250: config: temporary disable pmic for dm i2c
smdk5420: board: fix build warning for testing dm i2c
peach-pi: config: temporary disable video parade for dm i2c
peach-pit: config: temporary disable video parade for dm i2c
trats2: board: cleanup power init code
trats2: config: disable i2c peripherals if testing dm i2c

  arch/arm/cpu/armv7/exynos/pinmux.c  |  27 ++--
  arch/arm/dts/exynos4.dtsi           |  24 ++--
  arch/arm/dts/exynos5250-arndale.dts |   8 ++
  board/samsung/smdk5420/smdk5420.c   |   2 +-
  board/samsung/trats2/trats2.c       | 144 +++++++++++---------
  drivers/i2c/s3c24x0_i2c.c           | 254 +++++++++++++++++++++++++++++++-----
  include/configs/arndale.h           |   5 +-
  include/configs/exynos5-common.h    |  29 ++--
  include/configs/exynos5-dt-common.h |   2 +
  include/configs/exynos5250-common.h |   5 +-
  include/configs/peach-pi.h          |   2 +
  include/configs/peach-pit.h         |   2 +
  include/configs/smdk5250.h          |   4 +
  include/configs/snow.h              |   4 +-
  include/configs/trats2.h            |  17 ++-
  15 files changed, 395 insertions(+), 134 deletions(-)