fpga: Protect GZIP usage when LOADMK is enabled

PATCH New Michal Simek 3 participants 15 messages Jan 14, 2015

Subsystems (2)

Arm/Zynq architecture FPGA manager framework

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Michal Simek

author

2015-01-14 09:04 UTC #0 lore raw

PATCH 1/11 fpga: Protect GZIP usage when LOADMK is enabled

For case where CMD_FPGA_LOADMK is enabled and GZIP disable.

Warning log:
common/built-in.o: In function `do_fpga':
/mnt/disk/u-boot/common/cmd_fpga.c:218: undefined reference to `gunzip'

Signed-off-by Michal Simek <[email protected]>

---

 common/cmd_fpga.c | 5 +++++
 1 file changed, 5 insertions(+)

common/cmd_fpga.c +5 -0

index 8c5bf440fbb0..484a6c6ce036 100644
@@ -211,6 +211,7 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 				comp = image_get_comp(hdr);
 				if (comp == IH_COMP_GZIP) {
+#if defined(CONFIG_GZIP)
 					ulong image_buf = image_get_data(hdr);
 					data = image_get_load(hdr);
 					ulong image_size = ~0UL;

@@ -222,6 +223,10 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 						return 1;
 					}
 					data_size = image_size;
+#else
+					puts("Gunzip image is not supported\n");
+					return 1;
+#endif
 				} else {
 					data = (ulong)image_get_data(hdr);
 					data_size = image_get_data_size(hdr);

--
1.8.2.3

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Michal Simek

author

2015-01-14 09:04 UTC #1 lore raw

PATCH 2/11 fpga: Remove extern prototypes from .h

This problem is reported by checkpatch.pl Warnings:
CHECK: extern prototypes should be avoided in .h files

Signed-off-by Michal Simek <[email protected]>

---

 include/fpga.h | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

include/fpga.h +13 ~~-13~~

index 914024c17cb8..ef044e936294 100644
@@ -49,18 +49,18 @@ typedef enum {
 } bitstream_type;
 
 /* root function definitions */
-extern void fpga_init(void);
-extern int fpga_add(fpga_type devtype, void *desc);
-extern int fpga_count(void);
-extern int fpga_load(int devnum, const void *buf, size_t bsize,
-		     bitstream_type bstype);
-extern int fpga_fsload(int devnum, const void *buf, size_t size,
-		       fpga_fs_info *fpga_fsinfo);
-extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
-			      bitstream_type bstype);
-extern int fpga_dump(int devnum, const void *buf, size_t bsize);
-extern int fpga_info(int devnum);
-extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
-					    size_t bsize, char *fn);
+void fpga_init(void);
+int fpga_add(fpga_type devtype, void *desc);
+int fpga_count(void);
+int fpga_load(int devnum, const void *buf, size_t bsize,
+	      bitstream_type bstype);
+int fpga_fsload(int devnum, const void *buf, size_t size,
+		fpga_fs_info *fpga_fsinfo);
+int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+		       bitstream_type bstype);
+int fpga_dump(int devnum, const void *buf, size_t bsize);
+int fpga_info(int devnum);
+const fpga_desc *const fpga_validate(int devnum, const void *buf,
+				     size_t bsize, char *fn);
 
 #endif	/* _FPGA_H_ */

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #2 lore raw

PATCH 3/11 fpga: Export fpga_get_desc for SPL

In reply to Michal Simek

SPL needs to detect FPGA device which will be used for loading bitstream.

Signed-off-by Michal Simek <[email protected]>

---

 drivers/fpga/fpga.c | 2 +-
 include/fpga.h      | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

drivers/fpga/fpga.c +1 -1

index 37946d5e183a..d94eb5cc25c4 100644
@@ -38,7 +38,7 @@ static void fpga_no_sup(char *fn, char *msg)
 /* fpga_get_desc
  *	map a device number to a descriptor
  */
-static const fpga_desc *const fpga_get_desc(int devnum)
+const fpga_desc *const fpga_get_desc(int devnum)
 {
 	fpga_desc *desc = (fpga_desc *)NULL;

include/fpga.h +1 -0

index ef044e936294..e0d12981b283 100644
@@ -52,6 +52,7 @@ typedef enum {
 void fpga_init(void);
 int fpga_add(fpga_type devtype, void *desc);
 int fpga_count(void);
+const fpga_desc *const fpga_get_desc(int devnum);
 int fpga_load(int devnum, const void *buf, size_t bsize,
 	      bitstream_type bstype);
 int fpga_fsload(int devnum, const void *buf, size_t size,

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #3 lore raw

PATCH 4/11 fpga: xilinx: spartan2: Setup NULL fpga_op without driver

In reply to Michal Simek

Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added.

Signed-off-by Michal Simek <[email protected]>

---

 include/spartan2.h | 38 +++++++++++++++++++++++++++-----------
 1 file changed, 27 insertions(+), 11 deletions(-)

include/spartan2.h +27 ~~-11~~

index 2aca954e73ab..14606c303180 100644
@@ -38,7 +38,12 @@ typedef struct {
 	xilinx_post_fn	post;
 } xilinx_spartan2_slave_serial_fns;
 
+#if defined(CONFIG_FPGA_SPARTAN2)
 extern struct xilinx_fpga_op spartan2_op;
+# define FPGA_SPARTAN2_OPS	&spartan2_op
+#else
+# define FPGA_SPARTAN2_OPS	NULL
+#endif
 
 /* Device Image Sizes
  *********************************************************************/

@@ -61,36 +66,47 @@ extern struct xilinx_fpga_op spartan2_op;
  *********************************************************************/
 /* Spartan-II devices */
 #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }
 
 #endif /* _SPARTAN2_H_ */

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #4 lore raw

PATCH 5/11 fpga: xilinx: spartan3: Setup NULL fpga_op without driver

In reply to Michal Simek

Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added.

Signed-off-by Michal Simek <[email protected]>

---

 include/spartan3.h | 45 +++++++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 14 deletions(-)

include/spartan3.h +31 ~~-14~~

index d6d67a6e560c..fcb27b01e4a7 100644
@@ -40,7 +40,12 @@ typedef struct {
 	xilinx_abort_fn abort;
 } xilinx_spartan3_slave_serial_fns;
 
+#if defined(CONFIG_FPGA_SPARTAN3)
 extern struct xilinx_fpga_op spartan3_op;
+# define FPGA_SPARTAN3_OPS	&spartan3_op
+#else
+# define FPGA_SPARTAN3_OPS	NULL
+#endif
 
 /* Device Image Sizes
  *********************************************************************/

@@ -71,48 +76,60 @@ extern struct xilinx_fpga_op spartan3_op;
  *********************************************************************/
 /* Spartan-III devices */
 #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 /* Spartan-3E devices */
 #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
 { xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \
-	&spartan3_op }
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
 { xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \
-	&spartan3_op }
+	FPGA_SPARTAN3_OPS }
 
 #define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }
 
 #endif /* _SPARTAN3_H_ */

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #5 lore raw

PATCH 6/11 fpga: xilinx: virtex2: Setup NULL fpga_op without driver

In reply to Michal Simek

Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added

Signed-off-by Michal Simek <[email protected]>

---

 include/virtex2.h | 45 +++++++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 14 deletions(-)

include/virtex2.h +31 ~~-14~~

index 7b7825f513e3..5944bbcb61b8 100644
@@ -11,8 +11,6 @@
 
 #include <xilinx.h>
 
-extern struct xilinx_fpga_op virtex2_op;
-
 /*
  * Slave SelectMap Implementation function table.
  */

@@ -40,6 +38,13 @@ typedef struct {
 	xilinx_wdata_fn	wdata;
 } xilinx_virtex2_slave_serial_fns;
 
+#if defined(CONFIG_FPGA_VIRTEX2)
+extern struct xilinx_fpga_op virtex2_op;
+# define FPGA_VIRTEX2_OPS	&virtex2_op
+#else
+# define FPGA_VIRTEX2_OPS	NULL
+#endif
+
 /* Device Image Sizes (in bytes)
  *********************************************************************/
 #define XILINX_XC2V40_SIZE		(338208 / 8)

@@ -58,39 +63,51 @@ typedef struct {
 /* Descriptor Macros
  *********************************************************************/
 #define XILINX_XC2V40_DESC(iface, fn_table, cookie)	\
-{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }
 
 #endif /* _VIRTEX2_H_ */

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #6 lore raw

PATCH 7/11 fpga: xilinx: virtex2: Fix macro indentation

In reply to Michal Simek

No functional changes.

Signed-off-by Michal Simek <[email protected]>

---

 include/virtex2.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

include/virtex2.h +4 -4

index 5944bbcb61b8..503df9abaeaa 100644
@@ -47,10 +47,10 @@ extern struct xilinx_fpga_op virtex2_op;
 
 /* Device Image Sizes (in bytes)
  *********************************************************************/
-#define XILINX_XC2V40_SIZE		(338208 / 8)
-#define XILINX_XC2V80_SIZE		(597408 / 8)
-#define XILINX_XC2V250_SIZE		(1591584 / 8)
-#define XILINX_XC2V500_SIZE		(2557857 / 8)
+#define XILINX_XC2V40_SIZE	(338208 / 8)
+#define XILINX_XC2V80_SIZE	(597408 / 8)
+#define XILINX_XC2V250_SIZE	(1591584 / 8)
+#define XILINX_XC2V500_SIZE	(2557857 / 8)
 #define XILINX_XC2V1000_SIZE	(3749408 / 8)
 #define XILINX_XC2V1500_SIZE	(5166240 / 8)
 #define XILINX_XC2V2000_SIZE	(6808352 / 8)

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #7 lore raw

PATCH 8/11 fpga: xilinx: zynqpl: Setup NULL fpga_op without driver

In reply to Michal Simek

Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added

Signed-off-by Michal Simek <[email protected]>

---

 include/zynqpl.h | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

include/zynqpl.h +17 -6

index 8a9ec3297fbe..d0ff0d9a8bda 100644
@@ -12,7 +12,12 @@
 
 #include <xilinx.h>
 
+#if defined(CONFIG_FPGA_ZYNQPL)
 extern struct xilinx_fpga_op zynq_op;
+# define FPGA_ZYNQPL_OPS	&zynq_op
+#else
+# define FPGA_ZYNQPL_OPS	NULL
+#endif
 
 #define XILINX_ZYNQ_7010	0x2
 #define XILINX_ZYNQ_7015	0x1b

@@ -31,21 +36,27 @@ extern struct xilinx_fpga_op zynq_op;
 
 /* Descriptor Macros */
 #define XILINX_XC7Z010_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z010" }
 
 #define XILINX_XC7Z015_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z015" }
 
 #define XILINX_XC7Z020_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z020" }
 
 #define XILINX_XC7Z030_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z030" }
 
 #define XILINX_XC7Z045_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z045" }
 
 #define XILINX_XC7Z100_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z100" }
 
 #endif /* _ZYNQPL_H_ */

--
1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #8 lore raw

PATCH 9/11 fpga: xilinx: Check if fpga operations are defined

In reply to Michal Simek

Ensure that operations are correctly setup.

Signed-off-by Michal Simek <[email protected]>

---

 drivers/fpga/xilinx.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

drivers/fpga/xilinx.c +15 -2

index adb4b8cd25fd..9c95148b25c1 100644
@@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}
 
+	if (!desc->operations || !desc->operations->load) {
+		printf("%s: Missing load operation\n", __func__);
+		return FPGA_FAIL;
+	}
+
 	return desc->operations->load(desc, buf, bsize, bstype);
 }

@@ -151,8 +156,10 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}
 
-	if (!desc->operations->loadfs)
+	if (!desc->operations || !desc->operations->loadfs) {
+		printf("%s: Missing loadfs operation\n", __func__);
 		return FPGA_FAIL;
+	}
 
 	return desc->operations->loadfs(desc, buf, bsize, fpga_fsinfo);
 }

@@ -165,6 +172,11 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 		return FPGA_FAIL;
 	}
 
+	if (!desc->operations || !desc->operations->dump) {
+		printf("%s: Missing dump operation\n", __func__);
+		return FPGA_FAIL;
+	}
+
 	return desc->operations->dump(desc, buf, bsize);
 }

@@ -228,7 +240,8 @@ int xilinx_info(xilinx_desc *desc)
 
 		if (desc->iface_fns) {
 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-			desc->operations->info(desc);
+			if (desc->operations && desc->operations->info)
+				desc->operations->info(desc);
 		} else
 			printf ("No Device Function Table.\n");

--
1.8.2.3

Simon Glass

2015-01-14 15:14 UTC #9 lore raw

PATCH 9/11 fpga: xilinx: Check if fpga operations are defined

Quoted 3 lines · Michal Simek

Ensure that operations are correctly setup.
Signed-off-by Michal Simek <[email protected]>

Reviewed-by Simon Glass <[email protected]>

(comment below)

Quoted 10 lines

---

 drivers/fpga/xilinx.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

drivers/fpga/xilinx.c +0 -0

index adb4b8cd25fd..9c95148b25c1 100644

drivers/fpga/xilinx.c int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize, · line 144

Quoted 6 lines

drivers/fpga/xilinx.c +3 -0

@@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
                return FPGA_FAIL;
        }
 
+       if (!desc->operations || !desc->operations->load) {
+               printf("%s: Missing load operation\n", __func__);
+               return FPGA_FAIL;

I wonder if these error codes should be dropped in favour of the standard ones? Perhaps in a separate patch. E.g. here we could use -ENOSYS.

Quoted 40 lines

drivers/fpga/xilinx.c +12 -3

+       }
+
        return desc->operations->load(desc, buf, bsize, bstype);
 }

@@ -151,8 +156,10 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
                return FPGA_FAIL;
        }
 
-       if (!desc->operations->loadfs)
+       if (!desc->operations || !desc->operations->loadfs) {
+               printf("%s: Missing loadfs operation\n", __func__);
                return FPGA_FAIL;
+       }
 
        return desc->operations->loadfs(desc, buf, bsize, fpga_fsinfo);
 }

@@ -165,6 +172,11 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
                return FPGA_FAIL;
        }
 
+       if (!desc->operations || !desc->operations->dump) {
+               printf("%s: Missing dump operation\n", __func__);
+               return FPGA_FAIL;
+       }
+
        return desc->operations->dump(desc, buf, bsize);
 }

@@ -228,7 +240,8 @@ int xilinx_info(xilinx_desc *desc)
 
                if (desc->iface_fns) {
                        printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-                       desc->operations->info(desc);
+                       if (desc->operations && desc->operations->info)
+                               desc->operations->info(desc);
                } else
                        printf ("No Device Function Table.\n");
 
--

Quoted 2 lines

1.8.2.3

Regards,
Simon

Michal Simek

2015-01-14 15:17 UTC #10 lore raw

PATCH 9/11 fpga: xilinx: Check if fpga operations are defined

Quoted 22 lines · Simon Glass

Quoted 3 lines · Michal Simek
Ensure that operations are correctly setup.
Signed-off-by Michal Simek <[email protected]>
Reviewed-by Simon Glass <[email protected]>
(comment below)
Quoted 13 lines
---
 drivers/fpga/xilinx.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)
drivers/fpga/xilinx.c +0 -0
index adb4b8cd25fd..9c95148b25c1 100644
@@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
                return FPGA_FAIL;
        }
 

Quoted 7 lines

drivers/fpga/xilinx.c int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize, · line 144
Quoted 3 lines
drivers/fpga/xilinx.c +3 -0
+       if (!desc->operations || !desc->operations->load) {
+               printf("%s: Missing load operation\n", __func__);
+               return FPGA_FAIL;
I wonder if these error codes should be dropped in favour of the standard ones? Perhaps in a separate patch. E.g. here we could use -ENOSYS.

Definitely. They are bogus.

Thanks,
Michal

Signature · 14 lines

Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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Michal Simek

author

2015-01-14 09:04 UTC #11 lore raw

PATCH 10/11 fpga: xilinx: Show fpga info if defined

In reply to Michal Simek

Show fpga_op->info even if desc->iface_fns is not defined.

Signed-off-by Michal Simek <[email protected]>

---

 drivers/fpga/xilinx.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

drivers/fpga/xilinx.c +5 -4

index 9c95148b25c1..c765a74a25e0 100644
@@ -238,13 +238,14 @@ int xilinx_info(xilinx_desc *desc)
 		if (desc->name)
 			printf("Device name:   \t%s\n", desc->name);
 
-		if (desc->iface_fns) {
+		if (desc->iface_fns)
 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-			if (desc->operations && desc->operations->info)
-				desc->operations->info(desc);
-		} else
+		else
 			printf ("No Device Function Table.\n");
 
+		if (desc->operations && desc->operations->info)
+			desc->operations->info(desc);
+
 		ret_val = FPGA_SUCCESS;
 	} else {
 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);

--
1.8.2.3

Simon Glass

2015-01-14 15:16 UTC #12 lore raw

PATCH 10/11 fpga: xilinx: Show fpga info if defined

Quoted 3 lines · Michal Simek

Show fpga_op->info even if desc->iface_fns is not defined.
Signed-off-by Michal Simek <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Quoted 31 lines

---

 drivers/fpga/xilinx.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

drivers/fpga/xilinx.c +5 -5

index 9c95148b25c1..c765a74a25e0 100644
@@ -238,13 +238,14 @@ int xilinx_info(xilinx_desc *desc)
                if (desc->name)
                        printf("Device name:   \t%s\n", desc->name);
 
-               if (desc->iface_fns) {
+               if (desc->iface_fns)
                        printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-                       if (desc->operations && desc->operations->info)
-                               desc->operations->info(desc);
-               } else
+               else
                        printf ("No Device Function Table.\n");
 
+               if (desc->operations && desc->operations->info)
+                       desc->operations->info(desc);
+
                ret_val = FPGA_SUCCESS;
        } else {
                printf ("%s: Invalid device descriptor\n", __FUNCTION__);
--

1.8.2.3

Michal Simek

author

2015-01-14 09:04 UTC #13 lore raw

PATCH 11/11 fpga: zynqpl: Add support for zc7035

In reply to Michal Simek

From: Siva Durga Prasad Paladugu <[email protected]>

Added support for zc7035

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

Signed-off-by Michal Simek <[email protected]>

---

 board/xilinx/zynq/board.c | 4 ++++
 include/zynqpl.h          | 6 ++++++
 2 files changed, 10 insertions(+)

board/xilinx/zynq/board.c +4 -0

index 258632e52b0b..3a2198f8e830 100644
@@ -24,6 +24,7 @@ static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
 static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
 static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
 static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
+static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
 static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
 static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
 #endif

@@ -49,6 +50,9 @@ int board_init(void)
 	case XILINX_ZYNQ_7030:
 		fpga = fpga030;
 		break;
+	case XILINX_ZYNQ_7035:
+		fpga = fpga035;
+		break;
 	case XILINX_ZYNQ_7045:
 		fpga = fpga045;
 		break;

include/zynqpl.h +6 -0

index d0ff0d9a8bda..1d37a51a04ef 100644
@@ -23,6 +23,7 @@ extern struct xilinx_fpga_op zynq_op;
 #define XILINX_ZYNQ_7015	0x1b
 #define XILINX_ZYNQ_7020	0x7
 #define XILINX_ZYNQ_7030	0xc
+#define XILINX_ZYNQ_7035	0x12
 #define XILINX_ZYNQ_7045	0x11
 #define XILINX_ZYNQ_7100	0x16

@@ -31,6 +32,7 @@ extern struct xilinx_fpga_op zynq_op;
 #define XILINX_XC7Z015_SIZE	28085344/8
 #define XILINX_XC7Z020_SIZE	32364512/8
 #define XILINX_XC7Z030_SIZE	47839328/8
+#define XILINX_XC7Z035_SIZE	106571232/8
 #define XILINX_XC7Z045_SIZE	106571232/8
 #define XILINX_XC7Z100_SIZE	139330784/8

@@ -51,6 +53,10 @@ extern struct xilinx_fpga_op zynq_op;
 { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
 	"7z030" }
 
+#define XILINX_XC7Z035_DESC(cookie) \
+{ xilinx_zynq, devcfg, XILINX_XC7Z035_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z035" }
+
 #define XILINX_XC7Z045_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
 	"7z045" }

--
1.8.2.3

Simon Glass

2015-01-14 15:11 UTC #14 lore raw

PATCH 1/11 fpga: Protect GZIP usage when LOADMK is enabled

In reply to Michal Simek

Quoted 7 lines · Michal Simek

For case where CMD_FPGA_LOADMK is enabled and GZIP disable.
Warning log:
common/built-in.o: In function `do_fpga':
/mnt/disk/u-boot/common/cmd_fpga.c:218: undefined reference to `gunzip'
Signed-off-by Michal Simek <[email protected]>

Reviewed-by Simon Glass <[email protected]>