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ARM: exynos: fix UART address selection for DEBUG_LL

PATCH New Joonyoung Shim 2 participants 3 messages Sep 26, 2014 – Jun 22, 2016

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#0 lore raw

PATCH 1/1 ARM: exynos: fix UART address selection for DEBUG_LL

The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using A7, it can't detect right UART physical address only the part number of CP15. It's possible to solve as checking Cluster ID additionally.

---
 arch/arm/include/debug/exynos.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/include/debug/exynos.S +5 -1
index b17fdb7..60bf3c2 100644
@@ -24,7 +24,11 @@
 		mrc	p15, 0, \tmp, c0, c0, 0
 		and	\tmp, \tmp, #0xf0
 		teq	\tmp, #0xf0		@@ A15
-		ldreq	\rp, =EXYNOS5_PA_UART
+		beq	100f
+		mrc	p15, 0, \tmp, c0, c0, 5
+		and	\tmp, \tmp, #0xf00
+		teq	\tmp, #0x100		@@ A15 + A7 but boot to A7
+100:		ldreq	\rp, =EXYNOS5_PA_UART
 		movne	\rp, #EXYNOS4_PA_UART	@@ EXYNOS4
 		ldr	\rv, =S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 ARM: exynos: fix UART address selection for DEBUG_LL

Hi kukjin,

Quoted 17 lines · Joonyoung Shim

The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using A7, it can't detect right UART physical address only the part number of CP15. It's possible to solve as checking Cluster ID additionally.

---
 arch/arm/include/debug/exynos.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/include/debug/exynos.S +0 -0
index b17fdb7..60bf3c2 100644
@@ -24,7 +24,11 @@
 		mrc	p15, 0, \tmp, c0, c0, 0
 		and	\tmp, \tmp, #0xf0

arch/arm/include/debug/exynos.S line 34

Quoted 10 lines
arch/arm/include/debug/exynos.S +5 -1
 		teq	\tmp, #0xf0		@@ A15
-		ldreq	\rp, =EXYNOS5_PA_UART
+		beq	100f
+		mrc	p15, 0, \tmp, c0, c0, 5
+		and	\tmp, \tmp, #0xf00
+		teq	\tmp, #0x100		@@ A15 + A7 but boot to A7
+100:		ldreq	\rp, =EXYNOS5_PA_UART
 		movne	\rp, #EXYNOS4_PA_UART	@@ EXYNOS4
 		ldr	\rv, =S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0

Any comments?

Thanks.

#2 lore raw

PATCH 1/1 ARM: exynos: fix UART address selection for DEBUG_LL

Quoted 12 lines · Joonyoung Shim

Hi kukjin,

Quoted 9 lines · Joonyoung Shim

The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using A7, it can't detect right UART physical address only the part number of CP15. It's possible to solve as checking Cluster ID additionally.

---
 arch/arm/include/debug/exynos.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

This is an old patch... but still valid and needed on Odroid XU family. Tested by Marek Szyprowski.

Applied, thanks!

BR,
Krzysztof