Skip to contentSkip to conversation

powerpc/c29xpcie: Add secure boot support

PATCH New Mingkai Hu 2 participants 2 messages Nov 26, 2014 – Jan 23, 2015

lore
Share & tools
lore

Mingkai Hu

author
#0 lore raw

PATCH v2 1/1 powerpc/c29xpcie: Add secure boot support

From: Po Liu <[email protected]>

Add NOR and SPI flash secure boot target for C29XPCIE board.

---
 board/freescale/c29xpcie/MAINTAINERS        | 2 ++
 configs/C29XPCIE_NOR_SECBOOT_defconfig      | 4 ++++
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
 include/configs/C29XPCIE.h                  | 2 ++
 4 files changed, 12 insertions(+)
 create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
 create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
board/freescale/c29xpcie/MAINTAINERS +2 -0
index db2e5e3..3308839 100644
@@ -6,3 +6,5 @@ F:	include/configs/C29XPCIE.h
 F:	configs/C29XPCIE_defconfig
 F:	configs/C29XPCIE_NAND_defconfig
 F:	configs/C29XPCIE_SPIFLASH_defconfig
+F:	configs/C29XPCIE_NOR_SECBOOT_defconfig
+F:	configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..86751cf
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..d1a42b2
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
include/configs/C29XPCIE.h +2 -0
index 5d11278..1d8dce8 100644
@@ -579,4 +579,6 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */
Signature · 1 line
2.1.0.27.g96db324