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arch/powerpc: Initialize VSC9953 L2 Switch

PATCH New Codrin Ciubotariu 2 participants 6 messages Jan 21, 2015 – Jan 23, 2015 PowerPC

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Codrin Ciubotariu

author
#0 lore raw

PATCH v4 6/11 arch/powerpc: Initialize VSC9953 L2 Switch

This patch initializes VSC9953 L2 Switch for boards that have CONFIG_VSC9953 defined in their config file.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Changes for v2:
- added patch description;

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:

	- removed define CONFIG_VSC9953 from SoC
	config header;
	- patch title and comment changed to reflect
	the new change;
 arch/powerpc/cpu/mpc8xxx/cpu.c | 5 +++++
 1 file changed, 5 insertions(+)
arch/powerpc/cpu/mpc8xxx/cpu.c +5 -0
index 2d28eb2..c92589f 100644
@@ -15,6 +15,7 @@
 #include <netdev.h>
 #include <asm/cache.h>
 #include <asm/io.h>
+#include <vsc9953.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -271,5 +272,9 @@ int cpu_eth_init(bd_t *bis)
 #ifdef CONFIG_FMAN_ENET
 	fm_standard_init(bis);
 #endif
+
+#ifdef CONFIG_VSC9953
+	vsc9953_init(bis);
+#endif
 	return 0;
 }
Signature · 1 line
1.7.11.7
author
#1 lore raw

PATCH v4 10/11 board/T1040qds: Add VSC9953 support for T1040qds board

This patch configures and initializes the L2 switch on T1040QDS board. The L2 switch ports must be initialized according to the SerDes protocols.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Changes for v2: None

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:

	- add define for VSC9953 L2 Switch driver in
	T1040QDS board config file;
 board/freescale/t1040qds/eth.c | 91 ++++++++++++++++++++++++++++++++++++++++++
 include/configs/T1040QDS.h     |  6 +++
 2 files changed, 97 insertions(+)
board/freescale/t1040qds/eth.c +91 -0
index 2f8e753..8c82934 100644
@@ -18,6 +18,7 @@
 #include <fsl_mdio.h>
 #include <malloc.h>
 #include <asm/fsl_dtsec.h>
+#include <vsc9953.h>
 
 #include "../common/fman.h"
 #include "../common/qixis.h"

@@ -439,6 +440,12 @@ int board_eth_init(bd_t *bis)
 #ifdef CONFIG_FMAN_ENET
 	struct memac_mdio_info memac_mdio_info;
 	unsigned int i;
+#ifdef CONFIG_VSC9953
+	int lane;
+	int phy_addr;
+	phy_interface_t phy_int;
+	struct mii_dev *bus;
+#endif
 
 	printf("Initializing Fman\n");
 	set_brdcfg9_for_gtx_clk();

@@ -493,6 +500,90 @@ int board_eth_init(bd_t *bis)
 		}
 	}
 
+#ifdef CONFIG_VSC9953
+	for (i = 0; i < VSC9953_MAX_PORTS; i++) {
+		lane = -1;
+		phy_addr = 0;
+		phy_int = PHY_INTERFACE_MODE_NONE;
+		switch (i) {
+		case 0:
+		case 1:
+		case 2:
+		case 3:
+			lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A);
+			/* PHYs connected over QSGMII */
+			if (lane >= 0) {
+				phy_addr = CONFIG_SYS_FM1_QSGMII21_PHY_ADDR +
+						i;
+				phy_int = PHY_INTERFACE_MODE_QSGMII;
+				break;
+			}
+			lane = serdes_get_first_lane(FSL_SRDS_1,
+					SGMII_SW1_MAC1 + i);
+
+			if (lane < 0)
+				break;
+
+			/* PHYs connected over QSGMII */
+			if (i != 3 || lane_to_slot[lane] == 7)
+				phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR
+					+ i;
+			else
+				phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR;
+			phy_int = PHY_INTERFACE_MODE_SGMII;
+			break;
+		case 4:
+		case 5:
+		case 6:
+		case 7:
+			lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B);
+			/* PHYs connected over QSGMII */
+			if (lane >= 0) {
+				phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR +
+						i - 4;
+				phy_int = PHY_INTERFACE_MODE_QSGMII;
+				break;
+			}
+			lane = serdes_get_first_lane(FSL_SRDS_1,
+					SGMII_SW1_MAC1 + i);
+			/* PHYs connected over SGMII */
+			if (lane >= 0) {
+				phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR
+						+ i - 3;
+				phy_int = PHY_INTERFACE_MODE_SGMII;
+			}
+			break;
+		case 8:
+			if (serdes_get_first_lane(FSL_SRDS_1,
+						  SGMII_FM1_DTSEC1) < 0)
+				/* FM1 at DTSEC1 is connected to SW1@PORT8 */
+				vsc9953_port_enable(i);
+			break;
+		case 9:
+			if (serdes_get_first_lane(FSL_SRDS_1,
+						  SGMII_FM1_DTSEC2) < 0) {
+				/* Enable L2 On MAC2 using SCFG */
+				struct ccsr_scfg *scfg = (struct ccsr_scfg *)
+						CONFIG_SYS_MPC85xx_SCFG;
+
+				out_be32(&scfg->esgmiiselcr,
+					 in_be32(&scfg->esgmiiselcr) |
+					 (0x80000000));
+				vsc9953_port_enable(i);
+			}
+			break;
+		}
+
+		if (lane >= 0) {
+			bus = mii_dev_for_muxval(lane_to_slot[lane]);
+			vsc9953_port_info_set_mdio(i, bus);
+			vsc9953_port_enable(i);
+		}
+		vsc9953_port_info_set_phy_address(i, phy_addr);
+		vsc9953_port_info_set_phy_int(i, phy_int);
+	}
+
+#endif
 	cpu_eth_init(bis);
 #endif
include/configs/T1040QDS.h +6 -0
index b70bdfe..1dd4f88 100644
@@ -689,6 +689,12 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif
 
+/* Enable VSC9953 L2 Switch driver */
+#define CONFIG_VSC9953
+#define CONFIG_VSC9953_CMD
+#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	0x14
+#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	0x18
+
 /*
  * Dynamic MTD Partition support with mtdparts
  */
Signature · 1 line
1.7.11.7
#2 lore raw

PATCH v4 10/11 board/T1040qds: Add VSC9953 support for T1040qds board

Quoted 7 lines · Codrin Ciubotariu

This patch configures and initializes the L2 switch on T1040QDS board. The L2 switch ports must be initialized according to the SerDes protocols.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Quoted 9 lines

Changes for v2: None

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:

	- add define for VSC9953 L2 Switch driver in
	T1040QDS board config file;

Applied to u-boot-mpc85xx master branch, awaiting upstream.

York

author
#3 lore raw

PATCH v4 11/11 board/T1040rdb: Add VSC9953 support for T1040rdb board

In reply to Codrin Ciubotariu

This patch configures and initializes the L2 switch on T1040rdb board. The external L2 switch ports may be connected to PHYs only over QSGMII, for T1040rdb.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Changes for v2: None

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:
- add define for VSC9953 L2 Switch driver in T1040RDB board config file;

 board/freescale/t104xrdb/eth.c | 50 ++++++++++++++++++++++++++++++++++++++++++
 include/configs/T104xRDB.h     |  8 +++++++
 2 files changed, 58 insertions(+)
board/freescale/t104xrdb/eth.c +50 -0
index f5c0ec8..7581a4cd 100644
@@ -6,11 +6,13 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <asm/fsl_serdes.h>
 #include <asm/immap_85xx.h>
 #include <fm_eth.h>
 #include <fsl_mdio.h>
 #include <malloc.h>
 #include <asm/fsl_dtsec.h>
+#include <vsc9953.h>
 
 #include "../common/fman.h"
 

@@ -20,6 +22,11 @@ int board_eth_init(bd_t *bis)
 	struct memac_mdio_info memac_mdio_info;
 	unsigned int i;
 	int phy_addr = 0;
+#ifdef CONFIG_VSC9953
+	phy_interface_t phy_int;
+	struct mii_dev *bus;
+#endif
+
 	printf("Initializing Fman\n");
 
 	memac_mdio_info.regs =

@@ -81,6 +88,49 @@ int board_eth_init(bd_t *bis)
 							DEFAULT_FM_MDIO_NAME));
 	}
 
+#ifdef CONFIG_VSC9953
+	/* SerDes configured for QSGMII */
+	if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A) >= 0) {
+		for (i = 0; i < 4; i++) {
+			bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
+			phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + i;
+			phy_int = PHY_INTERFACE_MODE_QSGMII;
+
+			vsc9953_port_info_set_mdio(i, bus);
+			vsc9953_port_info_set_phy_address(i, phy_addr);
+			vsc9953_port_info_set_phy_int(i, phy_int);
+			vsc9953_port_enable(i);
+		}
+	}
+	if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B) >= 0) {
+		for (i = 4; i < 8; i++) {
+			bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
+			phy_addr = CONFIG_SYS_FM1_QSGMII21_PHY_ADDR + i - 4;
+			phy_int = PHY_INTERFACE_MODE_QSGMII;
+
+			vsc9953_port_info_set_mdio(i, bus);
+			vsc9953_port_info_set_phy_address(i, phy_addr);
+			vsc9953_port_info_set_phy_int(i, phy_int);
+			vsc9953_port_enable(i);
+		}
+	}
+
+	/* Connect DTSEC1 to L2 switch if it doesn't have a PHY */
+	if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1) < 0)
+		vsc9953_port_enable(8);
+
+	/* Connect DTSEC2 to L2 switch if it doesn't have a PHY */
+	if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC2) < 0) {
+		/* Enable L2 On MAC2 using SCFG */
+		struct ccsr_scfg *scfg = (struct ccsr_scfg *)
+				CONFIG_SYS_MPC85xx_SCFG;
+
+		out_be32(&scfg->esgmiiselcr, in_be32(&scfg->esgmiiselcr) |
+			 (0x80000000));
+		vsc9953_port_enable(9);
+	}
+#endif
+
 	cpu_eth_init(bis);
 #endif
include/configs/T104xRDB.h +8 -0
index 57cdf72..d47f1be 100644
@@ -726,6 +726,14 @@
 #define CONFIG_SYS_RGMII1_PHY_ADDR		0x01
 #define CONFIG_SYS_RGMII2_PHY_ADDR		0x02
 
+/* Enable VSC9953 L2 Switch driver on T1040 SoC */
+#ifdef CONFIG_T1040RDB
+#define CONFIG_VSC9953
+#define CONFIG_VSC9953_CMD
+#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	0x04
+#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	0x08
+#endif
+
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1 at DTSEC4"
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
Signature · 1 line
1.7.11.7
#4 lore raw

PATCH v4 11/11 board/T1040rdb: Add VSC9953 support for T1040rdb board

Quoted 7 lines · Codrin Ciubotariu

This patch configures and initializes the L2 switch on T1040rdb board. The external L2 switch ports may be connected to PHYs only over QSGMII, for T1040rdb.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Quoted 9 lines

Changes for v2: None

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:
- add define for VSC9953 L2 Switch driver in T1040RDB board config file;

Applied to u-boot-mpc85xx master branch, awaiting upstream.

York

#5 lore raw

PATCH v4 6/11 arch/powerpc: Initialize VSC9953 L2 Switch

In reply to Codrin Ciubotariu
Quoted 9 lines · Codrin Ciubotariu

This patch initializes VSC9953 L2 Switch for boards that have CONFIG_VSC9953 defined in their config file.

Signed-off-by Codrin Ciubotariu <[email protected]>

---

Changes for v2:
- added patch description;

Quoted 9 lines

Changes for v3:
- Removed "Change-id" line from comment;

Changes for v4:

	- removed define CONFIG_VSC9953 from SoC
	config header;
	- patch title and comment changed to reflect
	the new change;

Applied to u-boot-mpc85xx master branch, awaiting upstream.

York