Skip to contentSkip to conversation

ls102xa: dcu: Add platform support for DCU on LS1021AQDS board

PATCH New Xiubo Li 2 participants 2 messages Dec 16, 2014 – Jan 24, 2015

lore
Share & tools
lore

Xiubo Li

author
#0 lore raw

PATCH 1/1 ls102xa: dcu: Add platform support for DCU on LS1021AQDS board

This patch adds the CH7301 HDMI options and the common configuration for DCU on LS1021AQDS board.

Signed-off-by Xiubo Li <[email protected]>
Signed-off-by Alison Wang <[email protected]>
Cc Jason Jin <[email protected]>
---
 board/freescale/ls1021aqds/Makefile           |  1 +
 board/freescale/ls1021aqds/dcu.c              | 92 +++++++++++++++++++++++++++
 board/freescale/ls1021aqds/ls1021aqds.c       |  4 ++
 board/freescale/ls1021aqds/ls1021aqds_qixis.h |  2 +
 include/configs/ls1021aqds.h                  | 20 ++++++
 5 files changed, 119 insertions(+)
 create mode 100644 board/freescale/ls1021aqds/dcu.c
board/freescale/ls1021aqds/Makefile +1 -0
index 3b6903c..ab02344 100644
@@ -7,3 +7,4 @@
 obj-y += ls1021aqds.o
 obj-y += ddr.o
 obj-y += eth.o
+obj-$(CONFIG_FSL_DCU_FB) += dcu.o
board/freescale/ls1021aqds/dcu.c new file +92 -0

92 lines not on this page · raw message

board/freescale/ls1021aqds/ls1021aqds.c +4 -0
index 2bc029c..738b71e 100644
@@ -194,6 +194,10 @@ int board_early_init_f(void)
 	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
 
+#ifdef CONFIG_FSL_DCU_FB
+	out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);
+#endif
+
 	/*
 	 * Enable snoop requests and DVM message requests for
 	 * Slave insterface S4 (A7 core cluster)
board/freescale/ls1021aqds/ls1021aqds_qixis.h +2 -0
index 09b3be2..8e482eb 100644
@@ -32,4 +32,6 @@
 
 #define QIXIS_SRDS1CLK_100		0x0
 
+#define QIXIS_DCU_BRDCFG5		0x55
+
 #endif
include/configs/ls1021aqds.h +20 -0
index 5e2c0c3..2ea1134 100644
@@ -402,6 +402,7 @@ unsigned long get_board_ddr_clk(void);
  */
 #define I2C_MUX_PCA_ADDR_PRI		0x77
 #define I2C_MUX_CH_DEFAULT		0x8
+#define I2C_MUX_CH_CH7301		0xC
 
 /*
  * MMC

@@ -468,6 +469,25 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /*
+ * Video
+ */
+#define CONFIG_FSL_DCU_FB
+
+#ifdef CONFIG_FSL_DCU_FB
+#define CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+
+#define CONFIG_FSL_DIU_CH7301
+#define CONFIG_SYS_I2C_DVI_BUS_NUM	0
+#define CONFIG_SYS_I2C_QIXIS_ADDR	0x66
+#define CONFIG_SYS_I2C_DVI_ADDR		0x75
+#endif
+
+/*
  * eTSEC
  */
 #define CONFIG_TSEC_ENET
Signature · 1 line
2.1.0.27.g96db324