ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
PATCH 1/1 ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are only enabled in QSPI boot, and disabled in other boot modes. IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot. This patch will add fdt support for the above rules.
Signed-off-by Alison Wang <[email protected]>
--- arch/arm/cpu/armv7/ls102xa/fdt.c | 13 +++++++++++++ arch/arm/include/asm/arch-ls102xa/config.h | 4 ++++ 2 files changed, 17 insertions(+)
arch/arm/cpu/armv7/ls102xa/fdt.c +13 -0
@@ -133,4 +133,17 @@ void ft_cpu_setup(void *blob, bd_t *bd)do_fixup_by_compat_u32 (blob,"fsl, ls1021a-flexcan" ,"clock-frequency" , busclk /2 ,1 ); + +#ifdef CONFIG_QSPI_BOOT + off =fdt_node_offset_by_compat_reg (blob,FSL_IFC_COMPAT , +CONFIG_SYS_IFC_ADDR ); +fdt_set_node_status (blob, off,FDT_STATUS_DISABLED ,0 ); +#else + off =fdt_node_offset_by_compat_reg (blob,FSL_QSPI_COMPAT , +QSPI0_BASE_ADDR ); +fdt_set_node_status (blob, off,FDT_STATUS_DISABLED ,0 ); + off =fdt_node_offset_by_compat_reg (blob,FSL_DSPI_COMPAT , +DSPI1_BASE_ADDR ); +fdt_set_node_status (blob, off,FDT_STATUS_DISABLED ,0 ); +#endif }
arch/arm/include/asm/arch-ls102xa/config.h +4 -0
@@ -101,4 +101,8 @@#error SoC not defined#endif +#define FSL_IFC_COMPAT "fsl,ifc" +#define FSL_QSPI_COMPAT "fsl,ls1-qspi" +#define FSL_DSPI_COMPAT "fsl,vf610-dspi" +#endif /* _ASM_ARMV7_LS102XA_CONFIG_ */
Signature · 1 line
2.1.0.27.g96db324
PATCH 1/1 ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
Quoted 7 lines · Alison Wang
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are only enabled in QSPI boot, and disabled in other boot modes. IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot. This patch will add fdt support for the above rules.
Signed-off-by Alison Wang <[email protected]>---
Applied to u-boot-fsl-qoriq master branch, awaiting upstream.
York