Zynq SoC changes
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
Michal
The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
Prepare v2015.01 (2015-01-12 09:39:08 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git zynq
for you to fetch changes up to 025216f78e0dacd491908d0d76a3642630cd84dc:
serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
----------------------------------------------------------------
Michal Simek (9):
ARM: zynq: Remove empty line
ARM: zynq: ddrc: Setup half of memory only for ECC case
ARM: zynq: List nand, qspi and jtag boot modes
ARM: zynq: List qspi, smc and nand baseaddresses
ARM: zynq: Show board information by default
ARM: zynq: Use CMD_FS_GENERIC
ARM: zynq: Group ethernet configuration options together
serial: zynq: Use global baudrate instead of hardcoded one
serial: Extend structure comments with register offset
Siva Durga Prasad Paladugu (5):
ARM: zynq: Enable the Neon instructions
ARM: zynq: slcr: Dont modify the reserved bits
ARM: zynq: provide config option to select emio
ARM: zynq: Enable DFU functionality in zynq
ARM: zynq: Add USB lthor download protocol support
arch/arm/cpu/armv7/zynq/Makefile | 1 + arch/arm/cpu/armv7/zynq/cpu.c | 4 ---- arch/arm/cpu/armv7/zynq/ddrc.c | 2 ++ arch/arm/cpu/armv7/zynq/lowlevel_init.S | 26 ++++++++++++++++++++++++++ arch/arm/cpu/armv7/zynq/slcr.c | 2 +- arch/arm/cpu/armv7/zynq/spl.c | 9 +++++++++ arch/arm/include/asm/arch-zynq/hardware.h | 5 +++++ board/xilinx/zynq/board.c | 14 ++++++++++++-- drivers/serial/serial_zynq.c | 30 +++++++----------------------- include/configs/zynq-common.h | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------- 10 files changed, 130 insertions(+), 40 deletions(-) create mode 100644 arch/arm/cpu/armv7/zynq/lowlevel_init.S
Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150121/185b03b4/attachment.pgp>
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: + zynq_zc70x
+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages:
+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor doe
s not support ARM mode `fmrx r1,FPEXC'
+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1
+(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2
+(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2
+(zynq_zc70x) make: *** [sub-make] Error 2
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150122/c825ba54/attachment.pgp>
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2
ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and addPLATFORM_RELFLAGS += -mfpu=neon
to config.mk.
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.
Thanks,
Michal
Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/ab67aac4/attachment.pgp>
Quoted 41 lines · Michal Simek
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon
to config.mk.
Quoted 3 lines
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.
And we have a _really_ good reason for using FPU instructions, yes?
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/99631378/attachment.pgp>
Quoted 42 lines · Tom Rini
Quoted 41 lines · Michal Simek
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon
to config.mk.
Quoted 5 lines
Quoted 3 lines
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.And we have a _really_ good reason for using FPU instructions, yes?
The description for doing that is in the patch but to be honest the biggest problem is that xilinx toolchain has FPU instructions enabled by default. Based on that fpu instructions can be used. For standard xilinx flow FSBL/u-boot - fsbl does that setting.
For debug flow TCL + u-boot we are reaching this issue.
Maybe the second option can be to disable FPU instructions for u-boot compilation but then the problem is moved to next software which is designed to have FPU instructions enabled.
That's why I think it is just better to enable it in u-boot.
Siva: Feel free to correct me if my understanding is not correct.
Thanks,
Michal
Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/7edfec20/attachment.pgp>
Quoted 54 lines · Michal Simek
Quoted 42 lines · Tom Rini
Quoted 41 lines · Michal Simek
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon
to config.mk.Quoted 5 lines
Quoted 3 lines
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.And we have a _really_ good reason for using FPU instructions, yes?
The description for doing that is in the patch but to be honest the biggest problem is that xilinx toolchain has FPU instructions enabled by default. Based on that fpu instructions can be used. For standard xilinx flow FSBL/u-boot - fsbl does that setting.
For debug flow TCL + u-boot we are reaching this issue.
Quoted 6 lines
Maybe the second option can be to disable FPU instructions for u-boot compilation but then the problem is moved to next software which is designed to have FPU instructions enabled.
That's why I think it is just better to enable it in u-boot.Siva: Feel free to correct me if my understanding is not correct.
And for the record and clarity, we're still not actually using the FPU in U-Boot nor intend to, just enabling normal workflows on these platforms, right?
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/bf615b2c/attachment.pgp>
Quoted 60 lines · Tom Rini
Quoted 59 lines · Michal Simek
Quoted 42 lines · Tom Rini
Quoted 41 lines · Michal Simek
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon
to config.mk.Quoted 5 lines
Quoted 3 lines
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.And we have a _really_ good reason for using FPU instructions, yes?
The description for doing that is in the patch but to be honest the biggest problem is that xilinx toolchain has FPU instructions enabled by default. Based on that fpu instructions can be used. For standard xilinx flow FSBL/u-boot - fsbl does that setting.
For debug flow TCL + u-boot we are reaching this issue.Maybe the second option can be to disable FPU instructions for u-boot compilation but then the problem is moved to next software which is designed to have FPU instructions enabled.
That's why I think it is just better to enable it in u-boot.
Quoted 5 lines
Quoted 1 line
Siva: Feel free to correct me if my understanding is not correct.
And for the record and clarity, we're still not actually using the FPU in U-Boot nor intend to, just enabling normal workflows on these platforms, right?
Yes, correct.
M
Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/f984dfe3/attachment.pgp>
Quoted 61 lines · Michal Simek
Quoted 60 lines · Tom Rini
Quoted 59 lines · Michal Simek
Quoted 42 lines · Tom Rini
Quoted 41 lines · Michal Simek
Quoted 29 lines · Tom Rini
Quoted 12 lines · Michal Simek
Hi Tom,
please pull these patches to your tree. I have added there 2 patches for serial. Zynq is only one platform which is using this driver.
Thanks,
MichalThe following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
025216f78e0dacd491908d0d76a3642630cd84dc:serial: Extend structure comments with register offset (2015-01-21 10:36:36 +0100)
I can't find a toolchain that doesn't give me something like:
arm: +zynq_zc70x(quoted diff) +2
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S: Assembler messages: +(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor does not support ARM mode `fmrx r1,FPEXC'
Review
Quoted 5 lines
(quoted diff) +5
-0+(zynq_zc70x) arch/arm/cpu/armv7/zynq/lowlevel_init.S:21: Error: selected processor does not support ARM mode `fmxr FPEXC,r1' +(zynq_zc70x) make[3]: *** [arch/arm/cpu/armv7/zynq/lowlevel_init.o] Error 1 +(zynq_zc70x) make[2]: *** [arch/arm/cpu/armv7/zynq] Error 2 +(zynq_zc70x) make[1]: *** [arch/arm/cpu/armv7] Error 2 +(zynq_zc70x) make: *** [sub-make] Error 2ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon
to config.mk.Quoted 5 lines
Quoted 3 lines
This should solve the problem with compilation.
No problem to add this patch as the first in this serial not to break bisectability of the tree.And we have a _really_ good reason for using FPU instructions, yes?
The description for doing that is in the patch but to be honest the biggest problem is that xilinx toolchain has FPU instructions enabled by default. Based on that fpu instructions can be used. For standard xilinx flow FSBL/u-boot - fsbl does that setting.
For debug flow TCL + u-boot we are reaching this issue.Maybe the second option can be to disable FPU instructions for u-boot compilation but then the problem is moved to next software which is designed to have FPU instructions enabled.
That's why I think it is just better to enable it in u-boot.
Quoted 7 lines
Quoted 5 lines
Quoted 1 line
Siva: Feel free to correct me if my understanding is not correct.
And for the record and clarity, we're still not actually using the FPU in U-Boot nor intend to, just enabling normal workflows on these platforms, right?
Yes, correct.
OK, good, waiting for the new PR then, thanks!
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150123/e8220ec0/attachment.pgp>
[U-Boot] [GIT PULL] Zynq SoC changes v2
Hi Tom,
here is the second pull request for Zynq.
I have tested all patches by buildman(log below) with a kernel toolchain
[u-boot]$ arm-unknown-linux-gnueabi-gcc --version
arm-unknown-linux-gnueabi-gcc (GCC) 4.6.3
Copyright (C) 2011 Free Software Foundation, Inc.
I have put together that config.mk patch and enabling neon instructions.
I have also added that 2 patches for serial. Zynq is only platfrom which is using this driver.
Thanks,
Michal
[u-boot]$ ./tools/buildman/buildman -b xnext/zynq zynq -sSe boards.cfg is up to date. Nothing to do.
Summary of 15 commits for 7 boards (7 threads, 2 jobs per thread) 01: Prepare v2015.01
02: ARM: zynq: Enable the Neon instructions
arm: (for 7/7 boards) all +51.4 bss -0.6 rodata +20.0 spl/u-boot-spl:all +52.0 spl/u-boot-spl:rodata +20.0 spl/u-boot-spl:text +32.0 text +32.0
03: ARM: zynq: Remove empty line
04: ARM: zynq: ddrc: Setup half of memory only for ECC case
arm: (for 7/7 boards) all +12.6 bss +0.6 text +12.0
05: ARM: zynq: slcr: Dont modify the reserved bits
06: ARM: zynq: List nand, qspi and jtag boot modes
arm: (for 7/7 boards) spl/u-boot-spl:all +47.4 spl/u-boot-spl:text +47.4
07: ARM: zynq: List qspi, smc and nand baseaddresses
08: ARM: zynq: Show board information by default
arm: (for 7/7 boards) all +66.3 bss +2.3 data +4.0 rodata +20.0 text +40.0
09: ARM: zynq: Use CMD_FS_GENERIC
arm: (for 7/7 boards) all +972.0 bss -0.6 data +80.0 rodata +732.6 text +160.0
10: ARM: zynq: Group ethernet configuration options together
arm: (for 7/7 boards) all +26.3 bss +0.6 rodata +2.3 text +23.4
11: ARM: zynq: provide config option to select emio
12: ARM: zynq: Enable DFU functionality in zynq
arm: (for 7/7 boards) all +1804167.1 bss +1797574.9 data +181.7 rodata +822.0 text +5588.6
13: ARM: zynq: Add USB lthor download protocol support
arm: (for 7/7 boards) all +2383.7 bss +148.6 data +54.9 rodata +447.7 text +1732.6
14: serial: zynq: Use global baudrate instead of hardcoded one
arm: (for 7/7 boards) all -26.3 bss -2.3 rodata -8.0 spl/u-boot-spl:all -16.0 spl/u-boot-spl:rodata -8.0 spl/u-boot-spl:text -8.0 text -16.015: serial: Extend structure comments with register offset (no errors to report)
The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
Prepare v2015.01 (2015-01-12 09:39:08 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git zynq
for you to fetch changes up to a2425e6207d7c75906a15410f4c8c0a5d0519349:
serial: Extend structure comments with register offset (2015-01-26 08:55:59 +0100)
----------------------------------------------------------------
Michal Simek (10):
ARM: zynq: Enable the Neon instructions
ARM: zynq: Remove empty line
ARM: zynq: ddrc: Setup half of memory only for ECC case
ARM: zynq: List nand, qspi and jtag boot modes
ARM: zynq: List qspi, smc and nand baseaddresses
ARM: zynq: Show board information by default
ARM: zynq: Use CMD_FS_GENERIC
ARM: zynq: Group ethernet configuration options together
serial: zynq: Use global baudrate instead of hardcoded one
serial: Extend structure comments with register offset
Siva Durga Prasad Paladugu (4):
ARM: zynq: slcr: Dont modify the reserved bits
ARM: zynq: provide config option to select emio
ARM: zynq: Enable DFU functionality in zynq
ARM: zynq: Add USB lthor download protocol support
arch/arm/cpu/armv7/zynq/Makefile | 1 + arch/arm/cpu/armv7/zynq/config.mk | 7 +++++++ arch/arm/cpu/armv7/zynq/cpu.c | 4 ---- arch/arm/cpu/armv7/zynq/ddrc.c | 2 ++ arch/arm/cpu/armv7/zynq/lowlevel_init.S | 26 ++++++++++++++++++++++++++ arch/arm/cpu/armv7/zynq/slcr.c | 2 +- arch/arm/cpu/armv7/zynq/spl.c | 9 +++++++++ arch/arm/include/asm/arch-zynq/hardware.h | 5 +++++ board/xilinx/zynq/board.c | 14 ++++++++++++-- drivers/serial/serial_zynq.c | 30 +++++++----------------------- include/configs/zynq-common.h | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------- 11 files changed, 137 insertions(+), 40 deletions(-) create mode 100644 arch/arm/cpu/armv7/zynq/config.mk create mode 100644 arch/arm/cpu/armv7/zynq/lowlevel_init.S
Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150126/ac5be4a5/attachment.pgp>
[U-Boot] [GIT PULL] Zynq SoC changes v2
Quoted 51 lines · Michal Simek
Hi Tom,
here is the second pull request for Zynq.
I have tested all patches by buildman(log below) with a kernel toolchain[u-boot]$ arm-unknown-linux-gnueabi-gcc --version
arm-unknown-linux-gnueabi-gcc (GCC) 4.6.3
Copyright (C) 2011 Free Software Foundation, Inc.I have put together that config.mk patch and enabling neon instructions.
I have also added that 2 patches for serial. Zynq is only platfrom which is using this driver.
Thanks,
Michal[u-boot]$
./tools/buildman/buildman-b xnext/zynq zynq -sSe boards.cfg is up to date. Nothing to do.
Summary of 15 commits for 7 boards (7 threads, 2 jobs per thread) 01: Prepare v2015.01
02: ARM: zynq: Enable the Neon instructionsarm: (for 7/7 boards) all +51.4 bss -0.6 rodata +20.0 spl/u-boot-spl:all +52.0 spl/u-boot-spl:rodata +20.0 spl/u-boot-spl:text +32.0 text +32.0 03: ARM: zynq: Remove empty line 04: ARM: zynq: ddrc: Setup half of memory only for ECC case arm: (for 7/7 boards) all +12.6 bss +0.6 text +12.0 05: ARM: zynq: slcr: Dont modify the reserved bits 06: ARM: zynq: List nand, qspi and jtag boot modes arm: (for 7/7 boards) spl/u-boot-spl:all +47.4 spl/u-boot-spl:text +47.4 07: ARM: zynq: List qspi, smc and nand baseaddresses 08: ARM: zynq: Show board information by default arm: (for 7/7 boards) all +66.3 bss +2.3 data +4.0 rodata +20.0 text +40.0 09: ARM: zynq: Use CMD_FS_GENERIC arm: (for 7/7 boards) all +972.0 bss -0.6 data +80.0 rodata +732.6 text +160.0 10: ARM: zynq: Group ethernet configuration options together arm: (for 7/7 boards) all +26.3 bss +0.6 rodata +2.3 text +23.4 11: ARM: zynq: provide config option to select emio 12: ARM: zynq: Enable DFU functionality in zynq arm: (for 7/7 boards) all +1804167.1 bss +1797574.9 data +181.7 rodata +822.0 text +5588.6 13: ARM: zynq: Add USB lthor download protocol support arm: (for 7/7 boards) all +2383.7 bss +148.6 data +54.9 rodata +447.7 text +1732.6 14: serial: zynq: Use global baudrate instead of hardcoded one arm: (for 7/7 boards) all -26.3 bss -2.3 rodata -8.0 spl/u-boot-spl:all -16.0 spl/u-boot-spl:rodata -8.0 spl/u-boot-spl:text -8.0 text -16.015: serial: Extend structure comments with register offset (no errors to report)
The following changes since commit
92fa7f53f1f3f03296f8ffb14bdf1baefab83368:Prepare v2015.01 (2015-01-12 09:39:08 -0500)
Quoted 8 lines
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.gitzynqfor you to fetch changes up to
a2425e6207d7c75906a15410f4c8c0a5d0519349:serial: Extend structure comments with register offset (2015-01-26 08:55:59 +0100)
Applied to u-boot/master, thanks!
Quoted 4 lines
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Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150127/f5101b35/attachment.pgp>
Quoted 10 lines · monstr at monstr.eu
Quoted 7 lines · Tom Rini
I can't find a toolchain that doesn't give me something like: arm: +
zynq_zc70x+(zynq_zc70x)arch/arm/cpu/armv7/zynq/lowlevel_init.S:
Assembler messages: +(zynq_zc70x)arch/arm/cpu/armv7/zynq/lowlevel_init.S:19: Error: selected processor doe s not support ARM mode `fmrx r1,FPEXC' +(zynq_zc70x)On Wed, Jan 21, 2015 at 10:38:47AM +0100, Michal Simek wrote:
Quoted 7 lines
ok. I see. We have neon instructions enabled by default in xilinx toolchain. I have sent the patch which create and add
PLATFORM_RELFLAGS+= -mfpu=neon to config.mk.This should solve the problem with compilation. No problem to add this patch as the first in this serial not to break bisectability of the tree.
I think you can add something like,
.fpu neon-vfpv4 # or whatever FPU is appropriate.
to the lowlevel_init.S and then you can use the 'fmxr' instruction even without compiler flags (and of course gas needs to know about it). It makes sense if the platform turns on floating point by default and you need to disable it in lowlevel_init.S and don't want anyone else to be using floating point.
... but I am not sure what exactly is going on so maybe it is not a good fit here?
Fwiw,
Bill Pringlemeir.