mtd: atmel_nand: introduce a new compatible string for sama5d4 chip

PATCH New Josh Wu 3 participants 9 messages Jan 19, 2015 – Jan 26, 2015

Subsystems (5)

Device tree bindings Memory technology devices (MTD) Arm/Microchip (AT91) SoC support NAND flash +1 more subsystems

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Josh Wu

author

2015-01-19 08:33 UTC #0 lore raw

PATCH 1/2 mtd: atmel_nand: introduce a new compatible string for sama5d4 chip

Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page. So we add a DT property to indicate this hardware character.

If the PMECC support correct bitflip erased page (all data are 0xff). Then we can use the PMECC correct the page and skip the erased page check.

Signed-off-by Josh Wu <[email protected]>

---

 .../devicetree/bindings/mtd/atmel-nand.txt         |  2 +-
 drivers/mtd/nand/atmel_nand.c                      | 25 +++++++++++++++++++++-
 2 files changed, 25 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/mtd/atmel-nand.txt +1 -1

index 1fe6dde..7d4c8eb 100644
@@ -1,7 +1,7 @@
 Atmel NAND flash
 
 Required properties:
-- compatible : "atmel,at91rm9200-nand".
+- compatible : should be "atmel,at91rm9200-nand" or "atmel,sama5d4-nand".
 - reg : should specify localbus address and size used for the chip,
 	and hardware ECC controller if available.
 	If the hardware ECC is PMECC, it should contain address and size for

drivers/mtd/nand/atmel_nand.c +24 -1

index 044c9d1..8d5b008 100644
@@ -63,6 +63,10 @@ module_param(on_flash_bbt, int, 0);
 #include "atmel_nand_ecc.h"	/* Hardware ECC registers */
 #include "atmel_nand_nfc.h"	/* Nand Flash Controller definition */
 
+struct atmel_nand_caps {
+	bool pmecc_correct_erase_page;
+};
+
 /* oob layout for large page size
  * bad block info is on bytes 0 and 1
  * the bytes have to be consecutives to avoid

@@ -124,6 +128,7 @@ struct atmel_nand_host {
 
 	struct atmel_nfc	*nfc;
 
+	struct atmel_nand_caps	*caps;
 	bool			has_pmecc;
 	u8			pmecc_corr_cap;
 	u16			pmecc_sector_size;

@@ -849,6 +854,10 @@ static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf,
 	uint8_t *buf_pos;
 	int max_bitflips = 0;
 
+	/* If can correct bitfilps from erased page, do the normal check */
+	if (host->caps->pmecc_correct_erase_page)
+		goto normal_check;
+
 	for (i = 0; i < nand_chip->ecc.total; i++)
 		if (ecc[i] != 0xff)
 			goto normal_check;

@@ -1474,6 +1483,8 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)
 		ecc_writel(host->ecc, CR, ATMEL_ECC_RST);
 }
 
+static const struct of_device_id atmel_nand_dt_ids[];
+
 static int atmel_of_init_port(struct atmel_nand_host *host,
 			      struct device_node *np)
 {

@@ -1483,6 +1494,9 @@ static int atmel_of_init_port(struct atmel_nand_host *host,
 	struct atmel_nand_data *board = &host->board;
 	enum of_gpio_flags flags = 0;
 
+	host->caps = (struct atmel_nand_caps *)
+		of_match_device(atmel_nand_dt_ids, host->dev)->data;
+
 	if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) {
 		if (val >= 32) {
 			dev_err(host->dev, "invalid addr-offset %u\n", val);

@@ -2287,8 +2301,17 @@ static int atmel_nand_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static struct atmel_nand_caps at91rm9200_caps = {
+	.pmecc_correct_erase_page = false,
+};
+
+static struct atmel_nand_caps sama5d4_caps = {
+	.pmecc_correct_erase_page = true,
+};
+
 static const struct of_device_id atmel_nand_dt_ids[] = {
-	{ .compatible = "atmel,at91rm9200-nand" },
+	{ .compatible = "atmel,at91rm9200-nand", .data = &at91rm9200_caps },
+	{ .compatible = "atmel,sama5d4-nand", .data = &sama5d4_caps },
 	{ /* sentinel */ }
 };

Signature · 1 line

1.9.1

Josh Wu

author

2015-01-19 08:33 UTC #1 lore raw

PATCH 2/2 ARM: at91: sama5d4: dts: change the nand compatible string

As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.

Signed-off-by Josh Wu <[email protected]>

---

 arch/arm/boot/dts/sama5d4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/sama5d4.dtsi +1 -1

index 1b0f30c..02d67c2 100644
@@ -267,7 +267,7 @@
 		};
 
 		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;

Signature · 1 line

1.9.1

Brian Norris

2015-01-20 20:49 UTC #2 lore raw

PATCH 2/2 ARM: at91: sama5d4: dts: change the nand compatible string

Quoted 14 lines · Josh Wu

As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.
Signed-off-by Josh Wu <[email protected]>
---
 arch/arm/boot/dts/sama5d4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/sama5d4.dtsi +0 -0
index 1b0f30c..02d67c2 100644

arch/arm/boot/dts/sama5d4.dtsi line 270

Quoted 5 lines

arch/arm/boot/dts/sama5d4.dtsi +1 -1

@@ -267,7 +267,7 @@
 		};
 
 		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand";

Wouldn't it make sense to include both compatible strings, so that old kernels can still bind to it? The newer IP only adds a new ECC feature, but the driver still can work fine without handling it, right?

arch/arm/boot/dts/sama5d4.dtsi line 273

Quoted 3 lines

arch/arm/boot/dts/sama5d4.dtsi +0 -0

 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;

Brian

Josh Wu

author

2015-01-21 03:55 UTC #3 lore raw

PATCH 2/2 ARM: at91: sama5d4: dts: change the nand compatible string

Hi, Brain

Quoted 17 lines · Brian Norris

Quoted 16 lines · Josh Wu
As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.
Signed-off-by Josh Wu <[email protected]>
---
  arch/arm/boot/dts/sama5d4.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/sama5d4.dtsi +0 -0
index 1b0f30c..02d67c2 100644
@@ -267,7 +267,7 @@
  		};
 

Quoted 5 lines

arch/arm/boot/dts/sama5d4.dtsi line 270
Quoted 3 lines
arch/arm/boot/dts/sama5d4.dtsi +1 -1
  		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand";
Wouldn't it make sense to include both compatible strings, so that old kernels can still bind to it?

yes, that make sense. I'll add it.

Quoted 2 lines

The newer IP only adds a new ECC feature,
but the driver still can work fine without handling it, right?

so far it works fine without this new feature. But I am not 100% sure for this :-)

Best Regards,
Josh Wu

Quoted 5 lines

arch/arm/boot/dts/sama5d4.dtsi line 273
Quoted 4 lines
arch/arm/boot/dts/sama5d4.dtsi +0 -0
  			#address-cells = <1>;
  			#size-cells = <1>;
  			ranges;
Brian

Josh Wu

author

2015-01-22 10:41 UTC #4 lore raw

PATCH v2 1/1 ARM: at91: sama5d4: dts: change the nand compatible string

In reply to Josh Wu

As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.

Signed-off-by Josh Wu <[email protected]>

---

Changes in v2:
- still keep the old rm9200 nand compatible string for compatible old driver.

 arch/arm/boot/dts/sama5d4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/sama5d4.dtsi +1 -1

index 1b0f30c..e40b1da 100644
@@ -267,7 +267,7 @@
 		};
 
 		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;

Signature · 1 line

1.9.1

Nicolas Ferre

2015-01-22 11:01 UTC #5 lore raw

PATCH v2 1/1 ARM: at91: sama5d4: dts: change the nand compatible string

Le 22/01/2015 11:41, Josh Wu a ?crit :

Quoted 4 lines

As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.
Signed-off-by Josh Wu <[email protected]>

Acked-by Nicolas Ferre <[email protected]>

Brian,
I suppose that it makes sense to keep this patch with the previous one. So, can you take it in your tree?

Otherwise, it can take the at91 -> arm-soc route.

Bye,

Quoted 22 lines

---

Changes in v2:
- still keep the old rm9200 nand compatible string for compatible old driver.

 arch/arm/boot/dts/sama5d4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/sama5d4.dtsi +1 -1

index 1b0f30c..e40b1da 100644
@@ -267,7 +267,7 @@
 		};
 
 		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;

Signature · 1 line

Nicolas Ferre

Nicolas Ferre

2015-01-26 15:07 UTC #6 lore raw

PATCH v2 1/1 ARM: at91: sama5d4: dts: change the nand compatible string

Le 22/01/2015 12:01, Nicolas Ferre a ?crit :

Quoted 6 lines

Le 22/01/2015 11:41, Josh Wu a ?crit :
Quoted 4 lines
As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.
Signed-off-by Josh Wu <[email protected]>

Quoted 7 lines

Acked-by Nicolas Ferre <[email protected]>
Brian,
I suppose that it makes sense to keep this patch with the previous one. So, can you take it in your tree?
Otherwise, it can take the at91 -> arm-soc route.

Bryan,

I take it with me right now and try to send it to arm-soc for 3.20.

Best regards,

Quoted 24 lines

Quoted 22 lines

---

Changes in v2:
- still keep the old rm9200 nand compatible string for compatible old driver.

 arch/arm/boot/dts/sama5d4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/sama5d4.dtsi +1 -1

index 1b0f30c..e40b1da 100644
@@ -267,7 +267,7 @@
 		};
 
 		nand0: nand at 80000000 {
-			compatible = "atmel,at91rm9200-nand";
+			compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;

Signature · 1 line

Nicolas Ferre

Brian Norris

2015-01-26 17:12 UTC #7 lore raw

PATCH v2 1/1 ARM: at91: sama5d4: dts: change the nand compatible string

Quoted 14 lines · Nicolas Ferre

Le 22/01/2015 12:01, Nicolas Ferre a ?crit :
Quoted 13 lines
Le 22/01/2015 11:41, Josh Wu a ?crit :
Quoted 4 lines
As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip.
Signed-off-by Josh Wu <[email protected]>
Acked-by Nicolas Ferre <[email protected]>
Brian,
I suppose that it makes sense to keep this patch with the previous one. So, can you take it in your tree?
Otherwise, it can take the at91 -> arm-soc route.

I actually would prefer that. The changes are sane enough by themselves, and I don't often touch the arch/arm DTS files.

Quoted 1 line

I take it with me right now and try to send it to arm-soc for 3.20.

That's fine. Thanks.

Brian

Brian Norris

Applied

2015-01-20 20:47 UTC #8 lore raw

PATCH 1/2 mtd: atmel_nand: introduce a new compatible string for sama5d4 chip

In reply to Josh Wu

Quoted 8 lines · Josh Wu

Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page. So we add a DT property to indicate this hardware character.
If the PMECC support correct bitflip erased page (all data are 0xff). Then we can use the PMECC correct the page and skip the erased page check.
Signed-off-by Josh Wu <[email protected]>

Pushed to l2-mtd.git.

Brian