FFTW optimized for ARM and NEON FPU
Hello,
I am working on a cortex-a9 (zynq SoC, mainly zc706)
I faced fairly slow computations of FFT using this library with the default configuration (20MFlops).
I modified package/fftw.mk to optimize the library compilation as long as an FPU is available,
NEON in this case: this increased the number of MFlops to 500-600.
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guillaume william bres-saix software engineer NIST - Time & Frequency div. 325 Broadway, Boulder, CO 80305. -------------- next part -------------- A non-text attachment was scrubbed... Name: fftw.patch Type: text/x-diff Size: 665 bytes Desc: not available URL: <http://lists.busybox.net/pipermail/buildroot/attachments/20150223/11a9087c/attachment.bin>
+FFTW_CONF_OPTS+= ARM_FLOAT_ABI=softfp
Shouldn't it use hardfp?
https://wiki.debian.org/ArmHardFloatPort/VfpComparison
Am 24.02.2015 um 04:57 schrieb guillaume william brs:
Quoted 18 lines
Hello,
I am working on a cortex-a9 (zynq SoC, mainly zc706) I faced fairly slow computations of FFT using this library with the default configuration (20MFlops).
I modified
package/fftw.mkto optimize the library compilation as long as an FPU is available,
NEON in this case: this increased the number of MFlops to 500-600._______________________________________________
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Guillaume, All,
Sorry for the delay in the response...
On 2015-02-23 20:57 -0700, guillaume william brs spake thusly:
Quoted 7 lines
I am working on a cortex-a9 (zynq SoC, mainly zc706)
I faced fairly slow computations of FFT using this library with the default configuration (20MFlops).I modified
package/fftw.mkto optimize the library compilation as long as an FPU is available,
NEON in this case: this increased the number of MFlops to 500-600.
There's recently been another attempt at making fftw more efficient:
http://patchwork.ozlabs.org/patch/450317/
So, I've decided to have a look if we had other patches for fftw. And it turned out there's yours! ;-)
So, I've hada look and have some comments, see below...
Quoted 10 lines
Signature · 4 lines
guillaume william bres-saix software engineer NIST - Time & Frequency div. 325 Broadway, Boulder, CO 80305.
fftw_fpu.mk line 14
Quoted 5 lines
fftw_fpu.mk renamed from fftw.mk +2
-0@@ -10,4 +10,17 @@ FFTW_LICENSE = GPLv2+ FFTW_LICENSE_FILES = COPYING +ifeq ($(BR2_ARM_ENABLE_NEON),y) +FFTW_CONF_OPTS+= --enable-threads
This should be conditional on BR2_TOOLCHAIN_HAS_THREADS; it has nothing to do with NEON.
fftw_fpu.mk line 17
Quoted 3 lines
fftw_fpu.mk renamed from fftw.mk +3
-0+FFTW_CONF_OPTS+= --with-cpu=cortex-a9 +FFTW_CONF_OPTS+= --with-mode=arm +FFTW_CONF_OPTS+= --enable-languages=c,c++
fftw does not seem to have such options...
fftw_fpu.mk line 19
Quoted 2 lines
fftw_fpu.mk renamed from fftw.mk +2
-0+FFTW_CONF_OPTS+= ARM_CPU_TYPE=cortex-a9 +FFTW_CONF_OPTS+= ARM_FLOAT_ABI=softfp
Those two variables are nowhere to be used in fftw either...
fftw_fpu.mk line 20
Quoted 1 line
fftw_fpu.mk renamed from fftw.mk +1
-0+FFTW_CONF_OPTS+= --disable-fortran
OK.
fftw_fpu.mk line 21
Quoted 1 line
fftw_fpu.mk renamed from fftw.mk +1
-0+FFTW_CONF_OPTS+= --enable-single
This one is handled in the patch I pointed to earlier.
fftw_fpu.mk line 23
Quoted 2 lines
fftw_fpu.mk renamed from fftw.mk +2
-0+FFTW_CONF_OPTS+= --enable-neon +FFTW_CONF_OPTS+= CFLAGS="$(TARGET_CFLAGS)-Ofast -mfpu=neon -mfloat-abi=softfp"
Hmm... -mfpu and -mfloat-abi should not be needed, since they are already taken care of:
- for internal toolchains, they are set as the defaults for gcc;
- for external toolchains, they are automatically added by our wrapper.
Also, specifying them could be conflicting with the defaults.
I'll see to get this in order and will resubmit...
Regards,
Yann E. MORIN.
Quoted 8 lines
fftw_fpu.mk renamed from fftw.mk +2
-0+endif + $(eval $(autotools-package))_______________________________________________
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