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Couple of DRA7 hwmod patches on Timers

PATCH New Suman Anna 2 participants 8 messages Mar 16, 2015 – Mar 24, 2015

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Suman Anna

author
#0 lore raw

cover Couple of DRA7 hwmod patches on Timers

Hi Paul,

Following are couple of DRA7 hwmod patches for the GPTimers. Patches based on 4.0-rc1.

The first patch adds the data for timers 13 through 16, the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot [1]. The boot hang can also be fixed by checking the return status of pm_runtime_get_sync() in the OMAP dmtimer probe, I will post a separate fix for that.

Second patch is a minor fix.

regards
Suman

[1] http://pastebin.ubuntu.com/10611882/

Suman Anna (2):
ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 98 ++++++++++++++++++++++++++++++-
 1 file changed, 97 insertions(+), 1 deletion(-)
Signature · 1 line
2.3.2
author
#1 lore raw

PATCH 1/2 ARM: DRA7: hwmod: Add data for GPTimers 13 through 16

Add the hwmod data for GPTimers 13, 14, 15 and 16. All these timers are present in the L4PER3 clock domain.

The corresponding DT nodes are already present but disabled.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 96 +++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +96 -0
index e8692e7675b8..d0f03e73add4 100644
@@ -1958,6 +1958,66 @@ static struct omap_hwmod dra7xx_timer11_hwmod = {
 	},
 };
 
+/* timer13 */
+static struct omap_hwmod dra7xx_timer13_hwmod = {
+	.name		= "timer13",
+	.class		= &dra7xx_timer_hwmod_class,
+	.clkdm_name	= "l4per3_clkdm",
+	.main_clk	= "timer13_gfclk_mux",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4PER3_TIMER13_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4PER3_TIMER13_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/* timer14 */
+static struct omap_hwmod dra7xx_timer14_hwmod = {
+	.name		= "timer14",
+	.class		= &dra7xx_timer_hwmod_class,
+	.clkdm_name	= "l4per3_clkdm",
+	.main_clk	= "timer14_gfclk_mux",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4PER3_TIMER14_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4PER3_TIMER14_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/* timer15 */
+static struct omap_hwmod dra7xx_timer15_hwmod = {
+	.name		= "timer15",
+	.class		= &dra7xx_timer_hwmod_class,
+	.clkdm_name	= "l4per3_clkdm",
+	.main_clk	= "timer15_gfclk_mux",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4PER3_TIMER15_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4PER3_TIMER15_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/* timer16 */
+static struct omap_hwmod dra7xx_timer16_hwmod = {
+	.name		= "timer16",
+	.class		= &dra7xx_timer_hwmod_class,
+	.clkdm_name	= "l4per3_clkdm",
+	.main_clk	= "timer16_gfclk_mux",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4PER3_TIMER16_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4PER3_TIMER16_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
 /*
  * 'uart' class
  *
@@ -3112,6 +3172,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer11 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per3 -> timer13 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer13 = {
+	.master		= &dra7xx_l4_per3_hwmod,
+	.slave		= &dra7xx_timer13_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per3 -> timer14 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer14 = {
+	.master		= &dra7xx_l4_per3_hwmod,
+	.slave		= &dra7xx_timer14_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per3 -> timer15 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer15 = {
+	.master		= &dra7xx_l4_per3_hwmod,
+	.slave		= &dra7xx_timer15_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per3 -> timer16 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer16 = {
+	.master		= &dra7xx_l4_per3_hwmod,
+	.slave		= &dra7xx_timer16_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per1 -> uart1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart1 = {
 	.master		= &dra7xx_l4_per1_hwmod,
@@ -3350,6 +3442,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per1__timer9,
 	&dra7xx_l4_per1__timer10,
 	&dra7xx_l4_per1__timer11,
+	&dra7xx_l4_per3__timer13,
+	&dra7xx_l4_per3__timer14,
+	&dra7xx_l4_per3__timer15,
+	&dra7xx_l4_per3__timer16,
 	&dra7xx_l4_per1__uart1,
 	&dra7xx_l4_per1__uart2,
 	&dra7xx_l4_per1__uart3,
Signature · 1 line
2.3.2
maintainer
#2 lore raw

PATCH 1/2 ARM: DRA7: hwmod: Add data for GPTimers 13 through 16

Quoted 9 lines · Suman Anna

Add the hwmod data for GPTimers 13, 14, 15 and 16. All these timers are present in the L4PER3 clock domain.

The corresponding DT nodes are already present but disabled.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 96 +++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)

Thanks, queued for v4.1.

- Paul

author
#3 lore raw

PATCH 2/2 ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

In reply to Suman Anna

GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself).

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +1 -1
index d0f03e73add4..2875d4bdb924 100644
@@ -1841,7 +1841,7 @@ static struct omap_hwmod dra7xx_timer3_hwmod = {
 /* timer4 */
 static struct omap_hwmod dra7xx_timer4_hwmod = {
 	.name		= "timer4",
-	.class		= &dra7xx_timer_secure_hwmod_class,
+	.class		= &dra7xx_timer_hwmod_class,
 	.clkdm_name	= "l4per_clkdm",
 	.main_clk	= "timer4_gfclk_mux",
 	.prcm = {
Signature · 1 line
2.3.2
maintainer
#4 lore raw

PATCH 2/2 ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

Quoted 5 lines · Suman Anna

GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself).

This one results in compiler warnings:

arch/arm/mach-omap2/omap_hwmod_7xx_data.c:1776:32: warning:
?dra7xx_timer_secure_hwmod_class? defined but not used [-Wunused-variable]
static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = {

Have queued the following for v4.1.

- Paul

From: Suman Anna <[email protected]>
Date: Mon, 16 Mar 2015 15:54:54 -0500
Subject: [PATCH] ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself).

[paul at pwsan.com: dropped dra7xx_timer_secure_hwmod_class and
dra7xx_timer_secure_sysc to avoid compiler warnings]

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +1 -16
index d0f03e73add4..701234d8db1b 100644
@@ -1763,21 +1763,6 @@ static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = {
 	.sysc	= &dra7xx_timer_1ms_sysc,
 };
 
-static struct omap_hwmod_class_sysconfig dra7xx_timer_secure_sysc = {
-	.rev_offs	= 0x0000,
-	.sysc_offs	= 0x0010,
-	.sysc_flags	= (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
-			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-			   SIDLE_SMART_WKUP),
-	.sysc_fields	= &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = {
-	.name	= "timer",
-	.sysc	= &dra7xx_timer_secure_sysc,
-};
-
 static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = {
 	.rev_offs	= 0x0000,
 	.sysc_offs	= 0x0010,
@@ -1841,7 +1826,7 @@ static struct omap_hwmod dra7xx_timer3_hwmod = {
 /* timer4 */
 static struct omap_hwmod dra7xx_timer4_hwmod = {
 	.name		= "timer4",
-	.class		= &dra7xx_timer_secure_hwmod_class,
+	.class		= &dra7xx_timer_hwmod_class,
 	.clkdm_name	= "l4per_clkdm",
 	.main_clk	= "timer4_gfclk_mux",
 	.prcm = {
Signature · 1 line
2.1.4
author
#5 lore raw

PATCH 2/2 ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

Quoted 8 lines · Paul Walmsley
Quoted 5 lines · Suman Anna

GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself).

Quoted 7 lines

This one results in compiler warnings:

arch/arm/mach-omap2/omap_hwmod_7xx_data.c:1776:32: warning:
?dra7xx_timer_secure_hwmod_class? defined but not used [-Wunused-variable]
static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = {

Have queued the following for v4.1.

Thanks Paul. I will add it back when I post the hwmod for Timer 12, I had the Timer12 locally in my tree, so missed the warning.

regards
Suman

Quoted 56 lines

- Paul

From: Suman Anna <[email protected]>
Date: Mon, 16 Mar 2015 15:54:54 -0500
Subject: [PATCH] ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself).

[paul at pwsan.com: dropped dra7xx_timer_secure_hwmod_class and
dra7xx_timer_secure_sysc to avoid compiler warnings]

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +1 -16
index d0f03e73add4..701234d8db1b 100644
@@ -1763,21 +1763,6 @@ static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = {
 	.sysc	= &dra7xx_timer_1ms_sysc,
 };
 
-static struct omap_hwmod_class_sysconfig dra7xx_timer_secure_sysc = {
-	.rev_offs	= 0x0000,
-	.sysc_offs	= 0x0010,
-	.sysc_flags	= (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
-			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-			   SIDLE_SMART_WKUP),
-	.sysc_fields	= &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = {
-	.name	= "timer",
-	.sysc	= &dra7xx_timer_secure_sysc,
-};
-
 static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = {
 	.rev_offs	= 0x0000,
 	.sysc_offs	= 0x0010,
@@ -1841,7 +1826,7 @@ static struct omap_hwmod dra7xx_timer3_hwmod = {
 /* timer4 */
 static struct omap_hwmod dra7xx_timer4_hwmod = {
 	.name		= "timer4",
-	.class		= &dra7xx_timer_secure_hwmod_class,
+	.class		= &dra7xx_timer_hwmod_class,
 	.clkdm_name	= "l4per_clkdm",
 	.main_clk	= "timer4_gfclk_mux",
 	.prcm = {
maintainer
#6 lore raw

cover Couple of DRA7 hwmod patches on Timers

In reply to Suman Anna

Hi Suman,

Quoted 11 lines · Suman Anna

Following are couple of DRA7 hwmod patches for the GPTimers. Patches based on 4.0-rc1.

The first patch adds the data for timers 13 through 16, the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot [1]. The boot hang can also be fixed by checking the return status of pm_runtime_get_sync() in the OMAP dmtimer probe, I will post a separate fix for that.

Second patch is a minor fix.

Thanks. Sounds like the first one should go in for v4.0-rc fixes, and the second one can wait for v4.1?

If so then could you repost the first fix to include the description of why it should go in early in the patch description ("the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot"). That should avoid anyone questioning why it would go in as a v4.0-rc fix at this point, and should help the -stable crew out.

- Paul

author
#7 lore raw

cover Couple of DRA7 hwmod patches on Timers

Hi Paul,

Quoted 15 lines
Quoted 11 lines

Following are couple of DRA7 hwmod patches for the GPTimers. Patches based on 4.0-rc1.

The first patch adds the data for timers 13 through 16, the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot [1]. The boot hang can also be fixed by checking the return status of pm_runtime_get_sync() in the OMAP dmtimer probe, I will post a separate fix for that.

Second patch is a minor fix.

Thanks. Sounds like the first one should go in for v4.0-rc fixes, and the second one can wait for v4.1?

Quoted 6 lines

If so then could you repost the first fix to include the description of why it should go in early in the patch description ("the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot"). That should avoid anyone questioning why it would go in as a v4.0-rc fix at this point, and should help the -stable crew out.

Actually, both of them can be queued for v4.1. Tony has already sent a pull request with the fixes [1] in the driver. The driver fixes will scale for all SoCs, so will fix this boot issue as well if anyone tries to enable these timers.

regards
Suman

[1] http://marc.info/?l=linux-omap&m=142661461902725&w=2