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clocksource: tegra: Maintain CPU endianness

PATCH In review Dmitry Osipenko 3 participants 3 messages Mar 18, 2015 – Mar 26, 2015

Subsystems (2)
Tegra architecture support Clocksource, clockevent drivers
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Dmitry Osipenko

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#0 lore raw

PATCH 1/1 clocksource: tegra: Maintain CPU endianness

Support big-endian kernel by using endian-aware register access functions.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 drivers/clocksource/tegra20_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clocksource/tegra20_timer.c +2 -2
index d2616ef..d8a3a4e 100644
@@ -57,9 +57,9 @@ static u64 persistent_ms, last_persistent_ms;
 static struct delay_timer tegra_delay_timer;
 
 #define timer_writel(value, reg) \
-	__raw_writel(value, timer_reg_base + (reg))
+	writel_relaxed(value, timer_reg_base + (reg))
 #define timer_readl(reg) \
-	__raw_readl(timer_reg_base + (reg))
+	readl_relaxed(timer_reg_base + (reg))
 
 static int tegra_timer_set_next_event(unsigned long cycles,
 					 struct clock_event_device *evt)
Signature · 1 line
2.3.2
#1 lore raw
Quoted 3 lines · Dmitry Osipenko

Support big-endian kernel by using endian-aware register access functions.

Signed-off-by Dmitry Osipenko <[email protected]>

Stephen, Thierry ?

Do you ack it ?

Thanks
-- Daniel

Quoted 21 lines
---
  drivers/clocksource/tegra20_timer.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clocksource/tegra20_timer.c +2 -2
index d2616ef..d8a3a4e 100644
@@ -57,9 +57,9 @@ static u64 persistent_ms, last_persistent_ms;
  static struct delay_timer tegra_delay_timer;
 
  #define timer_writel(value, reg) \
-	__raw_writel(value, timer_reg_base + (reg))
+	writel_relaxed(value, timer_reg_base + (reg))
  #define timer_readl(reg) \
-	__raw_readl(timer_reg_base + (reg))
+	readl_relaxed(timer_reg_base + (reg))
 
  static int tegra_timer_set_next_event(unsigned long cycles,
  					 struct clock_event_device *evt)
Signature · 5 lines
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