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ARM: dts: sunxi: Fix cpufreq instabilities

PATCH RESEND New Chen-Yu Tsai 3 participants 5 messages Mar 24, 2015 – Mar 26, 2015

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#0 lore raw

v2 cover ARM: dts: sunxi: Fix cpufreq instabilities

Hi Maxime,

Here's v2 of the sunxi cpufreq dts fixes, rebased onto v4.0-rc5. I assume you'll fix up the merge conflicts with 4.1 stuff?

The first patch limits the Olimex A10-Lime to 912MHz, as a few people reported on IRC that it was unstable at 1008MHz.

The second patch removes the overclocking settings from sun[457]i dts, so all the boards will be stable, regardless of whether regulators were added or not.

I would like to revisit this after the new OPP bindings are merged and support added to cpufreq-dt.

Changes since v1:

- Added sun4i dts fixes
- Corrected A10-Lime settings to match sun4i

Regards
ChenYu

Chen-Yu Tsai (2):
ARM: dts: sun4i: a10-lime: Override and remove 1008MHz OPP setting
ARM: dts: sunxi: Remove overclocked/overvoltaged OPP

 arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 16 ++++++++++++++++
 arch/arm/boot/dts/sun4i-a10.dtsi               |  3 +--
 arch/arm/boot/dts/sun5i-a13.dtsi               |  3 +--
 arch/arm/boot/dts/sun7i-a20.dtsi               |  3 +--
 4 files changed, 19 insertions(+), 6 deletions(-)
Signature · 1 line
2.1.4
#1 lore raw

PATCH RESEND v2 1/2 ARM: dts: sun4i: a10-lime: Override and remove 1008MHz OPP setting

The Olimex A10-Lime is known to be unstable when running at 1008MHz.

---
 arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +16 -0
index ab7891c43231..75742f8f96f3 100644
@@ -56,6 +56,22 @@
 	model = "Olimex A10-OLinuXino-LIME";
 	compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10";
 
+	cpus {
+		cpu0: cpu at 0 {
+			/*
+			 * The A10-Lime is known to be unstable
+			 * when running at 1008 MHz
+			 */
+			operating-points = <
+				/* kHz    uV */
+				912000  1350000
+				864000  1300000
+				624000  1250000
+				>;
+			cooling-max-level = <2>;
+		};
+	};
+
 	soc at 01c00000 {
 		emac: ethernet at 01c0b000 {
 			pinctrl-names = "default";
Signature · 1 line
2.1.4
#2 lore raw

PATCH RESEND v2 1/2 ARM: dts: sun4i: a10-lime: Override and remove 1008MHz OPP setting

arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts line 68

Quoted 6 lines · Chen-Yu Tsai

The Olimex A10-Lime is known to be unstable when running at 1008MHz.

arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +4 -0
+			operating-points = <
+				/* kHz    uV */
+				912000  1350000
+				864000  1300000

If we're dropping the top speed to 912 in the kernel, should we do the same in u-boot?

I was already planning on sending a patch to add the 912MHz setting to u-boot due to sun7i requesting CONFIG_CLK_FULL_SPEED of 912 but getting overclocked to 960 instead. I can easily do this at the same time.

Rgds,
Iain

#3 lore raw

PATCH RESEND v2 2/2 ARM: dts: sunxi: Remove overclocked/overvoltaged OPP

In reply to Chen-Yu Tsai

Without proper regulator support for individual boards, it is dangerous to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase the frequency without the accompanying voltage increase, resulting in an unstable system.

Remove them for now. We can revisit them with the new version of OPP bindings, which support boost settings and frequency ranges, among other things.

---
 arch/arm/boot/dts/sun4i-a10.dtsi | 3 +--
 arch/arm/boot/dts/sun5i-a13.dtsi | 3 +--
 arch/arm/boot/dts/sun7i-a20.dtsi | 3 +--
 3 files changed, 3 insertions(+), 6 deletions(-)
arch/arm/boot/dts/sun4i-a10.dtsi +1 -2
index 5c2925831f20..eebb7853e00b 100644
@@ -75,7 +75,6 @@
 			clock-latency = <244144>; /* 8 32k periods */
 			operating-points = <
 				/* kHz    uV */
-				1056000 1500000
 				1008000 1400000
 				912000  1350000
 				864000  1300000
@@ -83,7 +82,7 @@
 				>;
 			#cooling-cells = <2>;
 			cooling-min-level = <0>;
-			cooling-max-level = <4>;
+			cooling-max-level = <3>;
 		};
 	};
 
arch/arm/boot/dts/sun5i-a13.dtsi +1 -2
index f8818f1edbbe..883cb4873688 100644
@@ -47,7 +47,6 @@
 			clock-latency = <244144>; /* 8 32k periods */
 			operating-points = <
 				/* kHz    uV */
-				1104000	1500000
 				1008000 1400000
 				912000  1350000
 				864000  1300000
@@ -57,7 +56,7 @@
 				>;
 			#cooling-cells = <2>;
 			cooling-min-level = <0>;
-			cooling-max-level = <6>;
+			cooling-max-level = <5>;
 		};
 	};
 
arch/arm/boot/dts/sun7i-a20.dtsi +1 -2
index 3a8530b79f1c..fdd181792b4b 100644
@@ -105,7 +105,6 @@
 			clock-latency = <244144>; /* 8 32k periods */
 			operating-points = <
 				/* kHz    uV */
-				1008000 1450000
 				960000  1400000
 				912000  1400000
 				864000  1300000
@@ -116,7 +115,7 @@
 				>;
 			#cooling-cells = <2>;
 			cooling-min-level = <0>;
-			cooling-max-level = <7>;
+			cooling-max-level = <6>;
 		};
 
 		cpu at 1 {
Signature · 1 line
2.1.4
#4 lore raw

v2 cover ARM: dts: sunxi: Fix cpufreq instabilities

In reply to Chen-Yu Tsai
Quoted 8 lines · Chen-Yu Tsai

Hi Maxime,

Here's v2 of the sunxi cpufreq dts fixes, rebased onto v4.0-rc5. I assume you'll fix up the merge conflicts with 4.1 stuff?

The first patch limits the Olimex A10-Lime to 912MHz, as a few people reported on IRC that it was unstable at 1008MHz.

Quoted 6 lines

The second patch removes the overclocking settings from sun[457]i dts, so all the boards will be stable, regardless of whether regulators were added or not.

I would like to revisit this after the new OPP bindings are merged and support added to cpufreq-dt.

Applied both, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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