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clk: qcom: Add EBI2 clocks for IPQ806x

PATCH Applied Archit Taneja 2 participants 2 messages Apr 2, 2015 – Apr 6, 2015

Subsystems (4)
Device tree bindings Arm Qualcomm mailing list Common clk Qualcomm clock drivers

v2 of 8 Applied Latest is v8 →

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Archit Taneja

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PATCH v2 1/1 clk: qcom: Add EBI2 clocks for IPQ806x

The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document.

Signed-off-by Archit Taneja <[email protected]>

---
v2:
- removed hwcg_reg/bit entires in ebi2_aon_clk as they only apply to ebi2_clk.
- This was originally a part of the qcom nand controller series. Separating it out so that it's already there before qcom nand is merged.

 drivers/clk/qcom/gcc-ipq806x.c               | 32 ++++++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-ipq806x.h |  1 +
 2 files changed, 33 insertions(+)
drivers/clk/qcom/gcc-ipq806x.c +32 -0
index cbdc31d..f7e2d07 100644
@@ -2170,6 +2170,36 @@ static struct clk_branch usb_fs1_h_clk = {
 	},
 };
 
+static struct clk_branch ebi2_clk = {
+	.hwcg_reg = 0x3b00,
+	.hwcg_bit = 6,
+	.halt_reg = 0x2fcc,
+	.halt_bit = 1,
+	.clkr = {
+		.enable_reg = 0x3b00,
+		.enable_mask = BIT(4),
+		.hw.init = &(struct clk_init_data){
+			.name = "ebi2_clk",
+			.ops = &clk_branch_ops,
+			.flags = CLK_IS_ROOT,
+		},
+	},
+};
+
+static struct clk_branch ebi2_aon_clk = {
+	.halt_reg = 0x2fcc,
+	.halt_bit = 0,
+	.clkr = {
+		.enable_reg = 0x3b00,
+		.enable_mask = BIT(8),
+		.hw.init = &(struct clk_init_data){
+			.name = "ebi2_always_on_clk",
+			.ops = &clk_branch_ops,
+			.flags = CLK_IS_ROOT,
+		},
+	},
+};
+
 static struct clk_regmap *gcc_ipq806x_clks[] = {
 	[PLL0] = &pll0.clkr,
 	[PLL0_VOTE] = &pll0_vote,

@@ -2273,6 +2303,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
 	[USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr,
 	[USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr,
 	[USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr,
+	[EBI2_CLK] = &ebi2_clk.clkr,
+	[EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
 };
 
 static const struct qcom_reset_map gcc_ipq806x_resets[] = {
include/dt-bindings/clock/qcom,gcc-ipq806x.h +1 -0
index 04fb29a..ebd63fd 100644
@@ -288,5 +288,6 @@
 #define UBI32_CORE2_CLK_SRC			278
 #define UBI32_CORE1_CLK				279
 #define UBI32_CORE2_CLK				280
+#define EBI2_AON_CLK				281
 
 #endif
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Applied
#1 lore raw
Quoted 6 lines · Archit Taneja

The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document.

Signed-off-by Archit Taneja <[email protected]>

Applied to clk-next. Please line-wrap your commit text at some reasonable value next time.

Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project