doc/bindings: Add 'endianess' optional-property for FlexCAN controller
Subsystems (2)
PATCH 1/2 doc/bindings: Add 'endianess' optional-property for FlexCAN controller
This patch adds 'endianess' as the optional-property for describing the FlexCAN controller present on various FSL platforms.
--- .../devicetree/bindings/net/can/fsl-flexcan.txt | 4 ++++ 1 file changed, 4 insertions(+)
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +4 -0
@@ -18,6 +18,10 @@ Optional properties: - xceiver-supply: Regulator that powers the CAN transceiver +- little-endian: If the FlexCAN IP on this SoC is little-endian, use + this property. By default it is assumed that the IP + is big-endian + Example: can at 1c000 {
Signature · 1 line
1.7.9.5
PATCH 2/2 arm/dts: Add nodes for flexcan devices present on LS1021A SoC
From: Sakar Arora <[email protected]>
This patch adds the device nodes for flexcan controller(s) present on LS1021A SoC.
--- arch/arm/boot/dts/ls1021a-qds.dts | 8 ++++++++ arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+)
arch/arm/boot/dts/ls1021a-qds.dts +8 -0
@@ -238,3 +238,11 @@ &uart1 { status = "okay"; }; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +};
arch/arm/boot/dts/ls1021a.dtsi +20 -0
@@ -332,6 +332,26 @@ status = "disabled"; }; + can0: can at 2a70000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a70000 0x0 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>; + clock-names = "per"; + little-endian; + }; + + can1: can at 2a80000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a80000 0x0 0x1000>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>; + clock-names = "per"; + little-endian; + }; + wdog0: watchdog at 2ad0000 { compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>;
Signature · 1 line
1.7.9.5
Marc Kleine-Budde
maintainerPATCH 2/2 arm/dts: Add nodes for flexcan devices present on LS1021A SoC
Quoted 33 lines · Bhupesh Sharma
From: Sakar Arora <[email protected]>
This patch adds the device nodes for flexcan controller(s) present on LS1021A SoC.
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by Sakar Arora <[email protected]>--- arch/arm/boot/dts/ls1021a-qds.dts | 8 ++++++++ arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+)arch/arm/boot/dts/ls1021a-qds.dts +8
-0@@ -238,3 +238,11 @@ &uart1 { status = "okay"; }; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +};arch/arm/boot/dts/ls1021a.dtsi +0
-0
arch/arm/boot/dts/ls1021a.dtsi line 340
Quoted 9 lines
arch/arm/boot/dts/ls1021a.dtsi +6
-0@@ -332,6 +332,26 @@ status = "disabled"; }; + can0: can at 2a70000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a70000 0x0 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>;
Please don't use clock-frequency, it's only needed for powerpcs without proper clock support.
arch/arm/boot/dts/ls1021a.dtsi line 341
Quoted 1 line
arch/arm/boot/dts/ls1021a.dtsi +1
-0+ clock-names = "per";
Please provide a per and ipg clock, otherwise the driver will not work properly.
arch/arm/boot/dts/ls1021a.dtsi line 343
Quoted 2 lines
arch/arm/boot/dts/ls1021a.dtsi +2
-0+ little-endian; + };
Marc
Signature · 12 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: OpenPGP digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150409/ad99c47c/attachment.sig>
PATCH 2/2 arm/dts: Add nodes for flexcan devices present on LS1021A SoC
Hi Marc,
Quoted 40 lines
From: Marc Kleine-Budde [mailto:mkl at pengutronix.de]
Quoted 37 lines · Bhupesh Sharma
From: Sakar Arora <[email protected]>
This patch adds the device nodes for flexcan controller(s) present on LS1021A SoC.
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by Sakar Arora <[email protected]>--- arch/arm/boot/dts/ls1021a-qds.dts | 8 ++++++++ arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+)arch/arm/boot/dts/ls1021a-qds.dts +8
-0@@ -238,3 +238,11 @@ &uart1 { status = "okay"; }; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +};(quoted diff) +0
-0
b/arch/arm/boot/dts/ls1021a.dtsiindex c70bb27..c44661b 100644arch/arm/boot/dts/ls1021a.dtsi +0
-0@@ -332,6 +332,26 @@ status = "disabled"; };
Quoted 9 lines
arch/arm/boot/dts/ls1021a.dtsi line 340
Quoted 6 lines
arch/arm/boot/dts/ls1021a.dtsi +6
-0+ can0: can at 2a70000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a70000 0x0 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>;Please don't use clock-frequency, it's only needed for powerpcs without proper clock support.
Ok. Will fix in v2.
Quoted 5 lines
arch/arm/boot/dts/ls1021a.dtsi line 341
Quoted 2 lines
arch/arm/boot/dts/ls1021a.dtsi +1
-0+ clock-names = "per";Please provide a per and ipg clock, otherwise the driver will not work properly.
Ok. Will fix in v2.
Quoted 3 lines
arch/arm/boot/dts/ls1021a.dtsi line 343
Quoted 2 lines
arch/arm/boot/dts/ls1021a.dtsi +2
-0+ little-endian; + };
Regards,
Bhupesh
RE: [PATCH 2/2] arm/dts: Add nodes for flexcan devices present on LS1021A SoC
In reply to Marc Kleine-BuddeHi Marc,
Quoted 40 lines
From: Marc Kleine-Budde [mailto:[email protected]]
Quoted 37 lines · Bhupesh Sharma
From: Sakar Arora <[email protected]>
This patch adds the device nodes for flexcan controller(s) present on LS1021A SoC.
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by Sakar Arora <[email protected]>--- arch/arm/boot/dts/ls1021a-qds.dts | 8 ++++++++ arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+)arch/arm/boot/dts/ls1021a-qds.dts +8
-0@@ -238,3 +238,11 @@ &uart1 { status = "okay"; }; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +};(quoted diff) +0
-0
b/arch/arm/boot/dts/ls1021a.dtsiindex c70bb27..c44661b 100644arch/arm/boot/dts/ls1021a.dtsi +0
-0@@ -332,6 +332,26 @@ status = "disabled"; };
Quoted 9 lines
arch/arm/boot/dts/ls1021a.dtsi line 340
Quoted 6 lines
arch/arm/boot/dts/ls1021a.dtsi +6
-0+ can0: can@2a70000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a70000 0x0 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>;Please don't use clock-frequency, it's only needed for powerpcs without proper clock support.
Ok. Will fix in v2.
Quoted 5 lines
arch/arm/boot/dts/ls1021a.dtsi line 341
Quoted 2 lines
arch/arm/boot/dts/ls1021a.dtsi +1
-0+ clock-names = "per";Please provide a per and ipg clock, otherwise the driver will not work properly.
Ok. Will fix in v2.
Quoted 3 lines
arch/arm/boot/dts/ls1021a.dtsi line 343
Quoted 2 lines
arch/arm/boot/dts/ls1021a.dtsi +2
-0+ little-endian; + };
Regards,
Bhupesh
Marc Kleine-Budde
maintainerPATCH 1/2 doc/bindings: Add 'endianess' optional-property for FlexCAN controller
In reply to Bhupesh SharmaQuoted 14 lines · Bhupesh Sharma
This patch adds 'endianess' as the optional-property for describing the FlexCAN controller present on various FSL platforms.
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by Sakar Arora <[email protected]>--- .../devicetree/bindings/net/can/fsl-flexcan.txt | 4 ++++ 1 file changed, 4 insertions(+)Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +0
-0
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt Optional properties: · line 23
Quoted 6 lines
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +3
-0@@ -18,6 +18,10 @@ Optional properties: - xceiver-supply: Regulator that powers the CAN transceiver +- little-endian: If the FlexCAN IP on this SoC is little-endian, use + this property. By default it is assumed that the IP + is big-endian
Where's the code that's evaluating this property? On ARM little endian is assumed so far, on powerpc (p1010) it's big endian.
Marc
Signature · 12 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: OpenPGP digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150409/a1e76d34/attachment.sig>
PATCH 1/2 doc/bindings: Add 'endianess' optional-property for FlexCAN controller
Hi Marc,
Quoted 19 lines
From: Marc Kleine-Budde [mailto:mkl at pengutronix.de]
Quoted 16 lines · Bhupesh Sharma
This patch adds 'endianess' as the optional-property for describing the FlexCAN controller present on various FSL platforms.
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by Sakar Arora <[email protected]>--- .../devicetree/bindings/net/can/fsl-flexcan.txt | 4 ++++ 1 file changed, 4 insertions(+)Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +0
-0@@ -18,6 +18,10 @@ Optional properties:
Quoted 9 lines
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt Optional properties: · line 23
Quoted 5 lines
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +3
-0- xceiver-supply: Regulator that powers the CAN transceiver +- little-endian: If the FlexCAN IP on this SoC is little-endian, use + this property. By default it is assumed that the IP + is big-endianWhere's the code that's evaluating this property? On ARM little endian is assumed so far, on powerpc (p1010) it's big endian.
Here: http://thread.gmane.org/gmane.linux.can/7961
On LS1021A SoC, which is an ARM-v7 based SoC, the FlexCAN IP is big-endian.
Regards,
Bhupesh
PATCH 2/2 arm/dts: Add nodes for flexcan devices present on LS1021A SoC
In reply to Bhupesh SharmaFrom: Sakar Arora <[email protected]>
This patch adds the device nodes for flexcan controller(s) present on LS1021A SoC.
--- arch/arm/boot/dts/ls1021a-qds.dts | 8 ++++++++ arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+)
arch/arm/boot/dts/ls1021a-qds.dts +8 -0
@@ -238,3 +238,11 @@ &uart1 { status = "okay"; }; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +};
arch/arm/boot/dts/ls1021a.dtsi +20 -0
@@ -332,6 +332,26 @@ status = "disabled"; }; + can0: can@2a70000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a70000 0x0 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>; + clock-names = "per"; + little-endian; + }; + + can1: can@2a80000 { + compatible = "fsl,ls1021a-flexcan"; + reg = <0x0 0x2a80000 0x0 0x1000>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&platform_clk 1>; + clock-frequency = <150000000>; + clock-names = "per"; + little-endian; + }; + wdog0: watchdog@2ad0000 { compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>;
Signature · 1 line
1.7.9.5