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ahci: mmio_base is a virtual address

PATCH New Scott Wood 3 participants 3 messages Apr 17, 2015 – Apr 19, 2015

Subsystems (3)
Arm (32-bit) Block layer Arm/Allwinner sunXi SoC support
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Scott Wood

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#0 lore raw

PATCH 1/1 ahci: mmio_base is a virtual address

Don't store it in a u32.

Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")).

Fixes crash on boot in MPC8641HPCN_36BIT target.

Signed-off-by Scott Wood <[email protected]>
Cc Vadim Bendebury <[email protected]>
Cc York Sun <[email protected]>
---
 arch/arm/cpu/armv7/omap-common/boot-common.c |  2 +-
 arch/arm/cpu/armv7/omap-common/sata.c        |  6 +++---
 board/highbank/highbank.c                    |  2 +-
 board/sunxi/ahci.c                           |  2 +-
 drivers/block/ahci.c                         | 11 ++++++-----
 drivers/block/dwc_ahsata.c                   |  2 +-
 include/ahci.h                               |  6 +++---
 7 files changed, 16 insertions(+), 15 deletions(-)
arch/arm/cpu/armv7/omap-common/boot-common.c +1 -1
index 17500f2..f2f6897 100644
@@ -159,6 +159,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 #ifdef CONFIG_SCSI_AHCI_PLAT
 void arch_preboot_os(void)
 {
-	ahci_reset(DWC_AHSATA_BASE);
+	ahci_reset((void __iomem *)DWC_AHSATA_BASE);
 }
 #endif
arch/arm/cpu/armv7/omap-common/sata.c +3 -3
index d18bc50..2c2d1bc 100644
@@ -69,7 +69,7 @@ int init_sata(int dev)
 	val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
 	writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG);
 
-	ret = ahci_init(DWC_AHSATA_BASE);
+	ret = ahci_init((void __iomem *)DWC_AHSATA_BASE);
 
 	return ret;
 }

@@ -88,6 +88,6 @@ void scsi_init(void)
 
 void scsi_bus_reset(void)
 {
-	ahci_reset(DWC_AHSATA_BASE);
-	ahci_init(DWC_AHSATA_BASE);
+	ahci_reset((void __iomem *)DWC_AHSATA_BASE);
+	ahci_init((void __iomem *)DWC_AHSATA_BASE);
 }
board/highbank/highbank.c +1 -1
index fc2385c..ba1beb5 100644
@@ -57,7 +57,7 @@ void scsi_init(void)
 	u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
 
 	if (reg & PWRDOM_STAT_SATA) {
-		ahci_init(HB_AHCI_BASE);
+		ahci_init((void __iomem *)HB_AHCI_BASE);
 		scsi_scan(1);
 	}
 }
board/sunxi/ahci.c +1 -1
index b7f0dda..6d51b9b 100644
@@ -83,5 +83,5 @@ void scsi_init(void)
 	if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0)
 		return;
 
-	ahci_init(SUNXI_SATA_BASE);
+	ahci_init((void __iomem *)SUNXI_SATA_BASE);
 }
drivers/block/ahci.c +6 -5
index 88b90e0..6508648 100644
@@ -137,10 +137,10 @@ static void sunxi_dma_init(volatile u8 *port_mmio)
 }
 #endif
 
-int ahci_reset(u32 base)
+int ahci_reset(void __iomem *base)
 {
 	int i = 1000;
-	u32 host_ctl_reg = base + HOST_CTL;
+	u32 __iomem *host_ctl_reg = base + HOST_CTL;
 	u32 tmp = readl(host_ctl_reg); /* global controller reset */
 
 	if ((tmp & HOST_RESET) == 0)

@@ -419,8 +419,9 @@ static int ahci_init_one(pci_dev_t pdev)
 	probe_ent->pio_mask = 0x1f;
 	probe_ent->udma_mask = 0x7f;	/*Fixme,assume to support UDMA6 */
 
-	pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
-	debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
+	probe_ent->mmio_base = pci_map_bar(pdev, PCI_BASE_ADDRESS_5,
+					   PCI_REGION_MEM);
+	debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
 
 	/* Take from kernel:
 	 * JMicron-specific fixup:

@@ -939,7 +940,7 @@ void scsi_low_level_init(int busdevfunc)
 }
 
 #ifdef CONFIG_SCSI_AHCI_PLAT
-int ahci_init(u32 base)
+int ahci_init(void __iomem *base)
 {
 	int i, rc = 0;
 	u32 linkmap;
drivers/block/dwc_ahsata.c +1 -1
index 01a4148..cf3ef6b 100644
@@ -343,7 +343,7 @@ static int ahci_init_one(int pdev)
 				| ATA_FLAG_PIO_DMA
 				| ATA_FLAG_NO_ATAPI;
 
-	probe_ent->mmio_base = CONFIG_DWC_AHSATA_BASE_ADDR;
+	probe_ent->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
 
 	/* initialize adapter */
 	rc = ahci_host_init(probe_ent);
include/ahci.h +3 -3
index e8dee53..6d91712 100644
@@ -151,7 +151,7 @@ struct ahci_probe_ent {
 	u32	hard_port_no;
 	u32	host_flags;
 	u32	host_set_flags;
-	u32	mmio_base;
+	void __iomem *mmio_base;
 	u32     pio_mask;
 	u32	udma_mask;
 	u32	flags;

@@ -160,7 +160,7 @@ struct ahci_probe_ent {
 	u32	link_port_map; /*linkup port map*/
 };
 
-int ahci_init(u32 base);
-int ahci_reset(u32 base);
+int ahci_init(void __iomem *base);
+int ahci_reset(void __iomem *base);
 
 #endif
Signature · 1 line
2.1.0
#1 lore raw

PATCH 1/1 ahci: mmio_base is a virtual address

Quoted 6 lines · Scott Wood

Don't store it in a u32.

Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")).

Quoted 6 lines

Fixes crash on boot in MPC8641HPCN_36BIT target.

Signed-off-by Scott Wood <[email protected]>
Cc Vadim Bendebury <[email protected]>
Cc York Sun <[email protected]>

---

Acked-by York Sun <[email protected]>
#2 lore raw

PATCH 1/1 ahci: mmio_base is a virtual address

In reply to Scott Wood
Quoted 11 lines · Scott Wood

Don't store it in a u32.

Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")).

Fixes crash on boot in MPC8641HPCN_36BIT target.

Signed-off-by Scott Wood <[email protected]>
Cc Vadim Bendebury <[email protected]>
Acked-by York Sun <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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