powerpc/t1040qds: Add support of SD boot for T1040QDS Board

PATCH New Vijay Rai 2 participants 2 messages Feb 13, 2015 – Apr 17, 2015 PowerPC

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Vijay Rai

author

2015-02-13 15:25 UTC #0 lore raw

PATCH v3 1/1 powerpc/t1040qds: Add support of SD boot for T1040QDS Board

Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR. Finally SPL transer control to u-boot.

Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- Update tlb and ddr accordingly

Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1

Signed-off-by Vijay Rai <[email protected]>

Signed-off-by Priyanka Jain <[email protected]>

---
changes from v2:
- Updated Copyright to 2015
- Updated board_need_mem_reset, now it resets DDR by default, earlier it was disabling the reset for NOR boot which is wrong
- tested NOR boot and SD boot

 arch/powerpc/cpu/mpc85xx/Kconfig       |    1 +
 board/freescale/t1040qds/MAINTAINERS   |    5 +
 board/freescale/t1040qds/Makefile      |   10 +-
 board/freescale/t1040qds/ddr.c         |    4 +
 board/freescale/t1040qds/spl.c         |  160 ++++++++++++++++++++++++++++++++
 board/freescale/t1040qds/t1040_pbi.cfg |   16 +++-
 board/freescale/t1040qds/tlb.c         |   11 +++
 configs/T1040QDS_SDCARD_defconfig      |    5 +
 include/configs/T1040QDS.h             |   88 ++++++++++++++----
 9 files changed, 277 insertions(+), 23 deletions(-)
 create mode 100644 board/freescale/t1040qds/spl.c
 create mode 100644 configs/T1040QDS_SDCARD_defconfig

arch/powerpc/cpu/mpc85xx/Kconfig +1 -0

index adb5bd3..635f649 100644
@@ -109,6 +109,7 @@ config TARGET_T102XRDB
 
 config TARGET_T1040QDS
 	bool "Support T1040QDS"
+	select SUPPORT_SPL
 
 config TARGET_T104XRDB
 	bool "Support T104xRDB"

board/freescale/t1040qds/MAINTAINERS +5 -0

index 83f6b3c..44d56b6 100644
@@ -6,6 +6,11 @@ F:	include/configs/T1040QDS.h
 F:	configs/T1040QDS_defconfig
 F:	configs/T1040QDS_D4_defconfig
 
+T1040QDS_SDCARD BOARD
+M:	Priyanka Jain  <[email protected]>
+S:	Maintained
+F:	configs/T1040QDS_SDCARD_defconfig
+
 T1040QDS_SECURE_BOOT BOARD
 M:	Aneesh Bansal <[email protected]>
 S:	Maintained

board/freescale/t1040qds/Makefile +7 -3

index 19ed21b..27eed4c 100644
@@ -4,10 +4,14 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
 obj-y	+= t1040qds.o
-obj-y	+= ddr.o
+obj-y	+= eth.o
 obj-$(CONFIG_PCI)     += pci.o
+obj-$(CONFIG_FSL_DIU_FB)	+= diu.o
+endif
+obj-y	+= ddr.o
 obj-y	+= law.o
 obj-y	+= tlb.o
-obj-y	+= eth.o
-obj-y	+= diu.o

board/freescale/t1040qds/ddr.c +4 -0

index 8240240..74ad109 100644
@@ -118,6 +118,7 @@ phys_size_t initdram(int board_type)
 {
 	phys_size_t dram_size;
 
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
 	puts("Initializing....using SPD\n");
 
 	dram_size = fsl_ddr_sdram();

@@ -126,6 +127,9 @@ phys_size_t initdram(int board_type)
 	dram_size *= 0x100000;
 
 	puts("    DDR: ");
+#else
+	dram_size =  fsl_ddr_sdram_size();
+#endif
 
 #if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
 	fsl_dp_resume();

board/freescale/t1040qds/spl.c new file +160 -0

160 lines not on this page · raw message

board/freescale/t1040qds/t1040_pbi.cfg +13 -3

index 10b1a6d..f7d9a74 100644
@@ -1,4 +1,14 @@
 #PBI commands
+#Software Workaround for errata A-007662 to train PCIe2 controller in Gen2 speed
+09250100 00000400
+09250108 00002000
+#Software Workaround for errata A-008007 to reset PVR register
+09000010 0000000b
+09000014 c0000000
+09000018 81d00017
+89020400 a1000000
+091380c0 000f0000
+89020400 00000000
 #Initialize CPC1
 09010000 00200400
 09138000 00000000

@@ -9,9 +19,9 @@
 09010f00 08000000
 09010000 80000000
 #Configure LAW for CPC1
-09000cf0 00000000
-09000cf4 fffc0000
-09000cf8 81000011
+09000cd0 00000000
+09000cd4 fffc0000
+09000cd8 81000011
 #Configure alternate space
 09000010 00000000
 09000014 ff000000

board/freescale/t1040qds/tlb.c +11 -0

index 412c591..0a7ceda 100644
@@ -53,6 +53,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
 		      0, 2, BOOKE_PAGESZ_256M, 1),
 
+#ifndef CONFIG_SPL_BUILD
 	/* *I*G* - PCI */
 	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,

@@ -82,6 +83,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 8, BOOKE_PAGESZ_16M, 1),
 #endif
+#endif
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,

@@ -103,6 +105,15 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      0, 11, BOOKE_PAGESZ_4K, 1),
 #endif
 
+#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
+        SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
+                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+                      0, 12, BOOKE_PAGESZ_1G, 1),
+        SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
+                      CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
+                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+                      0, 13, BOOKE_PAGESZ_1G, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);

configs/T1040QDS_SDCARD_defconfig new file +5 -0

new file mode 100644
index 0000000..fbee8c5
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T1040QDS=y

include/configs/T1040QDS.h +71 ~~-17~~

154 lines not on this page · raw message

Signature · 1 line

1.7.9.5

York Sun

2015-04-17 17:41 UTC #1 lore raw

PATCH v3 1/1 powerpc/t1040qds: Add support of SD boot for T1040QDS Board

Quoted 12 lines · Vijay Rai

Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR. Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- Update tlb and ddr accordingly
Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1

Quoted 9 lines

Signed-off-by Vijay Rai <[email protected]>
Signed-off-by Priyanka Jain <[email protected]>
---
changes from v2:
- Updated Copyright to 2015
- Updated board_need_mem_reset, now it resets DDR by default, earlier it was disabling the reset for NOR boot which is wrong
- tested NOR boot and SD boot

Please rebase your patch and test. I see compiling errors and warnings.

York