ARM: common: edma: clear completion interrupts on stop
Subsystems (2)
PATCH 1/3 ARM: common: edma: clear completion interrupts on stop
When stopping a DMA transfer with interrupts disabled it is possible that the DMA transfer completes before the events are cleared. In this case the completion interrupt will be pending, causing a completion callback after the transfer was stopped.
By clearing the completion interrupt for the stopping channel it is ensured that no completion event will be generated after the stop.
--- arch/arm/common/edma.c | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/common/edma.c +3 -0
@@ -1350,6 +1350,9 @@ void edma_stop(unsigned channel)edma_shadow0_write_array (ctlr,SH_SECR , j, mask);edma_write_array (ctlr,EDMA_EMCR , j, mask); +/* clear possibly pending completion interrupt */ +edma_shadow0_write_array (ctlr,SH_ICR , j, mask); +pr_debug ("EDMA: EER%d %08x\n" , j,edma_shadow0_read_array (ctlr,SH_EER , j));
Signature · 1 line
1.7.10.4
Quoted 7 lines · John Ogness
When stopping a DMA transfer with interrupts disabled it is possible that the DMA transfer completes before the events are cleared. In this case the completion interrupt will be pending, causing a completion callback after the transfer was stopped.
By clearing the completion interrupt for the stopping channel it is ensured that no completion event will be generated after the stop.
Quoted 20 lines
Signed-off-by John Ogness <[email protected]>--- arch/arm/common/edma.c | 3 +++ 1 file changed, 3 insertions(+)arch/arm/common/edma.c +3
-0@@ -1350,6 +1350,9 @@ void edma_stop(unsigned channel)edma_shadow0_write_array (ctlr,SH_SECR , j, mask);edma_write_array (ctlr,EDMA_EMCR , j, mask); +/* clear possibly pending completion interrupt */ +edma_shadow0_write_array (ctlr,SH_ICR , j, mask); +pr_debug ("EDMA: EER%d %08x\n" , j,edma_shadow0_read_array (ctlr,SH_EER , j));
Signature · 1 line
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