Add Marvell Armada A38x 88F6820 SoC support

This patch series adds support for the Marvell Armada A38x SoC's. Specifically the 88F6820 / 88F6828.

Basic support for the DB-88F6820-GP evaluation board is added. Supporting the following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)

One big part of this new SoC support is the move of the already exisiting Armada XP support into the "mach-mvebu" directory. With this move its easier to re-use this code for the A38x, which is pretty similar to the AXP.

Thanks,
Stefan

Changes in v3:
- Removed coherency feature as its not used in U-Boot at all as pointed out by Thomas Petazzoni
- Changed CONFIG_I2C_MVTWSI_BASE to CONFIG_I2C_MVTWSI_BASE0 for updates in mvtwsi I2C driver
- Added Tested-by from Dirk and Kevin

Changes in v2:
- Made mvebu_soc_family() globally available so that it can be called from mbus.c
- Add PL310 L2 cache base address
- Update to 256KiB env sector as required for M25P128
- Add I2C IO expander initialization (fan etc)
- Enable PL310 L2 cache as this is needed for correct caching OPs

Stefan Roese (13):
arm: armada-xp: Move SoC sources to mach-mvebu
arm: armada-xp: Move SoC headers to mach-mvebu/include/mach
arm: mvebu: Move mvebu-common into mach-mvebu
arm: mvebu: Change header macros from ARMADA_XP to MVEBU
arm: mvebu: Remove unreferenced define
arm: mvebu: Only define MV88F78X60 for Armada XP
arm: mvebu: Move CONFIG_SPL_LDSCRIPT to common header
arm: mvebu: Add basic Armada 38x support
arm: mvebu: Change network init code to allow a more flexible setup
arm: mvebu: Remove coherency configuration
arm: mvebu: mv-common.h: Add CONFIG_PREBOOT
arm: mvebu: Add d-cache invalidate before enabling the d-cache
arm: mvebu: Add Armada A38x DB-88F6820-GP board support

 arch/arm/Kconfig                                   |   6 ++
 arch/arm/Makefile                                  |   5 +-
 arch/arm/cpu/armv7/Makefile                        |   1 -
 arch/arm/cpu/armv7/armada-xp/Makefile              |   9 --
 arch/arm/mach-mvebu/Makefile                       |  24 +++++
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/cpu.c |  96 +++++++++++++++----
 arch/arm/{mvebu-common => mach-mvebu}/dram.c       |   0
 arch/arm/{mvebu-common => mach-mvebu}/gpio.c       |   0
 .../include/mach}/config.h                         |  15 ++-
 .../include/mach}/cpu.h                            |  13 ++-
 .../include/mach}/soc.h                            |  20 ++--
 .../armv7/armada-xp => mach-mvebu}/lowlevel_spl.S  |   0
 arch/arm/{mvebu-common => mach-mvebu}/mbus.c       |   3 -
 .../{mvebu-common => mach-mvebu}/serdes/Makefile   |   0
 .../serdes/board_env_spec.h                        |   0
 .../serdes/high_speed_env_lib.c                    |   0
 .../serdes/high_speed_env_spec.c                   |   0
 .../serdes/high_speed_env_spec.h                   |   0
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/spl.c |   0
 arch/arm/{mvebu-common => mach-mvebu}/timer.c      |   0
 .../{mvebu-common => mach-mvebu}/u-boot-spl.lds    |   0
 board/Marvell/db-88f6820-gp/Kconfig                |  15 +++
 board/Marvell/db-88f6820-gp/Makefile               |   7 ++
 board/Marvell/db-88f6820-gp/binary.0               |  16 ++++
 board/Marvell/db-88f6820-gp/db-88f6820-gp.c        | 103 +++++++++++++++++++++
 board/Marvell/db-88f6820-gp/kwbimage.cfg           |  12 +++
 board/Marvell/db-mv784mp-gp/Kconfig                |   2 +-
 board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c        |   3 +-
 board/maxbcm/Kconfig                               |   2 +-
 board/maxbcm/maxbcm.c                              |   2 +-
 configs/db-88f6820-gp_defconfig                    |   2 +
 include/configs/db-88f6820-gp.h                    |  72 ++++++++++++++
 include/configs/db-mv784mp-gp.h                    |   3 +-
 include/configs/maxbcm.h                           |   3 +-
 include/configs/mv-common.h                        |   1 +
 35 files changed, 378 insertions(+), 57 deletions(-)
 delete mode 100644 arch/arm/cpu/armv7/armada-xp/Makefile
 create mode 100644 arch/arm/mach-mvebu/Makefile
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/cpu.c (71%)
 rename arch/arm/{mvebu-common => mach-mvebu}/dram.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/gpio.c (100%)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/config.h (86%)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/cpu.h (93%)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/soc.h (81%)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/lowlevel_spl.S (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/mbus.c (99%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/Makefile (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/board_env_spec.h (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_lib.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_spec.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_spec.h (100%)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/spl.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/timer.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/u-boot-spl.lds (100%)
 create mode 100644 board/Marvell/db-88f6820-gp/Kconfig
 create mode 100644 board/Marvell/db-88f6820-gp/Makefile
 create mode 100644 board/Marvell/db-88f6820-gp/binary.0
 create mode 100644 board/Marvell/db-88f6820-gp/db-88f6820-gp.c
 create mode 100644 board/Marvell/db-88f6820-gp/kwbimage.cfg
 create mode 100644 configs/db-88f6820-gp_defconfig
 create mode 100644 include/configs/db-88f6820-gp.h

2.3.6

Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/*

Since this platform will be extended to support other Marvell SoC's as well, lets rename it directly to mvebu.

This will be used by the upcoming Armada 38x suport (A38x).

---

Changes in v3: None
Changes in v2: None

 arch/arm/Makefile                                           | 1 +
 arch/arm/cpu/armv7/Makefile                                 | 1 -
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/Makefile       | 0
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/cpu.c          | 0
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/lowlevel_spl.S | 0
 arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/spl.c          | 0
 6 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/Makefile (100%)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/cpu.c (100%)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/lowlevel_spl.S (100%)
 rename arch/arm/{cpu/armv7/armada-xp => mach-mvebu}/spl.c (100%)

index bd4749c..7bd53c5 100644
@@ -48,6 +48,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARMADA_XP)		+= mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 machine-$(CONFIG_ARCH_NOMADIK)		+= nomadik
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X

index 21fc03b..2028e8c 100644
@@ -38,7 +38,6 @@ obj-y += s5p-common/
 endif
 
 obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
-obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
 obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
 obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
 obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/

similarity index 100%
rename from arch/arm/cpu/armv7/armada-xp/Makefile
rename to arch/arm/mach-mvebu/Makefile

similarity index 100%
rename from arch/arm/cpu/armv7/armada-xp/cpu.c
rename to arch/arm/mach-mvebu/cpu.c

similarity index 100%
rename from arch/arm/cpu/armv7/armada-xp/lowlevel_spl.S
rename to arch/arm/mach-mvebu/lowlevel_spl.S

similarity index 100%
rename from arch/arm/cpu/armv7/armada-xp/spl.c
rename to arch/arm/mach-mvebu/spl.c

2.3.6

Move arch/arm/include/asm/arch-armada-xp/*

     -> arch/arm/mach-mvebu/include/mach/*

Additionally the SYS_SOC is renamed from "armada-xp" to "mvebu". With this change all these files can better be shared with other, newer Mavell MVEBU SoC's. Like the upcoming Armada 38x support.

---

Changes in v3: None
Changes in v2: None

 arch/arm/Makefile                                                       | 2 +-
 .../{include/asm/arch-armada-xp => mach-mvebu/include/mach}/config.h    | 0
 arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/cpu.h  | 0
 arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/soc.h  | 0
 board/Marvell/db-mv784mp-gp/Kconfig                                     | 2 +-
 board/maxbcm/Kconfig                                                    | 2 +-
 6 files changed, 3 insertions(+), 3 deletions(-)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/config.h (100%)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/cpu.h (100%)
 rename arch/arm/{include/asm/arch-armada-xp => mach-mvebu/include/mach}/soc.h (100%)

index 7bd53c5..32c152d 100644
@@ -85,7 +85,7 @@ libs-y += arch/arm/imx-common/
 endif
 endif
 
-ifneq (,$(filter $(SOC), armada-xp kirkwood))
+ifneq (,$(filter $(SOC), mvebu kirkwood))
 libs-y += arch/arm/mvebu-common/
 endif
 

similarity index 100%
rename from arch/arm/include/asm/arch-armada-xp/config.h
rename to arch/arm/mach-mvebu/include/mach/config.h

similarity index 100%
rename from arch/arm/include/asm/arch-armada-xp/cpu.h
rename to arch/arm/mach-mvebu/include/mach/cpu.h

similarity index 100%
rename from arch/arm/include/asm/arch-armada-xp/soc.h
rename to arch/arm/mach-mvebu/include/mach/soc.h

index 98aa10a..d0b426e 100644
@@ -7,7 +7,7 @@ config SYS_VENDOR
 	default "Marvell"
 
 config SYS_SOC
-	default "armada-xp"
+	default "mvebu"
 
 config SYS_CONFIG_NAME
 	default "db-mv784mp-gp"

index d833ca0..e86aa16 100644
@@ -4,7 +4,7 @@ config SYS_BOARD
 	default "maxbcm"
 
 config SYS_SOC
-	default "armada-xp"
+	default "mvebu"
 
 config SYS_CONFIG_NAME
 	default "maxbcm"

2.3.6

Now that the mach-mvebu directory exists and is used by Armada XP we can move the mvebu-common files into this directory as well.

---

Changes in v3: None
Changes in v2: None

 arch/arm/Makefile                                       |  4 ++--
 arch/arm/mach-mvebu/Makefile                            | 17 ++++++++++++++++-
 arch/arm/{mvebu-common => mach-mvebu}/dram.c            |  0
 arch/arm/{mvebu-common => mach-mvebu}/gpio.c            |  0
 arch/arm/{mvebu-common => mach-mvebu}/mbus.c            |  0
 arch/arm/{mvebu-common => mach-mvebu}/serdes/Makefile   |  0
 .../serdes/board_env_spec.h                             |  0
 .../serdes/high_speed_env_lib.c                         |  0
 .../serdes/high_speed_env_spec.c                        |  0
 .../serdes/high_speed_env_spec.h                        |  0
 arch/arm/{mvebu-common => mach-mvebu}/timer.c           |  0
 arch/arm/{mvebu-common => mach-mvebu}/u-boot-spl.lds    |  0
 board/maxbcm/maxbcm.c                                   |  2 +-
 include/configs/db-mv784mp-gp.h                         |  2 +-
 include/configs/maxbcm.h                                |  2 +-
 15 files changed, 21 insertions(+), 6 deletions(-)
 rename arch/arm/{mvebu-common => mach-mvebu}/dram.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/gpio.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/mbus.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/Makefile (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/board_env_spec.h (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_lib.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_spec.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/serdes/high_speed_env_spec.h (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/timer.c (100%)
 rename arch/arm/{mvebu-common => mach-mvebu}/u-boot-spl.lds (100%)

index 32c152d..c7ce6ef 100644
@@ -85,8 +85,8 @@ libs-y += arch/arm/imx-common/
 endif
 endif
 
-ifneq (,$(filter $(SOC), mvebu kirkwood))
-libs-y += arch/arm/mvebu-common/
+ifneq (,$(filter $(SOC), kirkwood))
+libs-y += arch/arm/mach-mvebu/
 endif
 
 # deprecated

index 737159b..4f477cd 100644
@@ -1,9 +1,24 @@
 #
-# Copyright (C) 2014 Stefan Roese <[email protected]>
+# Copyright (C) 2014-2015 Stefan Roese <[email protected]>
 #
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+ifdef CONFIG_KIRKWOOD
+
+obj-y	= dram.o
+obj-y	+= gpio.o
+obj-y	+= timer.o
+
+else
+
 obj-y	= cpu.o
+obj-y	+= dram.o
+obj-y	+= gpio.o
+obj-y	+= mbus.o
+obj-y	+= timer.o
 obj-$(CONFIG_SPL_BUILD) += spl.o
 obj-$(CONFIG_SPL_BUILD) += lowlevel_spl.o
+
+obj-y	+= serdes/
+endif

similarity index 100%
rename from arch/arm/mvebu-common/dram.c
rename to arch/arm/mach-mvebu/dram.c

similarity index 100%
rename from arch/arm/mvebu-common/gpio.c
rename to arch/arm/mach-mvebu/gpio.c

similarity index 100%
rename from arch/arm/mvebu-common/mbus.c
rename to arch/arm/mach-mvebu/mbus.c

similarity index 100%
rename from arch/arm/mvebu-common/serdes/Makefile
rename to arch/arm/mach-mvebu/serdes/Makefile

similarity index 100%
rename from arch/arm/mvebu-common/serdes/board_env_spec.h
rename to arch/arm/mach-mvebu/serdes/board_env_spec.h

similarity index 100%
rename from arch/arm/mvebu-common/serdes/high_speed_env_lib.c
rename to arch/arm/mach-mvebu/serdes/high_speed_env_lib.c

similarity index 100%
rename from arch/arm/mvebu-common/serdes/high_speed_env_spec.c
rename to arch/arm/mach-mvebu/serdes/high_speed_env_spec.c

similarity index 100%
rename from arch/arm/mvebu-common/serdes/high_speed_env_spec.h
rename to arch/arm/mach-mvebu/serdes/high_speed_env_spec.h

similarity index 100%
rename from arch/arm/mvebu-common/timer.c
rename to arch/arm/mach-mvebu/timer.c

similarity index 100%
rename from arch/arm/mvebu-common/u-boot-spl.lds
rename to arch/arm/mach-mvebu/u-boot-spl.lds

index 46b16ac..2fbb90c 100644
@@ -12,7 +12,7 @@
 #include <linux/mbus.h>
 
 #include "../drivers/ddr/mvebu/ddr3_hw_training.h"
-#include "../arch/arm/mvebu-common/serdes/high_speed_env_spec.h"
+#include "../arch/arm/mach-mvebu/serdes/high_speed_env_spec.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 

index 4dd7b11..cfeeab5 100644
@@ -100,7 +100,7 @@
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LDSCRIPT		"arch/arm/mvebu-common/u-boot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-mvebu/u-boot-spl.lds"
 
 /* SPL related SPI defines */
 #define CONFIG_SPL_SPI_SUPPORT

index e909623..27ea71f 100644
@@ -100,7 +100,7 @@
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LDSCRIPT		"arch/arm/mvebu-common/u-boot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-mvebu/u-boot-spl.lds"
 
 /* SPL related SPI defines */
 #define CONFIG_SPL_SPI_SUPPORT

2.3.6

Since these files will be used for other MVEBU SoC's, lets reflect this in the headers marcos as well.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/include/mach/config.h | 6 +++---
 arch/arm/mach-mvebu/include/mach/cpu.h    | 6 +++---
 arch/arm/mach-mvebu/include/mach/soc.h    | 8 ++++----
 3 files changed, 10 insertions(+), 10 deletions(-)

index f9fd424..01b725b 100644
@@ -12,8 +12,8 @@
  * It supports common definitions for Armada XP platforms
  */
 
-#ifndef _ARMADA_XP_CONFIG_H
-#define _ARMADA_XP_CONFIG_H
+#ifndef _MVEBU_CONFIG_H
+#define _MVEBU_CONFIG_H
 
 #include <asm/arch/soc.h>
 

@@ -83,4 +83,4 @@
 #define CONFIG_SYS_I2C_SPEED		100000
 #endif
 
-#endif /* _ARMADA_XP_CONFIG_H */
+#endif /* __MVEBU_CONFIG_H */

index 4f5ff96..297ac52 100644
@@ -6,8 +6,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef _ARMADA_XP_CPU_H
-#define _ARMADA_XP_CPU_H
+#ifndef _MVEBU_CPU_H
+#define _MVEBU_CPU_H
 
 #include <asm/system.h>
 

@@ -120,4 +120,4 @@ int serdes_phy_config(void);
  */
 int ddr3_init(void);
 #endif /* __ASSEMBLY__ */
-#endif /* _ARMADA_XP_CPU_H */
+#endif /* _MVEBU_CPU_H */

index 963e7ac..202d5b8 100644
@@ -8,8 +8,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef _ASM_ARCH_ARMADA_XP_H
-#define _ASM_ARCH_ARMADA_XP_H
+#ifndef _MVEBU_SOC_H
+#define _MVEBU_SOC_H
 
 #define SOC_MV78460_ID		0x7846
 

@@ -49,9 +49,9 @@
 /* Armada XP GbE controller has 4 ports */
 #define MAX_MVNETA_DEVS		4
 
-/* Kirkwood CPU memory windows */
+/* MVEBU CPU memory windows */
 #define MVCPU_WIN_CTRL_DATA	CPU_WIN_CTRL_DATA
 #define MVCPU_WIN_ENABLE	CPU_WIN_ENABLE
 #define MVCPU_WIN_DISABLE	CPU_WIN_DISABLE
 
-#endif /* _ASM_ARCH_ARMADA_XP_H */
+#endif /* _MVEBU_SOC_H */

2.3.6

MAX_MVNETA_DEVS is not used anywhere in U-Boot. So lets remove it.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/include/mach/soc.h | 3 ---
 1 file changed, 3 deletions(-)

index 202d5b8..f3e0398 100644
@@ -46,9 +46,6 @@
 #define SDRAM_MAX_CS		4
 #define SDRAM_ADDR_MASK		0xFF000000
 
-/* Armada XP GbE controller has 4 ports */
-#define MAX_MVNETA_DEVS		4
-
 /* MVEBU CPU memory windows */
 #define MVCPU_WIN_CTRL_DATA	CPU_WIN_CTRL_DATA
 #define MVCPU_WIN_ENABLE	CPU_WIN_ENABLE

2.3.6

This define is used by the DDR training code for Armada XP. With the upcoming addition of Armada 38x support, lets only define it for Armada XP in this common header.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/include/mach/config.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

index 01b725b..86a0aed 100644
@@ -9,7 +9,7 @@
 /*
  * This file should be included in board config header file.
  *
- * It supports common definitions for Armada XP platforms
+ * It supports common definitions for MVEBU platforms
  */
 
 #ifndef _MVEBU_CONFIG_H

@@ -17,7 +17,9 @@
 
 #include <asm/arch/soc.h>
 
+#if defined(CONFIG_ARMADA_XP)
 #define MV88F78X60 /* for the DDR training bin_hdr code */
+#endif
 
 #define CONFIG_SYS_CACHELINE_SIZE	32
 

2.3.6

This way, new MVEBU boards don't need to specifiy the common location for the SPL linker script.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/include/mach/config.h | 5 +++++
 include/configs/db-mv784mp-gp.h           | 1 -
 include/configs/maxbcm.h                  | 1 -
 3 files changed, 5 insertions(+), 2 deletions(-)

index 86a0aed..b326ec0 100644
@@ -85,4 +85,9 @@
 #define CONFIG_SYS_I2C_SPEED		100000
 #endif
 
+/* Common SPL configuration */
+#ifndef CONFIG_SPL_LDSCRIPT
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-mvebu/u-boot-spl.lds"
+#endif
+
 #endif /* __MVEBU_CONFIG_H */

index cfeeab5..897f473 100644
@@ -100,7 +100,6 @@
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-mvebu/u-boot-spl.lds"
 
 /* SPL related SPI defines */
 #define CONFIG_SPL_SPI_SUPPORT

index 27ea71f..a0ff067 100644
@@ -100,7 +100,6 @@
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-mvebu/u-boot-spl.lds"
 
 /* SPL related SPI defines */
 #define CONFIG_SPL_SPI_SUPPORT

2.3.6

This patch adds support for the Marvell Armada 38x SoC family.

Supported peripherals are:
- UART
- Ethernet (mvneta)
- I2C
- SPI (including SPI NOR flash)

Tested on Marvell DB-88F6820-GP evaluation board.

---

Changes in v3: None
Changes in v2:
- Made mvebu_soc_family() globally available so that it can be called from mbus.c
- Add PL310 L2 cache base address

 arch/arm/mach-mvebu/cpu.c              | 73 ++++++++++++++++++++++++++--------
 arch/arm/mach-mvebu/include/mach/cpu.h |  7 ++++
 arch/arm/mach-mvebu/include/mach/soc.h |  9 +++++
 3 files changed, 73 insertions(+), 16 deletions(-)

index 1cf70a9..eca5e21 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2014 Stefan Roese <[email protected]>
+ * Copyright (C) 2014-2015 Stefan Roese <[email protected]>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */

@@ -40,6 +40,20 @@ void reset_cpu(unsigned long ignored)
 		;
 }
 
+int mvebu_soc_family(void)
+{
+	u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff;
+
+	if (devid == SOC_MV78460_ID)
+		return MVEBU_SOC_AXP;
+
+	if (devid == SOC_88F6810_ID || devid == SOC_88F6820_ID ||
+	    devid == SOC_88F6828_ID)
+		return MVEBU_SOC_A38X;
+
+	return MVEBU_SOC_UNKNOWN;
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void)
 {

@@ -52,23 +66,48 @@ int print_cpuinfo(void)
 	case SOC_MV78460_ID:
 		puts("MV78460-");
 		break;
-	default:
-		puts("Unknown-");
+	case SOC_88F6810_ID:
+		puts("MV88F6810-");
 		break;
-	}
-
-	switch (revid) {
-	case 1:
-		puts("A0\n");
+	case SOC_88F6820_ID:
+		puts("MV88F6820-");
 		break;
-	case 2:
-		puts("B0\n");
+	case SOC_88F6828_ID:
+		puts("MV88F6828-");
 		break;
 	default:
-		puts("??\n");
+		puts("Unknown-");
 		break;
 	}
 
+	if (mvebu_soc_family() == MVEBU_SOC_AXP) {
+		switch (revid) {
+		case 1:
+			puts("A0\n");
+			break;
+		case 2:
+			puts("B0\n");
+			break;
+		default:
+			printf("?? (%x)\n", revid);
+			break;
+		}
+	}
+
+	if (mvebu_soc_family() == MVEBU_SOC_A38X) {
+		switch (revid) {
+		case MV_88F68XX_Z1_ID:
+			puts("Z1\n");
+			break;
+		case MV_88F68XX_A0_ID:
+			puts("A0\n");
+			break;
+		default:
+			printf("?? (%x)\n", revid);
+			break;
+		}
+	}
+
 	return 0;
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */

@@ -145,11 +184,13 @@ int arch_cpu_init(void)
 	 */
 	mvebu_mbus_probe(NULL, 0);
 
-	/*
-	 * Now the SDRAM access windows can be reconfigured using
-	 * the information in the SDRAM scratch pad registers
-	 */
-	update_sdram_window_sizes();
+	if (mvebu_soc_family() == MVEBU_SOC_AXP) {
+		/*
+		 * Now the SDRAM access windows can be reconfigured using
+		 * the information in the SDRAM scratch pad registers
+		 */
+		update_sdram_window_sizes();
+	}
 
 	/*
 	 * Finally the mbus windows can be configured with the

index 297ac52..3b48460 100644
@@ -56,6 +56,12 @@ enum cpu_attrib {
 	CPU_ATTR_DEV_CS3 = 0x37,
 };
 
+enum {
+	MVEBU_SOC_AXP,
+	MVEBU_SOC_A38X,
+	MVEBU_SOC_UNKNOWN,
+};
+
 /*
  * Default Device Address MAP BAR values
  */

@@ -106,6 +112,7 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank);
 unsigned int mvebu_sdram_bs(enum memory_bank bank);
 void mvebu_sdram_size_adjust(enum memory_bank bank);
 int mvebu_mbus_probe(struct mbus_win windows[], int count);
+int mvebu_soc_family(void);
 
 /*
  * Highspeed SERDES PHY config init, ported from bin_hdr

index f3e0398..0a9307c 100644
@@ -12,6 +12,13 @@
 #define _MVEBU_SOC_H
 
 #define SOC_MV78460_ID		0x7846
+#define SOC_88F6810_ID		0x6810
+#define SOC_88F6820_ID		0x6820
+#define SOC_88F6828_ID		0x6828
+
+/* A38x revisions */
+#define MV_88F68XX_Z1_ID	0x0
+#define MV_88F68XX_A0_ID	0x4
 
 /* TCLK Core Clock definition */
 #ifndef CONFIG_SYS_TCLK

@@ -25,6 +32,8 @@
 #define MVEBU_REGISTER(x)	(SOC_REGS_PHY_BASE + x)
 
 #define MVEBU_SDRAM_SCRATCH	(MVEBU_REGISTER(0x01504))
+#define MVEBU_L2_CACHE_BASE	(MVEBU_REGISTER(0x08000))
+#define CONFIG_SYS_PL310_BASE	MVEBU_L2_CACHE_BASE
 #define MVEBU_SPI_BASE		(MVEBU_REGISTER(0x10600))
 #define MVEBU_TWSI_BASE		(MVEBU_REGISTER(0x11000))
 #define MVEBU_UART0_BASE	(MVEBU_REGISTER(0x12000))

2.3.6

With the introduction of the Armada 38x support, its necessary to change the mvneta ethernet driver init call from always 4 times to a configurable value. Lets make this init call more flexible by moving the actually used devices to the config header.

Additionally this patch takes care of the slightly different base addresses for the ethernet controllers on A38x.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/cpu.c                   | 20 ++++++++++++++++----
 board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c |  3 ++-
 include/configs/db-mv784mp-gp.h             |  2 +-
 include/configs/maxbcm.h                    |  2 +-
 4 files changed, 20 insertions(+), 7 deletions(-)

index eca5e21..8058fad 100644
@@ -216,10 +216,22 @@ int arch_misc_init(void)
 #ifdef CONFIG_MVNETA
 int cpu_eth_init(bd_t *bis)
 {
-	mvneta_initialize(bis, MVEBU_EGIGA0_BASE, 0, CONFIG_PHY_BASE_ADDR + 0);
-	mvneta_initialize(bis, MVEBU_EGIGA1_BASE, 1, CONFIG_PHY_BASE_ADDR + 1);
-	mvneta_initialize(bis, MVEBU_EGIGA2_BASE, 2, CONFIG_PHY_BASE_ADDR + 2);
-	mvneta_initialize(bis, MVEBU_EGIGA3_BASE, 3, CONFIG_PHY_BASE_ADDR + 3);
+	u32 enet_base[] = { MVEBU_EGIGA0_BASE, MVEBU_EGIGA1_BASE,
+			    MVEBU_EGIGA2_BASE, MVEBU_EGIGA3_BASE };
+	u8 phy_addr[] = CONFIG_PHY_ADDR;
+	int i;
+
+	/*
+	 * Only Armada XP supports all 4 ethernet interfaces. A38x has
+	 * slightly different base addresses for its 2-3 interfaces.
+	 */
+	if (mvebu_soc_family() != MVEBU_SOC_AXP) {
+		enet_base[1] = MVEBU_EGIGA2_BASE;
+		enet_base[2] = MVEBU_EGIGA3_BASE;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(phy_addr); i++)
+		mvneta_initialize(bis, enet_base[i], i, phy_addr[i]);
 
 	return 0;
 }

index b3dae89..00ca878 100644
@@ -86,7 +86,8 @@ int checkboard(void)
 /* Configure and enable MV88E1545 PHY */
 void reset_phy(void)
 {
-	u16 devadr = CONFIG_PHY_BASE_ADDR;
+	u8 phy_addr[] = CONFIG_PHY_ADDR;
+	u16 devadr = phy_addr[0];
 	char *name = "neta0";
 	u16 reg;
 

index 897f473..77d3408 100644
@@ -53,7 +53,7 @@
 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64KiB sectors */
 
 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
-#define CONFIG_PHY_BASE_ADDR	0x10
+#define CONFIG_PHY_ADDR			{ 0x10, 0x11, 0x12, 0x13 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE	PHY_INTERFACE_MODE_QSGMII
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 #define CONFIG_RESET_PHY_R

index a0ff067..d8811a4 100644
@@ -53,7 +53,7 @@
 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64KiB sectors */
 
 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
-#define CONFIG_PHY_BASE_ADDR	0x0
+#define CONFIG_PHY_ADDR			{ 0x0, 0x1, 0x2, 0x3 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE	PHY_INTERFACE_MODE_SGMII
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 #define CONFIG_RESET_PHY_R

2.3.6

Hi Stefan,

We are not using the coherency feature in U-Boot at all. So lets remove this configuration from the mbus driver.

---

Changes in v3:
- Removed coherency feature as its not used in U-Boot at all as pointed out by Thomas Petazzoni

Changes in v2: None

 arch/arm/mach-mvebu/mbus.c | 3 ---
 1 file changed, 3 deletions(-)

index 05c9ef2..9b76bce 100644
@@ -341,9 +341,6 @@ static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
 			w = &mbus_dram_info.cs[cs++];
 			w->cs_index = i;
 			w->mbus_attr = 0xf & ~(1 << i);
-#if defined(CONFIG_ARMADA_XP)
-			w->mbus_attr |= ATTR_HW_COHERENCY;
-#endif
 			w->base = base & DDR_BASE_CS_LOW_MASK;
 			w->size = (size | ~DDR_SIZE_MASK) + 1;
 		}

2.3.6

This enables the usage of the "preboot" environment variable on Marvell boards.

---

Changes in v3: None
Changes in v2: None

 include/configs/mv-common.h | 1 +
 1 file changed, 1 insertion(+)

index 721b75d..51436da 100644
@@ -57,6 +57,7 @@
 					  115200,230400, 460800, 921600 }
 /* auto boot */
 #define CONFIG_BOOTDELAY	3	/* default enable autoboot */
+#define CONFIG_PREBOOT
 
 /*
  * For booting Linux, the board info and command line data

2.3.6

This solves some RX problems that have been seen, when using the mvneta ethernet driver. The cache needs to be reset into a "clean" state before using it.

---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/cpu.c | 3 +++
 1 file changed, 3 insertions(+)

index 8058fad..04681fc 100644
@@ -240,6 +240,9 @@ int cpu_eth_init(bd_t *bis)
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
+	/* Avoid problem with e.g. neta ethernet driver */
+	invalidate_dcache_all();
+
 	/* Enable D-cache. I-cache is already enabled in start.S */
 	dcache_enable();
 }

2.3.6

This patch adds support for the Marvell DB-88F6820-GP Armada A38x evaluation board.

Supported peripherals are:
- UART
- Ethernet (mvneta)
- I2C
- SPI (including SPI NOR flash)

Please note that this board support right now only supports the main U-Boot. Without the bin_hdr integration (DDR training etc). This will be added in a few days / weeks to complete this board port. But till then this U-Boot version can be run on the target via the original Marvell U-Boot via this command:

tftpboot 4000000 db-88f6820-gp/u-boot.bin;go 4000000

---

Changes in v3:
- Changed CONFIG_I2C_MVTWSI_BASE to CONFIG_I2C_MVTWSI_BASE0 for updates in mvtwsi I2C driver
- Added Tested-by from Dirk and Kevin

Changes in v2:
- Update to 256KiB env sector as required for M25P128
- Add I2C IO expander initialization (fan etc)
- Enable PL310 L2 cache as this is needed for correct caching OPs

 arch/arm/Kconfig                            |   6 ++
 board/Marvell/db-88f6820-gp/Kconfig         |  15 ++++
 board/Marvell/db-88f6820-gp/Makefile        |   7 ++
 board/Marvell/db-88f6820-gp/binary.0        |  16 +++++
 board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 103 ++++++++++++++++++++++++++++
 board/Marvell/db-88f6820-gp/kwbimage.cfg    |  12 ++++
 configs/db-88f6820-gp_defconfig             |   2 +
 include/configs/db-88f6820-gp.h             |  72 +++++++++++++++++++
 8 files changed, 233 insertions(+)
 create mode 100644 board/Marvell/db-88f6820-gp/Kconfig
 create mode 100644 board/Marvell/db-88f6820-gp/Makefile
 create mode 100644 board/Marvell/db-88f6820-gp/binary.0
 create mode 100644 board/Marvell/db-88f6820-gp/db-88f6820-gp.c
 create mode 100644 board/Marvell/db-88f6820-gp/kwbimage.cfg
 create mode 100644 configs/db-88f6820-gp_defconfig
 create mode 100644 include/configs/db-88f6820-gp.h

index b39bb4f..3cb5fda 100644
@@ -102,6 +102,11 @@ config KIRKWOOD
 	bool "Marvell Kirkwood"
 	select CPU_ARM926EJS
 
+config TARGET_DB_88F6820_GP
+	bool "Support DB-88F6820-GP"
+	select CPU_V7
+	select SUPPORT_SPL
+
 config TARGET_DB_MV784MP_GP
 	bool "Support db-mv784mp-gp"
 	select CPU_V7

@@ -823,6 +828,7 @@ source "board/BuR/kwb/Kconfig"
 source "board/BuR/tseries/Kconfig"
 source "board/CarMediaLab/flea3/Kconfig"
 source "board/Marvell/aspenite/Kconfig"
+source "board/Marvell/db-88f6820-gp/Kconfig"
 source "board/Marvell/db-mv784mp-gp/Kconfig"
 source "board/Marvell/gplugd/Kconfig"
 source "board/altera/socfpga/Kconfig"

new file mode 100644
index 0000000..b2e9115
@@ -0,0 +1,15 @@
+if TARGET_DB_88F6820_GP
+
+config SYS_BOARD
+	default "db-88f6820-gp"
+
+config SYS_VENDOR
+	default "Marvell"
+
+config SYS_SOC
+	default "mvebu"
+
+config SYS_CONFIG_NAME
+	default "db-88f6820-gp"
+
+endif

new file mode 100644
index 0000000..58d40dd
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015 Stefan Roese <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= db-88f6820-gp.o

new file mode 100644
index 0000000..57a4cbf
@@ -0,0 +1,16 @@
+--------
+WARNING:
+--------
+This file should contain the bin_hdr generated by the original Marvell
+U-Boot implementation. As this is currently not included in this
+U-Boot version, we have added this placeholder, so that the U-Boot
+image can be generated without errors.
+
+If you have a known to be working bin_hdr for your board, then you
+just need to replace this text file here with the binary header
+and recompile U-Boot.
+
+In a few weeks, mainline U-Boot will get support to generate the
+bin_hdr with the DDR training code itself. By implementing this code
+as SPL U-Boot. Then this file will not be needed any more and will
+get removed.

new file mode 100644
index 0000000..e812454
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2014 Stefan Roese <[email protected]>
+#
+
+# Armada XP uses version 1 image format
+VERSION		1
+
+# Boot Media configurations
+BOOT_FROM	spi
+
+# Binary Header (bin_hdr) with DDR3 training code
+BINARY board/Marvell/db-88f6820-gp/binary.0 0000005b 00000068

new file mode 100644
index 0000000..0d6f0de
@@ -0,0 +1,2 @@
+CONFIG_ARM=y
+CONFIG_TARGET_DB_88F6820_GP=y

2.3.6

Hi Stefan,

When I try to build this I get an error - its wants a 'binard.0' file. It talks about extracting this from an 'existing image'. Is it not available as source code? If not, is there a README explaining where to get it?

The build fails because of this. If this is the intended final state then I think you should define an environment variable to enable the binary build, so that we don't get buildman errors. For x86 (which has serious problems with binary blobs still) we use BUILD_ROM for this. It probably isn't a very good name for you, but you could create your own.

Regards,
Simon

Hi Simon,

This error should not occur. Sorry I've missing this.

The patch "arm: mvebu: Add Armada A38x DB-88F6820-GP board support" includes this file:

--------------------- board/Marvell/db-88f6820-gp/binary.0
---------------------
new file mode 100644
index 0000000..57a4cbf
@@ -0,0 +1,16 @@
+--------
+WARNING:
+--------
+This file should contain the bin_hdr generated by the original Marvell +U-Boot implementation. As this is currently not included in this +U-Boot version, we have added this placeholder, so that the U-Boot +image can be generated without errors.
+
+If you have a known to be working bin_hdr for your board, then you +just need to replace this text file here with the binary header +and recompile U-Boot.
+
+In a few weeks, mainline U-Boot will get support to generate the +bin_hdr with the DDR training code itself. By implementing this code +as SPL U-Boot. Then this file will not be needed any more and will +get removed.

Which should at least enable building this image for now. Until I've submitted the missing patches to integrate the SPL code including the DDR setup code. I'm currently busy with the cleanup of this code. Hopefully this will follow later this week. But I really would like to have this basic A38x support added now.

As explained above, the build should not fail. I'll take a look at it tomorrow and either send a follow up patch (when its already applied by then) or send v4 of this patchset.

Thanks,
Stefan

Hi Stefan,

Thanks for the explanation, sounds good.

Regards,
Simon

Hi Simon,

I re-tested this patch series and found that it build (as I would have expected) without errors when using the "make" commands:

$ make mrproper
$ make db-88f6820-gp_defconfig 
#
# configuration written to .config
#
$ make -j10 -s
$ ll u-boot.kwb 
-rw-rw-r-- 1 stefan stefan 175708 Mai  4 09:47 u-boot.kwb
$ make 

Only when run via buildman this error shows:

$ ./tools/buildman/buildman db-88f6820-gp
boards.cfg is up to date. Nothing to do.
Building current source for 1 boards (1 thread, 8 jobs per thread)
       arm:  +   db-88f6820-gp     
+Didn't find the file 'board/Marvell/db-88f6820-gp/binary.0' in '/home/stefan/git/u-boot/.bm-work/00/build' which is mandatory to generate the image
+This file generally contains the DDR3 training code, and should be extracted from an existing bootable
+image for your board. See 'kwbimage -x' to extract it from an existing image.
+Could not create image
+make[1]: *** [u-boot.kwb] Error 1
+make: *** [sub-make] Error 2
    0    0    1 /1      db-88f6820-gp

Do you have an explanation why this is the case? The file board/Marvell/db-88f6820-gp/binary.0 is available and building via "make" does work. Where does this difference come from?

Thanks,
Stefan

Hi Stefan,

Supporting

exisiting

the

includes

DDR

Hopefully this

basic A38x

'/home/stefan/git/u-boot/.bm-work/00/build' which is mandatory to generate the image

extracted from an existing bootable

image.

Could it be that out-of-tree building is broken?

You can try buildman -i to check.

Regards,
Simon