powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

PATCH New Scott Wood 3 participants 5 messages Apr 24, 2015 – May 5, 2015 PowerPC

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Scott Wood

author

2015-04-24 01:01 UTC #0 lore raw

PATCH 1/1 powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors") simplified IVOR initialization a bit too much, failing to use the post-relocation offset. This doesn't cause a problem with normal NOR boot, in which both the pre-relocation and post-relocation addresses are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such as for NAND/SD/etc. boot on some targets, as well as the QEMU target, the post-relocation address will not be the same in the lower 16 bits, as reserve_uboot() ensures that the relocation address is always 64 KiB aligned even if the pre-relocation address was not.

Use the GOT to get the proper post-relocation offsets.

Fixes 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")

Signed-off-by Scott Wood <[email protected]>

Cc Alexander Graf <[email protected]>

Cc Shaohui Xie <[email protected]>

---
 arch/powerpc/cpu/mpc85xx/start.S | 35 ++++++++++++++++++++---------------
 1 file changed, 20 insertions(+), 15 deletions(-)

arch/powerpc/cpu/mpc85xx/start.S +20 ~~-15~~

index 28f04ee..e61d8e0 100644
@@ -1664,41 +1664,46 @@ clear_bss:
 	 */
 	.globl	trap_init
 trap_init:
+	mflr	r11
+	bl	_GLOBAL_OFFSET_TABLE_-4
+	mflr	r12
+
 	/* Update IVORs as per relocation */
 	mtspr	IVPR,r3
 
-	li	r4,CriticalInput at l
+	lwz	r4,CriticalInput at got(r12)
 	mtspr	IVOR0,r4	/* 0: Critical input */
-	li	r4,MachineCheck at l
+	lwz	r4,MachineCheck at got(r12)
 	mtspr	IVOR1,r4	/* 1: Machine check */
-	li	r4,DataStorage at l
+	lwz	r4,DataStorage at got(r12)
 	mtspr	IVOR2,r4	/* 2: Data storage */
-	li	r4,InstStorage at l
+	lwz	r4,InstStorage at got(r12)
 	mtspr	IVOR3,r4	/* 3: Instruction storage */
-	li	r4,ExtInterrupt at l
+	lwz	r4,ExtInterrupt at got(r12)
 	mtspr	IVOR4,r4	/* 4: External interrupt */
-	li	r4,Alignment at l
+	lwz	r4,Alignment at got(r12)
 	mtspr	IVOR5,r4	/* 5: Alignment */
-	li	r4,ProgramCheck at l
+	lwz	r4,ProgramCheck at got(r12)
 	mtspr	IVOR6,r4	/* 6: Program check */
-	li	r4,FPUnavailable at l
+	lwz	r4,FPUnavailable at got(r12)
 	mtspr	IVOR7,r4	/* 7: floating point unavailable */
-	li	r4,SystemCall at l
+	lwz	r4,SystemCall at got(r12)
 	mtspr	IVOR8,r4	/* 8: System call */
 	/* 9: Auxiliary processor unavailable(unsupported) */
-	li	r4,Decrementer at l
+	lwz	r4,Decrementer at got(r12)
 	mtspr	IVOR10,r4	/* 10: Decrementer */
-	li	r4,IntervalTimer at l
+	lwz	r4,IntervalTimer at got(r12)
 	mtspr	IVOR11,r4	/* 11: Interval timer */
-	li	r4,WatchdogTimer at l
+	lwz	r4,WatchdogTimer at got(r12)
 	mtspr	IVOR12,r4	/* 12: Watchdog timer */
-	li	r4,DataTLBError at l
+	lwz	r4,DataTLBError at got(r12)
 	mtspr	IVOR13,r4	/* 13: Data TLB error */
-	li	r4,InstructionTLBError at l
+	lwz	r4,InstructionTLBError at got(r12)
 	mtspr	IVOR14,r4	/* 14: Instruction TLB error */
-	li	r4,DebugBreakpoint at l
+	lwz	r4,DebugBreakpoint at got(r12)
 	mtspr	IVOR15,r4	/* 15: Debug */
 
+	mtlr	r11
 	blr
 
 .globl unlock_ram_in_cache

Signature · 1 line

2.1.0

Shaohui Xie

2015-04-24 03:01 UTC #1 lore raw

PATCH 1/1 powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

Tested on T4240QDS_NAND and T4240QDS_SDCARD, the hang issue fixed. Thanks!

Best Regards,
Shaohui Xie

Quoted 98 lines

-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, April 24, 2015 9:02 AM
To: u-boot at lists.denx.de; Sun York-R58495
Cc: Wood Scott-B07421; Alexander Graf; Xie Shaohui-B21989
Subject: [PATCH] powerpc/mpc85xx: Use GOT when loading IVORs post- relocation
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors") simplified IVOR initialization a bit too much, failing to use the post- relocation offset. This doesn't cause a problem with normal NOR boot, in which both the pre-relocation and post-relocation addresses are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such as for NAND/SD/etc. boot on some targets, as well as the QEMU target, the post- relocation address will not be the same in the lower 16 bits, as reserve_uboot() ensures that the relocation address is always 64 KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Fixes 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by Scott Wood <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Shaohui Xie <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/start.S | 35 ++++++++++++++++++++--------------
(quoted diff) +0 -1
-
 1 file changed, 20 insertions(+), 15 deletions(-)
arch/powerpc/cpu/mpc85xx/start.S +20 ~~-16~~
index 28f04ee..e61d8e0 100644
@@ -1664,41 +1664,46 @@ clear_bss:
 	 */
 	.globl	trap_init
 trap_init:
+	mflr	r11
+	bl	_GLOBAL_OFFSET_TABLE_-4
+	mflr	r12
+
 	/* Update IVORs as per relocation */
 	mtspr	IVPR,r3
 
-	li	r4,CriticalInput at l
+	lwz	r4,CriticalInput at got(r12)
 	mtspr	IVOR0,r4	/* 0: Critical input */
-	li	r4,MachineCheck at l
+	lwz	r4,MachineCheck at got(r12)
 	mtspr	IVOR1,r4	/* 1: Machine check */
-	li	r4,DataStorage at l
+	lwz	r4,DataStorage at got(r12)
 	mtspr	IVOR2,r4	/* 2: Data storage */
-	li	r4,InstStorage at l
+	lwz	r4,InstStorage at got(r12)
 	mtspr	IVOR3,r4	/* 3: Instruction storage */
-	li	r4,ExtInterrupt at l
+	lwz	r4,ExtInterrupt at got(r12)
 	mtspr	IVOR4,r4	/* 4: External interrupt */
-	li	r4,Alignment at l
+	lwz	r4,Alignment at got(r12)
 	mtspr	IVOR5,r4	/* 5: Alignment */
-	li	r4,ProgramCheck at l
+	lwz	r4,ProgramCheck at got(r12)
 	mtspr	IVOR6,r4	/* 6: Program check */
-	li	r4,FPUnavailable at l
+	lwz	r4,FPUnavailable at got(r12)
 	mtspr	IVOR7,r4	/* 7: floating point unavailable */
-	li	r4,SystemCall at l
+	lwz	r4,SystemCall at got(r12)
 	mtspr	IVOR8,r4	/* 8: System call */
 	/* 9: Auxiliary processor unavailable(unsupported) */
-	li	r4,Decrementer at l
+	lwz	r4,Decrementer at got(r12)
 	mtspr	IVOR10,r4	/* 10: Decrementer */
-	li	r4,IntervalTimer at l
+	lwz	r4,IntervalTimer at got(r12)
 	mtspr	IVOR11,r4	/* 11: Interval timer */
-	li	r4,WatchdogTimer at l
+	lwz	r4,WatchdogTimer at got(r12)
 	mtspr	IVOR12,r4	/* 12: Watchdog timer */
-	li	r4,DataTLBError at l
+	lwz	r4,DataTLBError at got(r12)
 	mtspr	IVOR13,r4	/* 13: Data TLB error */
-	li	r4,InstructionTLBError at l
+	lwz	r4,InstructionTLBError at got(r12)
 	mtspr	IVOR14,r4	/* 14: Instruction TLB error */
-	li	r4,DebugBreakpoint at l
+	lwz	r4,DebugBreakpoint at got(r12)
 	mtspr	IVOR15,r4	/* 15: Debug */
 
+	mtlr	r11
 	blr
 
 .globl unlock_ram_in_cache
--
2.1.0

York Sun

2015-04-24 03:35 UTC #2 lore raw

PATCH 1/1 powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

Shaohui,

Thanks for confirmation. Please reply with your Test-by or Acked-by signature. The signature will be capture when the patch is applied.

York

Quoted 105 lines · On 04/23/2015 08:01 PM, Xie Shaohui-B21989 wrote:

Tested on T4240QDS_NAND and T4240QDS_SDCARD, the hang issue fixed. Thanks!
Best Regards,
Shaohui Xie
Quoted 98 lines
-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, April 24, 2015 9:02 AM
To: u-boot at lists.denx.de; Sun York-R58495
Cc: Wood Scott-B07421; Alexander Graf; Xie Shaohui-B21989
Subject: [PATCH] powerpc/mpc85xx: Use GOT when loading IVORs post- relocation
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors") simplified IVOR initialization a bit too much, failing to use the post- relocation offset. This doesn't cause a problem with normal NOR boot, in which both the pre-relocation and post-relocation addresses are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such as for NAND/SD/etc. boot on some targets, as well as the QEMU target, the post- relocation address will not be the same in the lower 16 bits, as reserve_uboot() ensures that the relocation address is always 64 KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Fixes 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by Scott Wood <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Shaohui Xie <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/start.S | 35 ++++++++++++++++++++--------------
(quoted diff) +0 -1
-
 1 file changed, 20 insertions(+), 15 deletions(-)
arch/powerpc/cpu/mpc85xx/start.S +20 ~~-16~~
index 28f04ee..e61d8e0 100644
@@ -1664,41 +1664,46 @@ clear_bss:
 	 */
 	.globl	trap_init
 trap_init:
+	mflr	r11
+	bl	_GLOBAL_OFFSET_TABLE_-4
+	mflr	r12
+
 	/* Update IVORs as per relocation */
 	mtspr	IVPR,r3
 
-	li	r4,CriticalInput at l
+	lwz	r4,CriticalInput at got(r12)
 	mtspr	IVOR0,r4	/* 0: Critical input */
-	li	r4,MachineCheck at l
+	lwz	r4,MachineCheck at got(r12)
 	mtspr	IVOR1,r4	/* 1: Machine check */
-	li	r4,DataStorage at l
+	lwz	r4,DataStorage at got(r12)
 	mtspr	IVOR2,r4	/* 2: Data storage */
-	li	r4,InstStorage at l
+	lwz	r4,InstStorage at got(r12)
 	mtspr	IVOR3,r4	/* 3: Instruction storage */
-	li	r4,ExtInterrupt at l
+	lwz	r4,ExtInterrupt at got(r12)
 	mtspr	IVOR4,r4	/* 4: External interrupt */
-	li	r4,Alignment at l
+	lwz	r4,Alignment at got(r12)
 	mtspr	IVOR5,r4	/* 5: Alignment */
-	li	r4,ProgramCheck at l
+	lwz	r4,ProgramCheck at got(r12)
 	mtspr	IVOR6,r4	/* 6: Program check */
-	li	r4,FPUnavailable at l
+	lwz	r4,FPUnavailable at got(r12)
 	mtspr	IVOR7,r4	/* 7: floating point unavailable */
-	li	r4,SystemCall at l
+	lwz	r4,SystemCall at got(r12)
 	mtspr	IVOR8,r4	/* 8: System call */
 	/* 9: Auxiliary processor unavailable(unsupported) */
-	li	r4,Decrementer at l
+	lwz	r4,Decrementer at got(r12)
 	mtspr	IVOR10,r4	/* 10: Decrementer */
-	li	r4,IntervalTimer at l
+	lwz	r4,IntervalTimer at got(r12)
 	mtspr	IVOR11,r4	/* 11: Interval timer */
-	li	r4,WatchdogTimer at l
+	lwz	r4,WatchdogTimer at got(r12)
 	mtspr	IVOR12,r4	/* 12: Watchdog timer */
-	li	r4,DataTLBError at l
+	lwz	r4,DataTLBError at got(r12)
 	mtspr	IVOR13,r4	/* 13: Data TLB error */
-	li	r4,InstructionTLBError at l
+	lwz	r4,InstructionTLBError at got(r12)
 	mtspr	IVOR14,r4	/* 14: Instruction TLB error */
-	li	r4,DebugBreakpoint at l
+	lwz	r4,DebugBreakpoint at got(r12)
 	mtspr	IVOR15,r4	/* 15: Debug */
 
+	mtlr	r11
 	blr
 
 .globl unlock_ram_in_cache
--
2.1.0

Shaohui Xie

2015-04-24 03:48 UTC #3 lore raw

PATCH 1/1 powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

In reply to Scott Wood

Quoted 20 lines

-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, April 24, 2015 9:02 AM
To: u-boot at lists.denx.de; Sun York-R58495
Cc: Wood Scott-B07421; Alexander Graf; Xie Shaohui-B21989
Subject: [PATCH] powerpc/mpc85xx: Use GOT when loading IVORs post- relocation
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors") simplified IVOR initialization a bit too much, failing to use the post- relocation offset. This doesn't cause a problem with normal NOR boot, in which both the pre-relocation and post-relocation addresses are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such as for NAND/SD/etc. boot on some targets, as well as the QEMU target, the post- relocation address will not be the same in the lower 16 bits, as reserve_uboot() ensures that the relocation address is always 64 KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.

Quoted 9 lines

Fixes 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by Scott Wood <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Shaohui Xie <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/start.S | 35 ++++++++++++++++++++--------------
-
 1 file changed, 20 insertions(+), 15 deletions(-)

Tested-by Shaohui Xie <[email protected]>

York Sun

2015-05-05 16:26 UTC #4 lore raw

PATCH 1/1 powerpc/mpc85xx: Use GOT when loading IVORs post-relocation

Quoted 30 lines · On 04/23/2015 08:48 PM, Xie Shaohui-B21989 wrote:

Quoted 20 lines
-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, April 24, 2015 9:02 AM
To: u-boot at lists.denx.de; Sun York-R58495
Cc: Wood Scott-B07421; Alexander Graf; Xie Shaohui-B21989
Subject: [PATCH] powerpc/mpc85xx: Use GOT when loading IVORs post- relocation
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors") simplified IVOR initialization a bit too much, failing to use the post- relocation offset. This doesn't cause a problem with normal NOR boot, in which both the pre-relocation and post-relocation addresses are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such as for NAND/SD/etc. boot on some targets, as well as the QEMU target, the post- relocation address will not be the same in the lower 16 bits, as reserve_uboot() ensures that the relocation address is always 64 KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Quoted 9 lines
Fixes 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by Scott Wood <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Shaohui Xie <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/start.S | 35 ++++++++++++++++++++--------------
-
 1 file changed, 20 insertions(+), 15 deletions(-)

Quoted 2 lines

Tested-by Shaohui Xie <[email protected]>

Applied to u-boot-mpc85xx master branch. Awaiting upstream.

York