adm8211: fix the possible pci cache line sizes inside switch-case
Subsystems (3)
PATCH 2/2 adm8211: fix the possible pci cache line sizes inside switch-case
The PCI cache line size value was being compared against decimal values prefixed with 0x.
Fixed the literals to use the correct hex values.
--- drivers/net/wireless/adm8211.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/net/wireless/adm8211.c +2 -2
@@ -1101,10 +1101,10 @@ static void adm8211_hw_init(struct ieee80211_hw *dev)case 0x8 : reg |= (0x1 <<14 );break ; -case 0x16 : +case 0x10 : reg |= (0x2 <<14 );break ; -case 0x32 : +case 0x20 : reg |= (0x3 <<14 );break ;default :
Signature · 1 line
1.9.1
Quoted 6 lines · Okash Khawaja
The PCI cache line size value was being compared against decimal values prefixed with 0x.
Fixed the literals to use the correct hex values.
Signed-off-by Okash Khawaja <[email protected]>
[...]
drivers/net/wireless/adm8211.c static void adm8211_hw_init(struct ieee80211_hw *dev) · line 1110
Quoted 13 lines
drivers/net/wireless/adm8211.c +2
-2@@ -1101,10 +1101,10 @@ static void adm8211_hw_init(struct ieee80211_hw *dev)case 0x8 : reg |= (0x1 <<14 );break ; -case 0x16 : +case 0x10 : reg |= (0x2 <<14 );break ; -case 0x32 : +case 0x20 : reg |= (0x3 <<14 );break ;default :
Did you test this? How certain can we be that this doesn't break anything?
Signature · 5 lines
Kalle Valo -- To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
Quoted 11 lines · Kalle Valo
Quoted 6 lines · Okash Khawaja
The PCI cache line size value was being compared against decimal values prefixed with 0x.
Fixed the literals to use the correct hex values.
Signed-off-by Okash Khawaja <[email protected]>[...]
Quoted 17 lines
drivers/net/wireless/adm8211.c static void adm8211_hw_init(struct ieee80211_hw *dev) · line 1110
Quoted 13 lines
drivers/net/wireless/adm8211.c +2
-2@@ -1101,10 +1101,10 @@ static void adm8211_hw_init(struct ieee80211_hw *dev)case 0x8 : reg |= (0x1 <<14 );break ; -case 0x16 : +case 0x10 : reg |= (0x2 <<14 );break ; -case 0x32 : +case 0x20 : reg |= (0x3 <<14 );break ;default :Did you test this? How certain can we be that this doesn't break anything?
I didn't test it as that would require the hardware that I don't have at the moment. However, the value in cline is PCI cache line size, which is the CPU's cache line size. It is less likely for cache line sizes to be 22 or 50, and more likely for them to be 16 or 32. Also, as far as I understand (and I might be wrong here), cache line size is used for things like aligning DMA requests with CPU cache line, which improve performance but wouldn't break anything if the value doesn't match. In this case, we will fall through to the default case which leaves reg unchanged.
If there is a way to test it with a mock set up or if you still think we need to test this on real board, I'll be happy to try get the hardware. But I will need some guidance around that. Thanks.
Quoted 2 lines
Signature · 1 line
Kalle Valo
Quoted 28 lines · Okash Khawaja
Quoted 7 lines · Kalle Valo
Quoted 5 lines · Okash Khawaja
The PCI cache line size value was being compared against decimal values prefixed with 0x.
Fixed the literals to use the correct hex values.Signed-off-by Okash Khawaja <[email protected]>Quoted 9 lines
[...]
Quoted 4 lines
(quoted diff) +0
-0@@ -1101,10 +1101,10 @@ static void adm8211_hw_init(struct
ieee80211_hw*dev) case0x8: reg |= (0x1<< 14); break; - case0x16: + case0x10: reg |= (0x2<< 14); break; - case0x32: + case0x20: reg |= (0x3<< 14); break; default:Did you test this? How certain can we be that this doesn't break
anything?I didn't test it as that would require the hardware that I don't have at the moment. However, the value in
clineis PCI cache line size, which is the CPU's cache line size. It is less likely for cache line sizes to be 22 or 50, and more likely for them to be 16 or 32. Also, as far as I understand (and I might be wrong here), cache line size is used for things like aligning DMA requests with CPU cache line, which improve performance but wouldn't break anything if the value doesn't match. In this case, we will fall through to the default case which leavesregunchanged.
Quoted 3 lines
If there is a way to test it with a mock set up or if you still think we need to test this on real board, I'll be happy to try get the hardware. But I will need some guidance around that. Thanks.
I don't have any ideas how to test this as I think the hardware is pretty rare nowadays but I think this is safe to commit, thanks for clearing this up. BTW, what you wrote about would have been perferct in the commit log itself.
Signature · 1 line
Kalle Valo
Quoted 32 lines · Kalle Valo
Quoted 27 lines · Okash Khawaja
Quoted 8 lines · Kalle Valo
Quoted 5 lines · Okash Khawaja
The PCI cache line size value was being compared against decimal values prefixed with 0x.
Fixed the literals to use the correct hex values.Signed-off-by Okash Khawaja <[email protected]>Quoted 8 lines
[...]
Quoted 4 lines
(quoted diff) +0
-0@@ -1101,10 +1101,10 @@ static void adm8211_hw_init(struct
ieee80211_hw*dev) case0x8: reg |= (0x1<< 14); break; - case0x16: + case0x10: reg |= (0x2<< 14); break; - case0x32: + case0x20: reg |= (0x3<< 14); break; default:Did you test this? How certain can we be that this doesn't break anything?
I didn't test it as that would require the hardware that I don't have at the moment. However, the value in
clineis PCI cache line size, which is the CPU's cache line size. It is less likely for cache line sizes to be 22 or 50, and more likely for them to be 16 or 32. Also, as far as I understand (and I might be wrong here), cache line size is used for things like aligning DMA requests with CPU cache line, which improve performance but wouldn't break anything if the value doesn't match. In this case, we will fall through to the default case which leavesregunchanged.
Quoted 11 lines
Quoted 3 lines
If there is a way to test it with a mock set up or if you still think we need to test this on real board, I'll be happy to try get the hardware. But I will need some guidance around that. Thanks.
I don't have any ideas how to test this as I think the hardware is pretty rare nowadays but I think this is safe to commit, thanks for clearing this up. BTW, what you wrote about would have been perferct in the commit log itself.
Signature · 1 line
Kalle Valo
Sure, I'll create v2 of the patch with updated commit log.
Since it's part of a patch set, do you want me to send both the patches in the patch set together as v2 or just this patch?
Thanks
Quoted 4 lines · Okash Khawaja
Sure, I'll create v2 of the patch with updated commit log.
Since it's part of a patch set, do you want me to send both the patches in the patch set together as v2 or just this patch?
Please resend the whole patchset as v2, less problems that way.
Signature · 5 lines
Kalle Valo -- To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi,
Quoted 8 lines · Kalle Valo
Quoted 4 lines · Okash Khawaja
Sure, I'll create v2 of the patch with updated commit log.
Since it's part of a patch set, do you want me to send both the patches in the patch set together as v2 or just this patch?
Please resend the whole patchset as v2, less problems that way.
If you are sending a v2 anyway, I'd suggest using decimal values for the cases, as cache line sizes are usually given in decimal anyway. So just drop the "0x" instead of converting the values ;-)
Jonas
Quoted 12 lines · Jonas Gorski
Hi,
Quoted 8 lines · Kalle Valo
Quoted 4 lines · Okash Khawaja
Sure, I'll create v2 of the patch with updated commit log.
Since it's part of a patch set, do you want me to send both the patches in the patch set together as v2 or just this patch?
Quoted 8 lines
Quoted 1 line
Please resend the whole patchset as v2, less problems that way.
If you are sending a v2 anyway, I'd suggest using decimal values for the cases, as cache line sizes are usually given in decimal anyway. So just drop the "0x" instead of converting the values ;-)
Jonas
Jonas, I had already sent the updated patch by the time I received your email. Is there a convention around this? Thanks--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Quoted 14 lines · Okash Khawaja
Quoted 14 lines · Jonas Gorski
Hi,
Quoted 9 lines · Kalle Valo
Quoted 4 lines · Okash Khawaja
Sure, I'll create v2 of the patch with updated commit log.
Since it's part of a patch set, do you want me to send both the patches in the patch set together as v2 or just this patch?
Please resend the whole patchset as v2, less problems that way.
Quoted 8 lines
Quoted 6 lines
If you are sending a v2 anyway, I'd suggest using decimal values for the cases, as cache line sizes are usually given in decimal anyway. So just drop the "0x" instead of converting the values ;-)
Jonas
Jonas, I had already sent the updated patch by the time I received your email. Is there a convention around this?
You did everything right, just gmail decided "helpfully" they were spam, so I didn't see that you already sent the v2.
So ingore my comment unless you need to send a v3. It's only a minor nitpick but nothing respin-worthy IMHO.
Jonas