ARM/ARM64: vexpress: fixes for v4.1

Hi Arnd/Olof,

Here are few fixes posted on the list and are scattered around. So I am sending them as a series so that you can pick them up easily. Let me know if you prefer a pull request.

Regards,
Sudeep

Robert Schwebel (2):
ARM: vexpress/ca9: Add unified-cache property to l2 cache node
ARM: vexpress/ca9: Add interrupt-affinity to the PMU node

Sudeep Holla (2):
ARM64: juno: add sp810 support and fix sp804 clock frequency
ARM: vexpress/tc2: Add interrupt-affinity to the PMU node

 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts    |  1 +
 arch/arm/boot/dts/vexpress-v2p-ca9.dts        | 11 ++++++----
 arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 31 +++++++++++++++++++++++----
 3 files changed, 35 insertions(+), 8 deletions(-)

1.9.1

The clock generator in IOFPGA generates the two source clocks: 32kHz and 1MHz for the SP810 System Controller.

The SP810 System Controller selects 32kHz or 1MHz as the sources for TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but the maximum of "refclk" and "timclk" is chosen by the SP810 driver.

This patch adds support for SP810 system controller and also fixes the SP804 timer clock frequency.

However the SP804 driver needs to be enabled on ARM64 to test this, which requires SP804 driver to be moved out of arch/arm.

---
 arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 31 +++++++++++++++++++++++----
 1 file changed, 27 insertions(+), 4 deletions(-)

index c138b95a8356..351c95bda89e 100644
@@ -21,6 +21,20 @@
 			clock-output-names = "juno_mb:clk25mhz";
 		};
 
+		v2m_refclk1mhz: refclk1mhz {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1000000>;
+			clock-output-names = "juno_mb:refclk1mhz";
+		};
+
+		v2m_refclk32khz: refclk32khz {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "juno_mb:refclk32khz";
+		};
+
 		motherboard {
 			compatible = "arm,vexpress,v2p-p1", "simple-bus";
 			#address-cells = <2>;  /* SMB chipselect number and offset */

@@ -66,6 +80,15 @@
 				#size-cells = <1>;
 				ranges = <0 3 0 0x200000>;
 
+				v2m_sysctl: sysctl at 020000 {
+					compatible = "arm,sp810", "arm,primecell";
+					reg = <0x020000 0x1000>;
+					clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
+					clock-names = "refclk", "timclk", "apb_pclk";
+					#clock-cells = <1>;
+					clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
+				};
+
 				mmci at 050000 {
 					compatible = "arm,pl180", "arm,primecell";
 					reg = <0x050000 0x1000>;

@@ -106,16 +129,16 @@
 					compatible = "arm,sp804", "arm,primecell";
 					reg = <0x110000 0x10000>;
 					interrupts = <9>;
-					clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
-					clock-names = "timclken1", "apb_pclk";
+					clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>;
+					clock-names = "timclken1", "timclken2", "apb_pclk";
 				};
 
 				v2m_timer23: timer at 120000 {
 					compatible = "arm,sp804", "arm,primecell";
 					reg = <0x120000 0x10000>;
 					interrupts = <9>;
-					clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
-					clock-names = "timclken1", "apb_pclk";
+					clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>;
+					clock-names = "timclken1", "timclken2", "apb_pclk";
 				};
 
 				rtc at 170000 {

1.9.1

From: Robert Schwebel <[email protected]>

Commit d9d1f3e2d711 ("ARM: l2c: check that DT files specify the required "cache-unified" property") mandates to specify this required property. Without this property, we get this boot warning:

"L2C: device tree omits to specify unified cache"

This patch adds "cache-unified" property to L2 cache node in vexpress CA9 device tree.

---
 arch/arm/boot/dts/vexpress-v2p-ca9.dts | 1 +
 1 file changed, 1 insertion(+)

index 23662b5a5e9d..a411274e8b6b 100644
@@ -170,6 +170,7 @@
 		compatible = "arm,pl310-cache";
 		reg = <0x1e00a000 0x1000>;
 		interrupts = <0 43 4>;
+		cache-unified;
 		cache-level = <2>;
 		arm,data-latency = <1 1 1>;
 		arm,tag-latency = <1 1 1>;

1.9.1

From: Robert Schwebel <[email protected]>

Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property.

Without this property, we get this boot warning:

CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

This patch adds interrupt-affinity to the PMU node in the vexpress-v2p-ca9 device tree.

---
 arch/arm/boot/dts/vexpress-v2p-ca9.dts | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

index a411274e8b6b..d949facba376 100644
@@ -33,28 +33,28 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu at 0 {
+		A9_0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu at 1 {
+		A9_1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu at 2 {
+		A9_2: cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <2>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu at 3 {
+		A9_3: cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <3>;

@@ -182,6 +182,8 @@
 			     <0 61 4>,
 			     <0 62 4>,
 			     <0 63 4>;
+		interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>;
+
 	};
 
 	dcc {

1.9.1

Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property.

Without this property, we get this boot warning:

CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

This patch adds interrupt-affinity to the PMU node in the vexpress-ca15_a7(a.k.a TC2) device tree.

---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 1 +
 1 file changed, 1 insertion(+)

index 7a2aeacd62c0..107395c32d82 100644
@@ -191,6 +191,7 @@
 		compatible = "arm,cortex-a15-pmu";
 		interrupts = <0 68 4>,
 			     <0 69 4>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
 	};
 
 	oscclk6a: oscclk6a {

1.9.1

Hi Arnd,

Can you consider this series for your next v4.1-rc* fixes ?

Regards,
Sudeep

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Hi Arnd,

Can you consider this series for your next v4.1-rc* fixes ?

Regards,
Sudeep

Applied all four to the fixes branch, thanks!

Arnd