Skip to contentSkip to conversation

usb: ohci: enable cache support

PATCH New Josh Wu 3 participants 4 messages May 19, 2015 – May 22, 2015

Subsystems (2)
lore
Share & tools
lore

Josh Wu

author
#0 lore raw

PATCH 1/1 usb: ohci: enable cache support

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.

---

 drivers/usb/host/ohci-hcd.c | 10 +---------
 drivers/usb/host/ohci.h     |  2 +-
 2 files changed, 2 insertions(+), 10 deletions(-)
drivers/usb/host/ohci-hcd.c +1 -9
index 494b760..8920b0f 100644
@@ -103,21 +103,13 @@ static struct pci_device_id ehci_pci_ids[] = {
 # define m32_swap(x) cpu_to_le32(x)
 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 
-#ifdef CONFIG_DM_USB
-/*
- * We really should do proper cache flushing everywhere, but for now we only
- * do it for new (driver-model) usb code to avoid regressions.
- */
+/* We really should do proper cache flushing everywhere */
 #define flush_dcache_buffer(addr, size) \
 	flush_dcache_range((unsigned long)(addr), \
 		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 #define invalidate_dcache_buffer(addr, size) \
 	invalidate_dcache_range((unsigned long)(addr), \
 		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
-#else
-#define flush_dcache_buffer(addr, size)
-#define invalidate_dcache_buffer(addr, size)
-#endif
 
 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
drivers/usb/host/ohci.h +1 -1
index f52b4c1..47bd85b 100644
@@ -18,7 +18,7 @@
 # define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
 #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
 
-#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 16
+#if ARCH_DMA_MINALIGN > 16
 #define ED_ALIGNMENT ARCH_DMA_MINALIGN
 #else
 #define ED_ALIGNMENT 16
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 usb: ohci: enable cache support

Hi,

Quoted 4 lines · Josh Wu

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.

Looks good to me:

Regards,

Hans

Quoted 47 lines

---

  drivers/usb/host/ohci-hcd.c | 10 +---------
  drivers/usb/host/ohci.h     |  2 +-
  2 files changed, 2 insertions(+), 10 deletions(-)
drivers/usb/host/ohci-hcd.c +1 -9
index 494b760..8920b0f 100644
@@ -103,21 +103,13 @@ static struct pci_device_id ehci_pci_ids[] = {
  # define m32_swap(x) cpu_to_le32(x)
  #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 
-#ifdef CONFIG_DM_USB
-/*
- * We really should do proper cache flushing everywhere, but for now we only
- * do it for new (driver-model) usb code to avoid regressions.
- */
+/* We really should do proper cache flushing everywhere */
  #define flush_dcache_buffer(addr, size) \
  	flush_dcache_range((unsigned long)(addr), \
  		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
  #define invalidate_dcache_buffer(addr, size) \
  	invalidate_dcache_range((unsigned long)(addr), \
  		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
-#else
-#define flush_dcache_buffer(addr, size)
-#define invalidate_dcache_buffer(addr, size)
-#endif
 
  /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
  #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
drivers/usb/host/ohci.h +1 -1
index f52b4c1..47bd85b 100644
@@ -18,7 +18,7 @@
  # define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
 
-#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 16
+#if ARCH_DMA_MINALIGN > 16
  #define ED_ALIGNMENT ARCH_DMA_MINALIGN
  #else
  #define ED_ALIGNMENT 16
#2 lore raw

PATCH 1/1 usb: ohci: enable cache support

Quoted 6 lines · Hans de Goede

Hi,

Quoted 3 lines · Josh Wu

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.

Quoted 7 lines
Quoted 1 line

Looks good to me:

Regards,

Hi!

This breaks at least colibri_pxa270, I'm dropping it from u-boot-usb/master . Please fix the patch and resubmit.

Thanks!

Best regards,
Marek Vasut