Skip to contentSkip to conversation

ARMv7: Factor out reusable timer_wait from sunxi/psci.S

PATCH New Dongsheng Wang 4 participants 7 messages May 13, 2015 – May 21, 2015

Subsystems (2)
lore
Share & tools
lore
#0 lore raw

PATCH 1/2 ARMv7: Factor out reusable timer_wait from sunxi/psci.S

From: Wang Dongsheng <[email protected]>

timer_wait is moved from sunxi/psci.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well.

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

arch/arm/cpu/armv7/sunxi/psci.S +2 -20
index 7ec0500..6f4c762 100644
@@ -18,6 +18,8 @@
  */
 
 #include <config.h>
+
+#include <asm/arch-armv7/generictimer.h>
 #include <asm/gic.h>
 #include <asm/macro.h>
 #include <asm/psci.h>
@@ -43,26 +45,6 @@
 #define	GICD_BASE		0x1c81000
 #define	GICC_BASE		0x1c82000
 
-.macro	timer_wait	reg, ticks
-	@ Program CNTP_TVAL
-	movw	\reg, #(\ticks & 0xffff)
-	movt	\reg, #(\ticks >> 16)
-	mcr	p15, 0, \reg, c14, c2, 0
-	isb
-	@ Enable physical timer, mask interrupt
-	mov	\reg, #3
-	mcr	p15, 0, \reg, c14, c2, 1
-	@ Poll physical timer until ISTATUS is on
-1:	isb
-	mrc	p15, 0, \reg, c14, c2, 1
-	ands	\reg, \reg, #4
-	bne	1b
-	@ Disable timer
-	mov	\reg, #0
-	mcr	p15, 0, \reg, c14, c2, 1
-	isb
-.endm
-
 .globl	psci_fiq_enter
 psci_fiq_enter:
 	push	{r0-r12}
arch/arm/include/asm/arch-armv7/generictimer.h new file +41 -0

41 lines not on this page · raw message

Signature · 1 line
2.1.0.27.g96db324
#1 lore raw

PATCH 2/2 arm/ls102xa: Add PSCI support for ls102xa

From: Wang Dongsheng <[email protected]>

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

arch/arm/cpu/armv7/ls102xa/Makefile +4 -0
index 2e6a207..2d55782 100644
@@ -12,3 +12,7 @@ obj-y	+= fsl_epu.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
 obj-$(CONFIG_SPL) += spl.o
+
+ifdef CONFIG_ARMV7_PSCI
+obj-y  += psci.o
+endif
arch/arm/cpu/armv7/ls102xa/psci.S new file +126 -0

126 lines not on this page · raw message

include/configs/ls1021aqds.h +2 -0
index 9a8fd50..3c2e335 100644
@@ -11,6 +11,8 @@
 
 #define CONFIG_LS102XA
 
+#define CONFIG_ARMV7_PSCI
+
 #define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_DISPLAY_CPUINFO
include/configs/ls1021atwr.h +2 -0
index 729205f..a3c59a5 100644
@@ -11,6 +11,8 @@
 
 #define CONFIG_LS102XA
 
+#define CONFIG_ARMV7_PSCI
+
 #define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_DISPLAY_CPUINFO
Signature · 1 line
2.1.0.27.g96db324
#2 lore raw

PATCH 2/2 arm/ls102xa: Add PSCI support for ls102xa

Quoted 8 lines · Dongsheng Wang

From: Wang Dongsheng <[email protected]>

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Quoted 6 lines

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

Dongsheng,

Does this patch depend on your 1/2 in this set? Looks not. For future patches, please don't send them as a set if there is no dependency.

Please be specific on which patches this one depends on. Jan Kiszka has a lot of patches.

York

#3 lore raw

PATCH 2/2 arm/ls102xa: Add PSCI support for ls102xa

Quoted 18 lines · York Sun
Quoted 8 lines · Dongsheng Wang

From: Wang Dongsheng <[email protected]>

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Quoted 6 lines

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

Quoted 7 lines

Dongsheng,

Does this patch depend on your 1/2 in this set? Looks not. For future patches, please don't send them as a set if there is no dependency.

Please be specific on which patches this one depends on. Jan Kiszka has a lot of patches.

"A lot" is relative ;). But all are in master now.

Jan

Signature · 2 lines
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
#4 lore raw

PATCH 2/2 arm/ls102xa: Add PSCI support for ls102xa

Quoted 32 lines

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka at siemens.com]
Sent: Thursday, May 21, 2015 2:24 PM
To: Sun York-R58495; Wang Dongsheng-B40534; ijc at hellion.org.uk; hdegoede at redhat.com; albert.u.boot at aribaud.net
Cc: Jin Zhengxiong-R64188; Wang Huan-B18965; Zhao Chenhui-B35336; u- boot at lists.denx.de
Subject: Re: [PATCH 2/2] arm/ls102xa: Add PSCI support for ls102xa

Quoted 20 lines · York Sun
Quoted 8 lines · Dongsheng Wang

From: Wang Dongsheng <[email protected]>

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Quoted 6 lines

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

Dongsheng,

Quoted 8 lines
Quoted 5 lines

Does this patch depend on your 1/2 in this set? Looks not. For future patches, please don't send them as a set if there is no dependency.

Please be specific on which patches this one depends on. Jan Kiszka has a lot of patches.

"A lot" is relative ;). But all are in master now.

Sounds good to me. :)

Regards,
-Dongsheng

#5 lore raw

PATCH 1/2 ARMv7: Factor out reusable timer_wait from sunxi/psci.S

In reply to Dongsheng Wang

Hi,

Quoted 58 lines · Dongsheng Wang

From: Wang Dongsheng <[email protected]>

timer_wait is moved from sunxi/psci.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well.

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

arch/arm/cpu/armv7/sunxi/psci.S +2 -20
index 7ec0500..6f4c762 100644
@@ -18,6 +18,8 @@
  */
 
 #include <config.h>
+
+#include <asm/arch-armv7/generictimer.h>
 #include <asm/gic.h>
 #include <asm/macro.h>
 #include <asm/psci.h>
@@ -43,26 +45,6 @@
 #define        GICD_BASE               0x1c81000
 #define        GICC_BASE               0x1c82000
 
-.macro timer_wait      reg, ticks
-       @ Program CNTP_TVAL
-       movw    \reg, #(\ticks & 0xffff)
-       movt    \reg, #(\ticks >> 16)
-       mcr     p15, 0, \reg, c14, c2, 0
-       isb
-       @ Enable physical timer, mask interrupt
-       mov     \reg, #3
-       mcr     p15, 0, \reg, c14, c2, 1
-       @ Poll physical timer until ISTATUS is on
-1:     isb
-       mrc     p15, 0, \reg, c14, c2, 1
-       ands    \reg, \reg, #4
-       bne     1b
-       @ Disable timer
-       mov     \reg, #0
-       mcr     p15, 0, \reg, c14, c2, 1
-       isb
-.endm
-
 .globl psci_fiq_enter
 psci_fiq_enter:
        push    {r0-r12}
arch/arm/include/asm/arch-armv7/generictimer.h new file +0 -0
new file mode 100644
index 0000000..9cf4105

arch/arm/include/asm/arch-armv7/generictimer.h line 3

Quoted 3 lines
arch/arm/include/asm/arch-armv7/generictimer.h new file +3 -0
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ * Author: Wang Dongsheng <[email protected]>

Since you are only moving code, without making substantial changes to it, don't you think you should keep the original author's (Marc Zyngier CC-ed) copyright here?

ChenYu

Quoted 45 lines
arch/arm/include/asm/arch-armv7/generictimer.h new file +38 -1
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef _GENERICTIMER_H_
+#define _GENERICTIMER_H_
+
+#ifdef __ASSEMBLY__
+
+/*
+ * This macro provide a physical timer that can be used for delay in the code.
+ * The macro is moved from sunxi/psci.S
+ *
+ * reg: is used in this macro.
+ * ticks: The freq is based on generic timer.
+ */
+.macro timer_wait      reg, ticks
+       @ Program CNTP_TVAL
+       movw    \reg, #(\ticks & 0xffff)
+       movt    \reg, #(\ticks >> 16)
+       mcr     p15, 0, \reg, c14, c2, 0
+       isb
+       @ Enable physical timer, mask interrupt
+       mov     \reg, #3
+       mcr     p15, 0, \reg, c14, c2, 1
+       @ Poll physical timer until ISTATUS is on
+1:     isb
+       mrc     p15, 0, \reg, c14, c2, 1
+       ands    \reg, \reg, #4
+       bne     1b
+       @ Disable timer
+       mov     \reg, #0
+       mcr     p15, 0, \reg, c14, c2, 1
+       isb
+.endm
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _GENERICTIMER_H_ */
--

2.1.0.27.g96db324

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

#6 lore raw

PATCH 1/2 ARMv7: Factor out reusable timer_wait from sunxi/psci.S

Quoted 69 lines

-----Original Message-----
From: Chen-Yu Tsai [mailto:wens at csie.org]
Sent: Wednesday, May 13, 2015 2:26 PM
To: Wang Dongsheng-B40534
Cc: Sun York-R58495; Ian Campbell; Hans De Goede; Albert ARIBAUD; Wang Huan- B18965; J. Kiszka; U-Boot Mailing List; Marc Zyngier
Subject: Re: [U-Boot] [PATCH 1/2] ARMv7: Factor out reusable timer_wait from sunxi/psci.S

Hi,

Review

Quoted 53 lines · Dongsheng Wang

From: Wang Dongsheng <[email protected]>

timer_wait is moved from sunxi/psci.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well.

---
This patch depend on Jan Kiszka <[email protected]> patches.

Jan Kiszka patches link:
http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*

arch/arm/cpu/armv7/sunxi/psci.S +2 -20
index 7ec0500..6f4c762 100644
@@ -18,6 +18,8 @@
  */
 
 #include <config.h>
+
+#include <asm/arch-armv7/generictimer.h>
 #include <asm/gic.h>
 #include <asm/macro.h>
 #include <asm/psci.h>
@@ -43,26 +45,6 @@
 #define        GICD_BASE               0x1c81000
 #define        GICC_BASE               0x1c82000
 
-.macro timer_wait      reg, ticks
-       @ Program CNTP_TVAL
-       movw    \reg, #(\ticks & 0xffff)
-       movt    \reg, #(\ticks >> 16)
-       mcr     p15, 0, \reg, c14, c2, 0
-       isb
-       @ Enable physical timer, mask interrupt
-       mov     \reg, #3
-       mcr     p15, 0, \reg, c14, c2, 1
-       @ Poll physical timer until ISTATUS is on
-1:     isb
-       mrc     p15, 0, \reg, c14, c2, 1
-       ands    \reg, \reg, #4
-       bne     1b
-       @ Disable timer
-       mov     \reg, #0
-       mcr     p15, 0, \reg, c14, c2, 1
-       isb
-.endm
-
 .globl psci_fiq_enter
 psci_fiq_enter:
        push    {r0-r12}
(quoted diff) +0 -0

b/arch/arm/include/asm/arch-armv7/generictimer.h

Quoted 13 lines

arch/arm/include/asm/arch-armv7/generictimer.h line 3

Quoted 8 lines

new file mode 100644
index 0000000..9cf4105

arch/arm/include/asm/arch-armv7/generictimer.h new file +3 -0
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ * Author: Wang Dongsheng <[email protected]>

Since you are only moving code, without making substantial changes to it, don't you think you should keep the original author's (Marc Zyngier CC-ed) copyright here?

Totally agree. Should keep the original author's copyright.

BTW, I missed to do 'checkpatch' for this patch. I will fix the code style in next version.

Regards,
-Dongsheng