armv8/ls2085ardb: Add eth & phy f/w loading support
PATCH 1/20 armv8/ls2085ardb: Add eth & phy f/w loading support
Add support for board eth initialization and support for loading phy firmware. PHY firmware needs to be loaded from board_eth_init() because all the MACs are not initialized by ldpaa_eth driver.
--- board/freescale/ls2085ardb/Makefile | 2 +- board/freescale/ls2085ardb/eth_ls2085rdb.c | 133 +++++++++++++++++++++++++++++ board/freescale/ls2085ardb/ls2085ardb.c | 13 --- include/configs/ls2085ardb.h | 23 +++++ 4 files changed, 157 insertions(+), 14 deletions(-) create mode 100644 board/freescale/ls2085ardb/eth_ls2085rdb.c
board/freescale/ls2085ardb/Makefile +1 -1
@@ -4,5 +4,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += ls2085ardb.o +obj-y += ls2085ardb.o eth_ls2085rdb.o obj-y += ddr.o
board/freescale/ls2085ardb/eth_ls2085rdb.c new file +133 -0
133 lines not on this page · raw message
board/freescale/ls2085ardb/ls2085ardb.c +0 -13
@@ -176,19 +176,6 @@ unsigned long get_dram_size_to_hide(void)return dram_to_hide; } -int board_eth_init (bd_t *bis) -{ -int error =0 ; - -#ifdef CONFIG_FSL_MC_ENET - error =cpu_eth_init (bis); -#endif - - error =pci_eth_init (bis); - -return error; -} -#ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet (void *fdt) {
include/configs/ls2085ardb.h +23 -0
@@ -302,4 +302,27 @@ unsigned long get_board_sys_clk(void);"kernel_load=0xa0000000\0" \"kernel_size=0x1000000\0" +/* MAC/PHY configuration */ +#ifdef CONFIG_FSL_MC_ENET +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_CORTINA +#define CONFIG_PHYLIB +#define CONFIG_SYS_CORTINA_FW_IN_NOR +#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_LENGTH 0x40000 + +#define CORTINA_PHY_ADDR1 0x10 +#define CORTINA_PHY_ADDR2 0x11 +#define CORTINA_PHY_ADDR3 0x12 +#define CORTINA_PHY_ADDR4 0x13 +#define AQ_PHY_ADDR1 0x00 +#define AQ_PHY_ADDR2 0x01 +#define AQ_PHY_ADDR3 0x02 +#define AQ_PHY_ADDR4 0x03 + +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPNI1" +#define CONFIG_PHY_GIGE +#endif +#endif /* __LS2_RDB_H */
Signature · 1 line
1.9.1
PATCH 2/20 armv8/ls2085ardb: add hwconfig setting for eSDHC
From: Yangbo Lu <[email protected]>
Add hwconfig setting for eSDHC since it shares some pins with other IP block.
--- board/freescale/ls2085ardb/ls2085ardb.c | 36 +++++++++++++++++++++++++++++++++ include/configs/ls2085ardb.h | 2 ++ 2 files changed, 38 insertions(+)
board/freescale/ls2085ardb/ls2085ardb.c +36 -0
@@ -10,6 +10,7 @@#include <fsl_ifc.h> #include <fsl_ddr.h> #include <asm/io.h> +#include <hwconfig.h> #include <fdt_support.h> #include <libfdt.h> #include <fsl_debug_server.h>
@@ -21,8 +22,15 @@#include "../common/qixis.h" #include "ls2085ardb_qixis.h" +#define PIN_MUX_SEL_SDHC 0x00 + +#define SET_SDHC_MUX_SEL (reg, value) ((reg & 0xf0) | value)DECLARE_GLOBAL_DATA_PTR ; +enum { +MUX_TYPE_SDHC , +}; +unsigned long long get_qixis_addr (void ) {unsigned long long addr;
@@ -129,6 +137,34 @@ int board_early_init_f(void)return 0 ; } +int config_board_mux (int ctrl_type) +{ +u8 reg5; + + reg5 =QIXIS_READ (brdcfg[5 ]); + +switch (ctrl_type) { +case MUX_TYPE_SDHC : + reg5 =SET_SDHC_MUX_SEL (reg5,PIN_MUX_SEL_SDHC ); +break ; +default : +printf ("Wrong mux interface type\n" ); +return -1 ; + } + +QIXIS_WRITE (brdcfg[5 ], reg5); + +return 0 ; +} + +int misc_init_r (void ) +{ +if (hwconfig ("sdhc" )) +config_board_mux (MUX_TYPE_SDHC ); + +return 0 ; +} +void detail_board_ddr_info (void ) {puts ("\nDDR " );
include/configs/ls2085ardb.h +2 -0
@@ -288,6 +288,8 @@ unsigned long get_board_sys_clk(void);#define CONFIG_DOS_PARTITION #endif +#define CONFIG_MISC_INIT_R +/* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS#define CONFIG_EXTRA_ENV_SETTINGS \
Signature · 1 line
1.9.1
PATCH 3/20 armv8/ls2085a: Enable Date command for QDS and RDB
In reply to Prabhakar KushwahaFrom: Priyanka Jain <[email protected]>
Enable Date command for QDS and RDB boards
--- include/configs/ls2085aqds.h | 1 + include/configs/ls2085ardb.h | 1 + 2 files changed, 2 insertions(+)
include/configs/ls2085aqds.h +1 -0
@@ -288,6 +288,7 @@ unsigned long get_board_ddr_clk(void);#define RTC #define CONFIG_RTC_DS3231 1#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM
include/configs/ls2085ardb.h +1 -0
@@ -253,6 +253,7 @@ unsigned long get_board_sys_clk(void);#define RTC #define CONFIG_RTC_DS3231 1#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM
Signature · 1 line
1.9.1
PATCH 4/20 armv8/ls2085aqds: Add support of 0x49 in ethernet
In reply to Prabhakar KushwahaAdd support of 0x49 SerDes protocol for ls2085aqds platform
--- board/freescale/ls2085aqds/eth.c | 2 ++ 1 file changed, 2 insertions(+)
board/freescale/ls2085aqds/eth.c +2 -0
@@ -210,6 +210,7 @@ static void initialize_dpmac_to_slot(void)switch (serdes2_prtcl) {case 0x07 :case 0x08 : +case 0x49 :printf ("qds: WRIOP: Supported SerDes Protocol 0x%02x\n" , serdes2_prtcl); lane_to_slot_fsm2[0 ] =EMI1_SLOT4 ;
@@ -247,6 +248,7 @@ void ls2085a_handle_phy_interface_sgmii(int dpmac_id)switch (serdes2_prtcl) {case 0x07 :case 0x08 : +case 0x49 : lane =serdes_get_first_lane (FSL_SRDS_2 ,SGMII9 + (dpmac_id -9 )); slot = lane_to_slot_fsm2[lane];
Signature · 1 line
1.9.1
PATCH 4/20 armv8/ls2085aqds: Add support of 0x49 in ethernet
Prabhakar,
Quoted 2 lines · Prabhakar Kushwaha
Add support of
0x49SerDes protocol for ls2085aqds platform
I would change the subject to "Add support of SerDes protocol 0x49". If you want, you can put in commit message to explain what 0x49 does. Unless one is familiar with SerDes protocols, it wouldn't be easy to link 0x49 to Ethernet.
York
Quoted 26 lines
Signed-off-by Prabhakar Kushwaha <[email protected]>--- board/freescale/ls2085aqds/eth.c | 2 ++ 1 file changed, 2 insertions(+)board/freescale/ls2085aqds/eth.c +2
-0@@ -210,6 +210,7 @@ static void initialize_dpmac_to_slot(void)switch (serdes2_prtcl) {case 0x07 :case 0x08 : +case 0x49 :printf ("qds: WRIOP: Supported SerDes Protocol 0x%02x\n" , serdes2_prtcl); lane_to_slot_fsm2[0 ] =EMI1_SLOT4 ;@@ -247,6 +248,7 @@ void ls2085a_handle_phy_interface_sgmii(int dpmac_id)switch (serdes2_prtcl) {case 0x07 :case 0x08 : +case 0x49 : lane =serdes_get_first_lane (FSL_SRDS_2 ,SGMII9 + (dpmac_id -9 )); slot = lane_to_slot_fsm2[lane];
PATCH 5/20 armv8/ls2085a: call ft_pcie_setup() to change dts status
In reply to Prabhakar KushwahaFrom: Minghuan Lian <[email protected]>
1. The patch call ft_pcie_setup() to disable PCIe dts node if corresponding PCIe controller is disabled according to RCW.
2. Fix LS2085a PCIe compatible
--- board/freescale/ls2085a/ls2085a.c | 4 ++++ board/freescale/ls2085aqds/ls2085aqds.c | 4 ++++ board/freescale/ls2085ardb/ls2085ardb.c | 4 ++++ include/configs/ls2085a_common.h | 3 ++- 4 files changed, 14 insertions(+), 1 deletion(-)
board/freescale/ls2085a/ls2085a.c +4 -0
@@ -142,6 +142,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif +#ifdef CONFIG_PCI +ft_pcie_setup (blob, bd); +#endif + return 0; }#endif
board/freescale/ls2085aqds/ls2085aqds.c +4 -0
@@ -255,6 +255,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif +#ifdef CONFIG_PCI +ft_pci_setup (blob, bd); +#endif + return 0; }#endif
board/freescale/ls2085ardb/ls2085ardb.c +4 -0
@@ -253,6 +253,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif +#ifdef CONFIG_PCI +ft_pci_setup (blob, bd); +#endif + return 0; }#endif
include/configs/ls2085a_common.h +2 -1
@@ -186,7 +186,8 @@ unsigned long long get_qixis_addr(void);#define CONFIG_PCIE2 /* PCIE controler 2 */ #define CONFIG_PCIE3 /* PCIE controler 3 */ #define CONFIG_PCIE4 /* PCIE controler 4 */ -#define FSL_PCIE_COMPAT "fsl,20851a-pcie" +#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ +#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"#define CONFIG_SYS_PCI_64BIT
Signature · 1 line
1.9.1
PATCH 5/20 armv8/ls2085a: call ft_pcie_setup() to change dts status
Prabhakar and Minghuan,
Quoted 20 lines · Prabhakar Kushwaha
From: Minghuan Lian <[email protected]>
1. The patch call
ft_pcie_setup()to disable PCIe dts node if corresponding PCIe controller is disabled according to RCW.
2. Fix LS2085a PCIe compatibleSigned-off-by Minghuan Lian <[email protected]>Signed-off-by Prabhakar Kushwaha <[email protected]>--- board/freescale/ls2085a/ls2085a.c | 4 ++++ board/freescale/ls2085aqds/ls2085aqds.c | 4 ++++ board/freescale/ls2085ardb/ls2085ardb.c | 4 ++++ include/configs/ls2085a_common.h | 3 ++- 4 files changed, 14 insertions(+), 1 deletion(-)board/freescale/ls2085a/ls2085a.c +0
-0
board/freescale/ls2085a/ls2085a.c int ft_board_setup(void *blob, bd_t *bd) · line 148
Quoted 7 lines
board/freescale/ls2085a/ls2085a.c +4
-0@@ -142,6 +142,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif +#ifdef CONFIG_PCI +ft_pcie_setup (blob, bd); +#endif +
Shouldn't this function be called from SoC function? It is not a board-dependent setup, but rather depending on RCW which is an SoC feature.
York
PATCH 5/20 armv8/ls2085a: call ft_pcie_setup() to change dts status
Hi York,
1. board/freescale/ls2085a/ls2085a.c is for board ls2085a_emu like ls2085aqds.c not SoC file. But I am not sure whether emulator board should call this function.
2. ft_pcie_setup(blob, bd) should be changed to ft_pci_setup(blob, bd) ft_pci_setup is the common function name defined in common.h
Thanks,
Minghuan
Quoted 44 lines
-----Original Message-----
From: Sun York-R58495
Sent: Tuesday, May 26, 2015 11:54 PM
To: Kushwaha Prabhakar-B32579; u-boot at lists.denx.de
Cc: Lian Minghuan-B31939
Subject: Re: [PATCH 05/20] armv8/ls2085a: callft_pcie_setup()to change dts statusPrabhakar and Minghuan,
Quoted 21 lines · Prabhakar Kushwaha
From: Minghuan Lian <[email protected]>
1. The patch call
ft_pcie_setup()to disable PCIe dts node if corresponding PCIe controller is disabled according to RCW.
2. Fix LS2085a PCIe compatibleSigned-off-by Minghuan Lian <[email protected]>Signed-off-by Prabhakar Kushwaha <[email protected]>--- board/freescale/ls2085a/ls2085a.c | 4 ++++ board/freescale/ls2085aqds/ls2085aqds.c | 4 ++++ board/freescale/ls2085ardb/ls2085ardb.c | 4 ++++ include/configs/ls2085a_common.h | 3 ++- 4 files changed, 14 insertions(+), 1 deletion(-)board/freescale/ls2085a/ls2085a.c +0
-0board/freescale/ls2085a/ls2085a.c int ft_board_setup(void *blob, bd_t *bd) · line 148
Quoted 7 lines
board/freescale/ls2085a/ls2085a.c +4
-0@@ -142,6 +142,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif +#ifdef CONFIG_PCI +ft_pcie_setup (blob, bd); +#endif +Shouldn't this function be called from SoC function? It is not a board- dependent setup, but rather depending on RCW which is an SoC feature.
York
PATCH 5/20 armv8/ls2085a: call ft_pcie_setup() to change dts status
Quoted 57 lines
-----Original Message-----
From: Lian Minghuan-B31939
Sent: Wednesday, May 27, 2015 9:11 AM
To: Sun York-R58495; Kushwaha Prabhakar-B32579; u-boot at lists.denx.de
Subject: RE: [PATCH 05/20] armv8/ls2085a: callft_pcie_setup()to change dts statusHi York,
1.
board/freescale/ls2085a/ls2085a.cis for boardls2085a_emulikels2085aqds.cnot SoC file.
But I am not sure whether emulator board should call this function.
2.ft_pcie_setup(blob, bd)should be changed toft_pci_setup(blob, bd)ft_pci_setupis the common function name defined incommon.hThanks,
MinghuanQuoted 35 lines
-----Original Message-----
From: Sun York-R58495
Sent: Tuesday, May 26, 2015 11:54 PM
To: Kushwaha Prabhakar-B32579; u-boot at lists.denx.de
Cc: Lian Minghuan-B31939
Subject: Re: [PATCH 05/20] armv8/ls2085a: callft_pcie_setup()to change dts statusPrabhakar and Minghuan,
Quoted 24 lines · Prabhakar Kushwaha
From: Minghuan Lian <[email protected]>
1. The patch call
ft_pcie_setup()to disable PCIe dts node if corresponding PCIe controller is disabled according to RCW.
2. Fix LS2085a PCIe compatibleSigned-off-by Minghuan Lian <[email protected]>Signed-off-by Prabhakar Kushwaha <[email protected]>--- board/freescale/ls2085a/ls2085a.c | 4 ++++ board/freescale/ls2085aqds/ls2085aqds.c | 4 ++++ board/freescale/ls2085ardb/ls2085ardb.c | 4 ++++ include/configs/ls2085a_common.h | 3 ++- 4 files changed, 14 insertions(+), 1 deletion(-)board/freescale/ls2085a/ls2085a.c +0
-0@@ -142,6 +142,10 @@ int ft_board_setup(void *blob, bd_t *bd)fsl_mc_ldpaa_exit (bd);#endif
Quoted 9 lines
Quoted 7 lines
board/freescale/ls2085a/ls2085a.c int ft_board_setup(void *blob, bd_t *bd) · line 148
Quoted 4 lines
board/freescale/ls2085a/ls2085a.c +4
-0+#ifdef CONFIG_PCI +ft_pcie_setup (blob, bd); +#endif +Shouldn't this function be called from SoC function? It is not a board- dependent setup, but rather depending on RCW which is an SoC
feature.
Quoted 1 line
There are 2 function and their relationship is like this ft_pci_setup calling ft_pcie_ls_setup.
ft_pcie_ls_setup is doing thing related to SoC.
So I believe ft_pci_setup can be called from board file. Not sure
--prabhakar
PATCH 5/20 armv8/ls2085a: call ft_pcie_setup() to change dts status
Quoted 12 lines · On 05/26/2015 09:30 PM, Kushwaha Prabhakar-B32579 wrote:
Quoted 5 lines
Quoted 3 lines
Shouldn't this function be called from SoC function? It is not a board- dependent setup, but rather depending on RCW which is an SoC
feature.
Quoted 1 line
There are 2 function and their relationship is like this
ft_pci_setupcallingft_pcie_ls_setup.
ft_pcie_ls_setupis doing thing related to SoC.
So I believeft_pci_setupcan be called from board file. Not sure
I was thinking to move the call to fdt.c for the SoC, for example in the function of ft_cpu_setup().
York
PATCH 6/20 armv8/ls2085qds: Update SFP TX bit as "0" to enable XFI
In reply to Prabhakar KushwahaFPGA BRDCFG9[SFP_TX] should be clear in order to enable XFI ports.
--- board/freescale/ls2085aqds/eth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
board/freescale/ls2085aqds/eth.c +1 -1
@@ -53,7 +53,7 @@ static int riser_phy_addr[] = {#define EMI1_SLOT5 4#define EMI1_SLOT6 5#define EMI2 6 -#define SFP_TX 1 +#define SFP_TX 0static const char *const mdio_names[] = {"LS2085A_QDS_MDIO0" ,
Signature · 1 line
1.9.1
PATCH 7/20 armv8/ls2085rdb: Update PCA9547PW slave address
In reply to Prabhakar KushwahaPrimary Mux on I2C1 controller has slave address as 0x75. So update it's address.
--- include/configs/ls2085ardb.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
include/configs/ls2085ardb.h +2 -2
@@ -241,8 +241,8 @@ unsigned long get_board_sys_clk(void);/* * I2C */ -#define I2C_MUX_PCA_ADDR 0x77 -#define I2C_MUX_PCA_ADDR_PRI 0x77/* Primary Mux*/ +#define I2C_MUX_PCA_ADDR 0x75 +#define I2C_MUX_PCA_ADDR_PRI 0x75/* Primary Mux*/ /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8
Signature · 1 line
1.9.1
PATCH 7/20 armv8/ls2085rdb: Update PCA9547PW slave address
Quoted 2 lines · Prabhakar Kushwaha
Primary Mux on I2C1 controller has slave address as
0x75. So update it's address.
s/it's/its
York