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armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr

PATCH Superseded Prabhakar Kushwaha 2 participants 2 messages May 18, 2015 – May 26, 2015

v1 of 2 Superseded Latest is v2 →

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Prabhakar Kushwaha

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PATCH 19/20 armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr

From: Stuart Yoder <[email protected]>

The agreed split of the top of memory is 256M for debug server and 256M for MC. This patch implements the split.

In addition, the MC mem must be 512MB aligned, so the amount of memory to hide must be 512MB to achieve that alignment.

Signed-off-by Stuart Yoder <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
---
 board/freescale/ls2085a/ls2085a.c       |  2 +-
 board/freescale/ls2085aqds/ls2085aqds.c |  2 +-
 board/freescale/ls2085ardb/ls2085ardb.c |  2 +-
 include/configs/ls2085a_common.h        | 21 ++++++++++++++++++---
 4 files changed, 21 insertions(+), 6 deletions(-)
board/freescale/ls2085a/ls2085a.c +1 -1
index bcb99de..c776ea8 100644
@@ -80,7 +80,7 @@ unsigned long get_dram_size_to_hide(void)
 	dram_to_hide += mc_get_dram_block_size();
 #endif
 
-	return dram_to_hide;
+	return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
 }
 
 int board_eth_init(bd_t *bis)
board/freescale/ls2085aqds/ls2085aqds.c +1 -1
index 67b3062..65b4957 100644
@@ -215,7 +215,7 @@ unsigned long get_dram_size_to_hide(void)
 	dram_to_hide += mc_get_dram_block_size();
 #endif
 
-	return dram_to_hide;
+	return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
 }
 
 #ifdef CONFIG_FSL_MC_ENET
board/freescale/ls2085ardb/ls2085ardb.c +1 -1
index 531ecf3..a536d8c 100644
@@ -212,7 +212,7 @@ unsigned long get_dram_size_to_hide(void)
 	dram_to_hide += mc_get_dram_block_size();
 #endif
 
-	return dram_to_hide;
+	return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
 }
 
 #ifdef CONFIG_FSL_MC_ENET
include/configs/ls2085a_common.h +18 -3
index a33b8a9..c895291 100644
@@ -163,21 +163,36 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_NAND_BASE_PHYS		0x30000000
 
 /* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE	(512UL * 1024 * 1024)
 /* 2 sec timeout */
 #define CONFIG_SYS_DEBUG_SERVER_TIMEOUT			(2 * 1000 * 1000)
 
 /* MC firmware */
 #define CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE	(512UL * 1024 * 1024)
 /* TODO Actual DPL max length needs to be confirmed with the MC FW team */
 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET    0x00F00000
 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET    0x00F20000
 
-/* Carve out a DDR region which will not be used by u-boot/Linux */
+/*
+ * Carve out a DDR region which will not be used by u-boot/Linux
+ *
+ * The default end-of-memory partitioning looks like this:
+ *
+ *   +---------------+ <-- top/end of memory
+ *   |    256MB      |  debug server
+ *   +---------------+
+ *   |    256MB      |  MC
+ *   +---------------+
+ *   |     ...       |
+ *
+ * The MC region must be 512MB aligned, so the
+ * min size to hide is 512MB.
+ */
 #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
+#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE	(256UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE		(256UL * 1024 * 1024)
+#define CONFIG_SYS_MEM_TOP_HIDE_MIN			(512UL * 1024 * 1024)
 #define CONFIG_SYS_MEM_TOP_HIDE		get_dram_size_to_hide()
 #endif
Signature · 1 line
1.9.1
#1 lore raw

PATCH 19/20 armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr

Quoted 11 lines · Prabhakar Kushwaha

From: Stuart Yoder <[email protected]>

The agreed split of the top of memory is 256M for debug server and 256M for MC. This patch implements the split.

In addition, the MC mem must be 512MB aligned, so the amount of memory to hide must be 512MB to achieve that alignment.

Signed-off-by Stuart Yoder <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>

---

<snip>

Quoted 24 lines
include/configs/ls2085a_common.h +2 -3
index a33b8a9..c895291 100644
@@ -163,21 +163,36 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_NAND_BASE_PHYS		0x30000000
 
 /* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE	(512UL * 1024 * 1024)
 /* 2 sec timeout */
 #define CONFIG_SYS_DEBUG_SERVER_TIMEOUT			(2 * 1000 * 1000)
 
 /* MC firmware */
 #define CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE	(512UL * 1024 * 1024)
 /* TODO Actual DPL max length needs to be confirmed with the MC FW team */
 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET    0x00F00000
 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET    0x00F20000
 
-/* Carve out a DDR region which will not be used by u-boot/Linux */
+/*
+ * Carve out a DDR region which will not be used by u-boot/Linux

include/configs/ls2085a_common.h unsigned long long get_qixis_addr(void); · line 188

Quoted 10 lines
include/configs/ls2085a_common.h +10 -0
+ *
+ * The default end-of-memory partitioning looks like this:
+ *
+ *   +---------------+ <-- top/end of memory
+ *   |    256MB      |  debug server
+ *   +---------------+
+ *   |    256MB      |  MC
+ *   +---------------+
+ *   |     ...       |
+ *

I suggest to put this into a README file, together with the hiding memory mechanism.

York