Skip to contentSkip to conversation

ARM: tegra124: pmu support

PATCH Superseded Kyle Huey 3 participants 3 messages Jun 13, 2015 – Jun 15, 2015

Subsystems (2)
Device tree bindings Tegra architecture support

v1 of 3 Superseded Latest is v3 →

lore
Share & tools
lore

Kyle Huey

author
#0 lore raw

PATCH 1/1 ARM: tegra124: pmu support

This patch modifies the device tree for tegra124 based devices to enable the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM DP-06905-001_v03p. This patch was tested on a Jetson TK1.

Signed-off-by Kyle Huey <[email protected]>
---
 arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/tegra124.dtsi +8 -0
index 4be06c6..9032ccb 100644
@@ -190,6 +190,14 @@
 		status = "disabled";
 	};
 
+	pmu {
+		compatible = "arm,cortex-a15-pmu";
+		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	timer at 0,60005000 {
 		compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
 		reg = <0x0 0x60005000 0x0 0x400>;
Signature · 1 line
1.9.1
maintainer
#1 lore raw

PATCH 1/1 ARM: tegra124: pmu support

Adding linux-tegra ML ...

Quoted 17 lines · Kyle Huey

This patch modifies the device tree for tegra124 based devices to enable the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM DP-06905-001_v03p. This patch was tested on a Jetson TK1.

Signed-off-by Kyle Huey <[email protected]>
---
 arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/tegra124.dtsi +1 -0
index 4be06c6..9032ccb 100644
@@ -190,6 +190,14 @@
 		status = "disabled";
 	};
 
+	pmu {

arch/arm/boot/dts/tegra124.dtsi line 203

Quoted 10 lines
arch/arm/boot/dts/tegra124.dtsi +7 -0
+		compatible = "arm,cortex-a15-pmu";
+		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	timer at 0,60005000 {
 		compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
 		reg = <0x0 0x60005000 0x0 0x400>;
Acked-by Jon Hunter <[email protected]>

Cheers
Jon

#2 lore raw

PATCH 1/1 ARM: tegra124: pmu support

Quoted 1 line · Jon Hunter

Adding linux-tegra ML ...

Oh, still none of the Tegra maintainers are CC'd. scripts/get_maintainer.pl.

Quoted 10 lines · Kyle Huey
Quoted 8 lines

This patch modifies the device tree for tegra124 based devices to enable the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM DP-06905-001_v03p. This patch was tested on a Jetson TK1.

Signed-off-by Kyle Huey <[email protected]>
---
  arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++
  1 file changed, 8 insertions(+)
arch/arm/boot/dts/tegra124.dtsi +0 -0
Quoted 9 lines

arch/arm/boot/dts/tegra124.dtsi line 201

Quoted 9 lines
arch/arm/boot/dts/tegra124.dtsi +8 -0
+	pmu {
+		compatible = "arm,cortex-a15-pmu";
+		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
  	timer at 0,60005000 {

This looks like it's sorted in the wrong location. Nodes are currently grouped by those with reg property (sorted by reg) and those without a reg property (sorted alphabetically).