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dmaengine: mv_xor improvements

PATCH RESEND Superseded Thomas Petazzoni 2 participants 8 messages Jun 17, 2015 – Sep 10, 2015

Subsystems (2)

v1 of 4 Superseded Latest is v4 →

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#0 lore raw

cover dmaengine: mv_xor improvements

Hello,

(Same patches as previous iteration, only this time the relevant mailing list are in Cc. Sorry for the noise.)

The following four patches implement various improvements in the support of XOR on Marvell EBU platforms:

- It adds support for suspend/resume to mv_xor.

- It removes the need for the dmacap,* Device Tree properties, which are quite useful.

- It updates the Device Tree according to the removal of the dmacap,* removal, and make Armada 38x and Armada 39x use the new capabilities of the XOR hardware using the armada-380-xor compatible string.

The patches are on top of Vinod Koul's next branch, since he already has a number of mv_xor changes queued up.

Thanks,

Thomas

Thomas Petazzoni (4):
dmaengine: mv_xor: add suspend/resume support
dmaengine: mv_xor: remove support for dmacap,* DT properties
ARM: mvebu: remove unneeded dmacap,* properties in Device Trees
ARM: mvebu: use armada-380-xor on Armada 38x and 39x

 Documentation/devicetree/bindings/dma/mv-xor.txt | 10 ++---
 arch/arm/boot/dts/armada-370.dtsi                | 10 -----
 arch/arm/boot/dts/armada-375.dtsi                | 10 -----
 arch/arm/boot/dts/armada-38x.dtsi                | 14 +-----
 arch/arm/boot/dts/armada-39x.dtsi                | 14 +-----
 arch/arm/boot/dts/armada-xp.dtsi                 | 10 -----
 arch/arm/boot/dts/dove.dtsi                      |  8 ----
 drivers/dma/mv_xor.c                             | 56 +++++++++++++++++++++---
 drivers/dma/mv_xor.h                             |  1 +
 9 files changed, 59 insertions(+), 74 deletions(-)
Signature · 1 line
2.1.0
#1 lore raw

PATCH RESEND 1/4 dmaengine: mv_xor: add suspend/resume support

This commit adds suspend/resume support to the mv_xor driver. The config and interrupt mask registers must be saved and restored, and upon resume, the MBus windows configuration must also be done again.

Tested on Armada 388 GP, with a RAID 5 array, accessed before and after a suspend to RAM cycle.

Based on work from Ofer Heifetz and Lior Amsalem.

---
 drivers/dma/mv_xor.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/dma/mv_xor.h |  1 +
 2 files changed, 48 insertions(+)
drivers/dma/mv_xor.c +47 -0
index fbaf1ea..86bb371 100644
@@ -1120,6 +1120,51 @@ mv_xor_conf_mbus_windows(struct mv_xor_device *xordev,
 	writel(0, base + WINDOW_OVERRIDE_CTRL(1));
 }
 
+static int mv_xor_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct mv_xor_device *xordev = platform_get_drvdata(pdev);
+	int i;
+
+	for (i = 0; i < MV_XOR_MAX_CHANNELS; i++) {
+		struct mv_xor_chan *mv_chan = xordev->channels[i];
+
+		if (!mv_chan)
+			continue;
+
+		mv_chan->saved_config_reg =
+			readl_relaxed(XOR_CONFIG(mv_chan));
+		mv_chan->saved_int_mask_reg =
+			readl_relaxed(XOR_INTR_MASK(mv_chan));
+	}
+
+	return 0;
+}
+
+static int mv_xor_resume(struct platform_device *dev)
+{
+	struct mv_xor_device *xordev = platform_get_drvdata(dev);
+	const struct mbus_dram_target_info *dram;
+	int i;
+
+	for (i = 0; i < MV_XOR_MAX_CHANNELS; i++) {
+		struct mv_xor_chan *mv_chan = xordev->channels[i];
+
+		if (!mv_chan)
+			continue;
+
+		writel_relaxed(mv_chan->saved_config_reg,
+			       XOR_CONFIG(mv_chan));
+		writel_relaxed(mv_chan->saved_int_mask_reg,
+			       XOR_INTR_MASK(mv_chan));
+	}
+
+	dram = mv_mbus_dram_info();
+	if (dram)
+		mv_xor_conf_mbus_windows(xordev, dram);
+
+	return 0;
+}
+
 static const struct of_device_id mv_xor_dt_ids[] = {
 	{ .compatible = "marvell,orion-xor", .data = (void *)XOR_MODE_IN_REG },
 	{ .compatible = "marvell,armada-380-xor", .data = (void *)XOR_MODE_IN_DESC },
@@ -1283,6 +1328,8 @@ static int mv_xor_remove(struct platform_device *pdev)
 static struct platform_driver mv_xor_driver = {
 	.probe		= mv_xor_probe,
 	.remove		= mv_xor_remove,
+	.suspend        = mv_xor_suspend,
+	.resume         = mv_xor_resume,
 	.driver		= {
 		.name	        = MV_XOR_NAME,
 		.of_match_table = of_match_ptr(mv_xor_dt_ids),
drivers/dma/mv_xor.h +1 -0
index b7455b4..41a2e8d 100644
@@ -126,6 +126,7 @@ struct mv_xor_chan {
 	char			dummy_src[MV_XOR_MIN_BYTE_COUNT];
 	char			dummy_dst[MV_XOR_MIN_BYTE_COUNT];
 	dma_addr_t		dummy_src_addr, dummy_dst_addr;
+	u32                     saved_config_reg, saved_int_mask_reg;
 };
 
 /**
Signature · 1 line
2.1.0
#2 lore raw

PATCH RESEND 2/4 dmaengine: mv_xor: remove support for dmacap, * DT properties

In reply to Thomas Petazzoni

The only reason why we had dmacap,* properties is because back when DMA_MEMSET was supported, only one out of the two channels per engine could do a memset operation. But this is something that the driver already knows anyway, and since then, the DMA_MEMSET support has been removed.

The driver is already well aware of what each channel supports and the one to one mapping between Linux specific implementation details (such as dmacap,interrupt enabling DMA_INTERRUPT) and DT properties is a good indication that these DT properties are wrong.

Therefore, this commit simply gets rid of these dmacap,* properties, they are now ignored, and the driver is responsible for knowing the capabilities of the hardware with regard to the dmaengine subsystem expectations.

---
 Documentation/devicetree/bindings/dma/mv-xor.txt | 10 ++++------
 drivers/dma/mv_xor.c                             |  9 +++------
 2 files changed, 7 insertions(+), 12 deletions(-)
Documentation/devicetree/bindings/dma/mv-xor.txt +4 -6
index cc29c35..276ef81 100644
@@ -12,10 +12,13 @@ XOR engine has. Those sub-nodes have the following required
 properties:
 - interrupts: interrupt of the XOR channel
 
-And the following optional properties:
+The sub-nodes used to contain one or several of the following
+properties, but they are now deprecated:
 - dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
 - dmacap,memset to indicate that the XOR channel is capable of memset operations
 - dmacap,xor to indicate that the XOR channel is capable of xor operations
+- dmacap,interrupt to indicate that the XOR channel is capable of
+  generating interrupts
 
 Example:
 
@@ -28,13 +31,8 @@ xor at d0060900 {
 
 	xor00 {
 	      interrupts = <51>;
-	      dmacap,memcpy;
-	      dmacap,xor;
 	};
 	xor01 {
 	      interrupts = <52>;
-	      dmacap,memcpy;
-	      dmacap,xor;
-	      dmacap,memset;
 	};
 };
drivers/dma/mv_xor.c +3 -6
index 86bb371..e8d4c60 100644
@@ -1235,12 +1235,9 @@ static int mv_xor_probe(struct platform_device *pdev)
 			op_in_desc = (int)of_id->data;
 
 			dma_cap_zero(cap_mask);
-			if (of_property_read_bool(np, "dmacap,memcpy"))
-				dma_cap_set(DMA_MEMCPY, cap_mask);
-			if (of_property_read_bool(np, "dmacap,xor"))
-				dma_cap_set(DMA_XOR, cap_mask);
-			if (of_property_read_bool(np, "dmacap,interrupt"))
-				dma_cap_set(DMA_INTERRUPT, cap_mask);
+			dma_cap_set(DMA_MEMCPY, cap_mask);
+			dma_cap_set(DMA_XOR, cap_mask);
+			dma_cap_set(DMA_INTERRUPT, cap_mask);
 
 			irq = irq_of_parse_and_map(np, 0);
 			if (!irq) {
Signature · 1 line
2.1.0
#3 lore raw

PATCH RESEND 3/4 ARM: mvebu: remove unneeded dmacap, * properties in Device Trees

In reply to Thomas Petazzoni

The dmacap,* properties are now ignored by the mv_xor driver, who knows what are the capabilities of the hardware. For the DMA_XOR and DMA_MEMCPY capabilities, there are no changes: they were anyway mentionned in all DTs. The DMA_MEMSET operation (enabled by dmacap,memset) was ignored since the removal of DMA_MEMSET support from mv_xor. Also, now the DMA_INTERRUPT capability is enabled for all SoCs.

---
Note: this patch should only be applied once 'dmaengine: mv_xor:
remove support for dmacap,* DT properties' is applied.

---
 arch/arm/boot/dts/armada-370.dtsi | 10 ----------
 arch/arm/boot/dts/armada-375.dtsi | 10 ----------
 arch/arm/boot/dts/armada-38x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-39x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-xp.dtsi  | 10 ----------
 arch/arm/boot/dts/dove.dtsi       |  8 --------
 6 files changed, 58 deletions(-)
arch/arm/boot/dts/armada-370.dtsi +0 -10
index 00b50db5..cb68579 100644
@@ -278,14 +278,9 @@
 
 				xor00 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -297,14 +292,9 @@
 
 				xor10 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/armada-375.dtsi +0 -10
index f076ff8..ebee84a 100644
@@ -476,14 +476,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -496,14 +491,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-38x.dtsi +0 -10
index 218a2ac..1710523 100644
@@ -456,14 +456,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -476,14 +471,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-39x.dtsi +0 -10
index ecd1318..9c510d8 100644
@@ -331,14 +331,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -351,14 +346,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-xp.dtsi +0 -10
index 013d63f..9c46054 100644
@@ -209,14 +209,9 @@
 
 				xor10 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -229,14 +224,9 @@
 
 				xor00 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/dove.dtsi +0 -8
index 9ad8295..e71c552 100644
@@ -261,14 +261,10 @@
 
 				channel0 {
 					interrupts = <39>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <40>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
@@ -281,14 +277,10 @@
 
 				channel0 {
 					interrupts = <42>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <43>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
Signature · 1 line
2.1.0
#4 lore raw

PATCH RESEND 3/4 ARM: mvebu: remove unneeded dmacap, * properties in Device Trees

Hi Thomas,

Quoted 9 lines · Thomas Petazzoni

The dmacap,* properties are now ignored by the mv_xor driver, who knows what are the capabilities of the hardware. For the DMA_XOR and DMA_MEMCPY capabilities, there are no changes: they were anyway mentionned in all DTs. The DMA_MEMSET operation (enabled by dmacap,memset) was ignored since the removal of DMA_MEMSET support from mv_xor. Also, now the DMA_INTERRUPT capability is enabled for all SoCs.

I will wait for that 'dmaengine: mv_xor: remove support for dmacap,* DT properties' was applied before applying it.

Thanks,

Gregory

Quoted 217 lines

---
Note: this patch should only be applied once 'dmaengine: mv_xor:
remove support for dmacap,* DT properties' is applied.

---
 arch/arm/boot/dts/armada-370.dtsi | 10 ----------
 arch/arm/boot/dts/armada-375.dtsi | 10 ----------
 arch/arm/boot/dts/armada-38x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-39x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-xp.dtsi  | 10 ----------
 arch/arm/boot/dts/dove.dtsi       |  8 --------
 6 files changed, 58 deletions(-)
arch/arm/boot/dts/armada-370.dtsi +0 -10
index 00b50db5..cb68579 100644
@@ -278,14 +278,9 @@
 
 				xor00 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -297,14 +292,9 @@
 
 				xor10 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/armada-375.dtsi +0 -10
index f076ff8..ebee84a 100644
@@ -476,14 +476,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -496,14 +491,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-38x.dtsi +0 -10
index 218a2ac..1710523 100644
@@ -456,14 +456,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -476,14 +471,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-39x.dtsi +0 -10
index ecd1318..9c510d8 100644
@@ -331,14 +331,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -351,14 +346,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-xp.dtsi +0 -10
index 013d63f..9c46054 100644
@@ -209,14 +209,9 @@
 
 				xor10 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -229,14 +224,9 @@
 
 				xor00 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/dove.dtsi +0 -8
index 9ad8295..e71c552 100644
@@ -261,14 +261,10 @@
 
 				channel0 {
 					interrupts = <39>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <40>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
@@ -281,14 +277,10 @@
 
 				channel0 {
 					interrupts = <42>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <43>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#5 lore raw

PATCH RESEND 3/4 ARM: mvebu: remove unneeded dmacap, * properties in Device Trees

Hi Thomas,

Quoted 11 lines · Gregory CLEMENT

Hi Thomas,

Quoted 8 lines · Thomas Petazzoni

The dmacap,* properties are now ignored by the mv_xor driver, who knows what are the capabilities of the hardware. For the DMA_XOR and DMA_MEMCPY capabilities, there are no changes: they were anyway mentionned in all DTs. The DMA_MEMSET operation (enabled by dmacap,memset) was ignored since the removal of DMA_MEMSET support from mv_xor. Also, now the DMA_INTERRUPT capability is enabled for all SoCs.

Quoted 6 lines
Quoted 1 line

I will wait for that 'dmaengine: mv_xor: remove support for dmacap,* DT properties' was applied before applying it.

Actually this patch does not apply anymore on recent kernel. Could you rebase it on 4.3-rc1 when it will be released and then submit it again?

Thanks,

Gregory

Quoted 223 lines

Thanks,

Gregory

Quoted 217 lines

---
Note: this patch should only be applied once 'dmaengine: mv_xor:
remove support for dmacap,* DT properties' is applied.

---
 arch/arm/boot/dts/armada-370.dtsi | 10 ----------
 arch/arm/boot/dts/armada-375.dtsi | 10 ----------
 arch/arm/boot/dts/armada-38x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-39x.dtsi | 10 ----------
 arch/arm/boot/dts/armada-xp.dtsi  | 10 ----------
 arch/arm/boot/dts/dove.dtsi       |  8 --------
 6 files changed, 58 deletions(-)
arch/arm/boot/dts/armada-370.dtsi +0 -10
index 00b50db5..cb68579 100644
@@ -278,14 +278,9 @@
 
 				xor00 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -297,14 +292,9 @@
 
 				xor10 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/armada-375.dtsi +0 -10
index f076ff8..ebee84a 100644
@@ -476,14 +476,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -496,14 +491,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-38x.dtsi +0 -10
index 218a2ac..1710523 100644
@@ -456,14 +456,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -476,14 +471,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-39x.dtsi +0 -10
index ecd1318..9c510d8 100644
@@ -331,14 +331,9 @@
 
 				xor00 {
 					interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -351,14 +346,9 @@
 
 				xor10 {
 					interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
arch/arm/boot/dts/armada-xp.dtsi +0 -10
index 013d63f..9c46054 100644
@@ -209,14 +209,9 @@
 
 				xor10 {
 					interrupts = <51>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor11 {
 					interrupts = <52>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 
@@ -229,14 +224,9 @@
 
 				xor00 {
 					interrupts = <94>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 				xor01 {
 					interrupts = <95>;
-					dmacap,memcpy;
-					dmacap,xor;
-					dmacap,memset;
 				};
 			};
 		};
arch/arm/boot/dts/dove.dtsi +0 -8
index 9ad8295..e71c552 100644
@@ -261,14 +261,10 @@
 
 				channel0 {
 					interrupts = <39>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <40>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
@@ -281,14 +277,10 @@
 
 				channel0 {
 					interrupts = <42>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 
 				channel1 {
 					interrupts = <43>;
-					dmacap,memcpy;
-					dmacap,xor;
 				};
 			};
 
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#6 lore raw

PATCH RESEND 4/4 ARM: mvebu: use armada-380-xor on Armada 38x and 39x

In reply to Thomas Petazzoni

The Armada 38x and 39x SoC support have an updated XOR hardware block compared to previous SoCs. These features can be enabled by using the 'armada-380-xor' compatible string, available since commit 6f166312c6ea ("dmaengine: mv_xor: add support for a38x command in descriptor mode").

---
 arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
 arch/arm/boot/dts/armada-39x.dtsi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/armada-38x.dtsi +2 -2
index 1710523..4851d32 100644
@@ -448,7 +448,7 @@
 			};
 
 			xor at 60800 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60800 0x100
 				       0x60a00 0x100>;
 				clocks = <&gateclk 22>;
@@ -463,7 +463,7 @@
 			};
 
 			xor at 60900 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60900 0x100
 				       0x60b00 0x100>;
 				clocks = <&gateclk 28>;
arch/arm/boot/dts/armada-39x.dtsi +2 -2
index 9c510d8..b77c8dc 100644
@@ -323,7 +323,7 @@
 			};
 
 			xor at 60800 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60800 0x100
 				       0x60a00 0x100>;
 				clocks = <&gateclk 22>;
@@ -338,7 +338,7 @@
 			};
 
 			xor at 60900 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60900 0x100
 				       0x60b00 0x100>;
 				clocks = <&gateclk 28>;
Signature · 1 line
2.1.0
#7 lore raw

PATCH RESEND 4/4 ARM: mvebu: use armada-380-xor on Armada 38x and 39x

Hi Thomas,

Quoted 7 lines · Thomas Petazzoni

The Armada 38x and 39x SoC support have an updated XOR hardware block compared to previous SoCs. These features can be enabled by using the 'armada-380-xor' compatible string, available since commit 6f166312c6ea ("dmaengine: mv_xor: add support for a38x command in descriptor mode").

applied on mvebu/dt-4.3

Thanks,

Gregory

Quoted 50 lines
---
 arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
 arch/arm/boot/dts/armada-39x.dtsi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/armada-38x.dtsi +2 -2
index 1710523..4851d32 100644
@@ -448,7 +448,7 @@
 			};
 
 			xor at 60800 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60800 0x100
 				       0x60a00 0x100>;
 				clocks = <&gateclk 22>;
@@ -463,7 +463,7 @@
 			};
 
 			xor at 60900 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60900 0x100
 				       0x60b00 0x100>;
 				clocks = <&gateclk 28>;
arch/arm/boot/dts/armada-39x.dtsi +2 -2
index 9c510d8..b77c8dc 100644
@@ -323,7 +323,7 @@
 			};
 
 			xor at 60800 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60800 0x100
 				       0x60a00 0x100>;
 				clocks = <&gateclk 22>;
@@ -338,7 +338,7 @@
 			};
 
 			xor at 60900 {
-				compatible = "marvell,orion-xor";
+				compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 				reg = <0x60900 0x100
 				       0x60b00 0x100>;
 				clocks = <&gateclk 28>;
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com