ARM: dts: Add USB and OTG related nodes and enable on various boards
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cover ARM: dts: Add USB and OTG related nodes and enable on various boards
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
Regards,
Hans
PATCH 1/20 ARM: dts: sun4i: Add USB Dual Role Controller
Add a node for the otg/drc usb controller to sun4i-a10.dtsi.
--- arch/arm/boot/dts/sun4i-a10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm/boot/dts/sun4i-a10.dtsi +12 -0
@@ -611,6 +611,18 @@ #size-cells = <0>; }; + usb_otg: usb at 01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <38>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy at 01c13400 { #phy-cells = <1>; compatible = "allwinner,sun4i-a10-usb-phy";
Signature · 1 line
2.4.2
PATCH 2/20 ARM: dts: sun5i: Add USB Dual Role Controller
In reply to Hans de GoedeAdd a node for the otg/drc usb controller to sun5i-a1*.dtsi.
--- arch/arm/boot/dts/sun5i.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm/boot/dts/sun5i.dtsi +12 -0
@@ -416,6 +416,18 @@ #size-cells = <0>; }; + usb_otg: usb at 01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <38>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy at 01c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy";
Signature · 1 line
2.4.2
PATCH 3/20 ARM: dts: sun6i: Add USB Dual Role Controller
In reply to Hans de GoedeAdd a node for the otg/drc usb controller to sun6i-a31.dtsi.
--- arch/arm/boot/dts/sun6i-a31.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm/boot/dts/sun6i-a31.dtsi +12 -0
@@ -512,6 +512,18 @@ #size-cells = <0>; }; + usb_otg: usb at 01c19000 { + compatible = "allwinner,sun6i-a31-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + usbphy: phy at 01c19400 { compatible = "allwinner,sun6i-a31-usb-phy"; reg = <0x01c19400 0x10>,
Signature · 1 line
2.4.2
PATCH 4/20 ARM: dts: sun7i: Add USB Dual Role Controller
In reply to Hans de GoedeFrom: Roman Byshko <[email protected]>
Add a node for the otg/drc usb controller to sun7i-a20.dtsi
--- arch/arm/boot/dts/sun7i-a20.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm/boot/dts/sun7i-a20.dtsi +12 -0
@@ -699,6 +699,18 @@ #size-cells = <0>; }; + usb_otg: usb at 01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy at 01c13400 { #phy-cells = <1>; compatible = "allwinner,sun7i-a20-usb-phy";
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2.4.2
PATCH 5/20 ARM: dts: sun8i: Add A23 usb-phy and otg nodes
In reply to Hans de GoedeNote these are added to the sun8i-a23.dtsi file rather then to the shared sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33 are slightly different.
--- arch/arm/boot/dts/sun8i-a23.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/sun8i-a23.dtsi +32 -0
@@ -58,6 +58,38 @@ clock-output-names = "mbus"; }; }; + + soc at 01c00000 { + usb_otg: usb at 01c19000 { + compatible = "allwinner,sun6i-a31-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + usbphy: phy at 01c19400 { + compatible = "allwinner,sun8i-a23-usb-phy"; + reg = <0x01c19400 0x10>, + <0x01c1a800 0x4>; + reg-names = "phy_ctrl", + "pmu1"; + clocks = <&usb_clk 8>, + <&usb_clk 9>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + }; }; &pio {
Signature · 1 line
2.4.2
PATCH 6/20 ARM: dts: sun8i: Add A33 usb-phy and otg nodes
In reply to Hans de GoedeNote these are added to the sun8i-a33.dtsi file rather then to the shared sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33 are slightly different.
--- arch/arm/boot/dts/sun8i-a33.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/sun8i-a33.dtsi +32 -0
@@ -80,6 +80,38 @@ clock-output-names = "mbus"; }; }; + + soc at 01c00000 { + usb_otg: usb at 01c19000 { + compatible = "allwinner,sun8i-a33-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + usbphy: phy at 01c19400 { + compatible = "allwinner,sun8i-a33-usb-phy"; + reg = <0x01c19400 0x14>, + <0x01c1a800 0x4>; + reg-names = "phy_ctrl", + "pmu1"; + clocks = <&usb_clk 8>, + <&usb_clk 9>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + }; }; &pio {
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2.4.2
PATCH 7/20 ARM: dts: sun8i: Add support for USB controllers on A23/A33
In reply to Hans de GoedeFrom: Chen-Yu Tsai <[email protected]>
A23/A33 has one pair of EHCI/OHCI USB controllers. There are 2 USB PHYs, one for the USB OTG controller, one for the EHCI/OHCI pair. The latter may also support HSIC, though none of the available boards utilize this, so this is not supported yet.
--- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm/boot/dts/sun8i-a23-a33.dtsi +22 -0
@@ -332,6 +332,28 @@ #size-cells = <0>; }; + ehci0: usb at 01c1a000 { + compatible = "allwinner,sun8i-a23-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb1_gates 26>; + resets = <&ahb1_rst 26>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb at 01c1a400 { + compatible = "allwinner,sun8i-a23-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb1_gates 29>, <&usb_clk 16>; + resets = <&ahb1_rst 29>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + pio: pinctrl at 01c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>;
Signature · 1 line
2.4.2
PATCH 8/20 ARM: dts: sun4i: Enable USB DRC on Chuwi V7 CW0825
In reply to Hans de GoedeEnable the otg/drc usb controller on the Chuwi V7 CW0825 tablet.
--- arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts | 34 +++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts +34 -0
@@ -114,6 +114,30 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; +}; + +®_usb0_vbus { + status = "okay"; +}; + ®_usb2_vbus { status = "okay"; };
@@ -124,7 +148,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; };
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2.4.2
PATCH 9/20 ARM: dts: sun4i: Enable USB DRC on the Cubieboard
In reply to Hans de GoedeEnable the otg/drc usb controller on the Cubieboard. Note that the 5V of the otg is directly connected to the general 5V, so we only use the id pin.
--- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +19 -0
@@ -155,6 +155,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_cubieboard: led_pins at 0 { allwinner,pins = "PH20", "PH21";
@@ -162,6 +166,13 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; ®_ahci_5v {
@@ -216,7 +227,15 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";
Signature · 1 line
2.4.2
PATCH 9/20 ARM: dts: sun4i: Enable USB DRC on the Cubieboard
Hi Hans,
Quoted 41 lines · Hans de Goede
Enable the otg/drc usb controller on the Cubieboard. Note that the 5V of the otg is directly connected to the general 5V, so we only use the id pin.
Signed-off-by Hans de Goede <[email protected]>--- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)arch/arm/boot/dts/sun4i-a10-cubieboard.dts +11
-0@@ -155,6 +155,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_cubieboard: led_pins at 0 { allwinner,pins = "PH20", "PH21";@@ -162,6 +166,13 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; ®_ahci_5v {@@ -216,7 +227,15 @@ status = "okay"; };
arch/arm/boot/dts/sun4i-a10-cubieboard.dts line 238
Quoted 10 lines
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +8
-0+&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
Does that work?
Your phy driver seem to actively check at probe time for both the ID detect and VBUS detect pins to be set in the DT, which is not the case here.
I don't really get either why VBUS detect has to be set. Can't it work just fine if you have a regulator that you can control and the ID pin alone ?
Maxime
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Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150618/c483ce68/attachment.sig>
PATCH 9/20 ARM: dts: sun4i: Enable USB DRC on the Cubieboard
Hi,
Quoted 45 lines · Maxime Ripard
Hi Hans,
Quoted 42 lines · Hans de Goede
Enable the otg/drc usb controller on the Cubieboard. Note that the 5V of the otg is directly connected to the general 5V, so we only use the id pin.
Signed-off-by Hans de Goede <[email protected]>--- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)arch/arm/boot/dts/sun4i-a10-cubieboard.dts +11
-0@@ -155,6 +155,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_cubieboard: led_pins at 0 { allwinner,pins = "PH20", "PH21";@@ -162,6 +166,13 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; ®_ahci_5v {@@ -216,7 +227,15 @@ status = "okay"; };
Quoted 11 lines
arch/arm/boot/dts/sun4i-a10-cubieboard.dts line 238
Quoted 9 lines
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +8
-0+&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */Does that work?
Yes :)
Quoted 3 lines
Your phy driver seem to actively check at probe time for both the ID detect and VBUS detect pins to be set in the DT, which is not the case here.
My initial version did, later on I added a patch adding special handling for boards which have Vusb hardwired to the 5V of the board such as the cubieboard (the schematics show both a current regulator and an optional 0 ohm resistor to short-circuit that, it seems that the boards are shipped with short-circuiting resistor, at least all mine are (both a10 and a20 variants).
See here for the patch:
https://github.com/jwrdegoede/linux-sunxi/commit/b73922986cab2bad9d54a2a1223583008e155bc4
This is part of the v5 phy-sun4i-usb series I send to Kishon a week ago.
Quoted 3 lines
I don't really get either why VBUS detect has to be set. Can't it work just fine if you have a regulator that you can control and the ID pin alone ?
Not really, we can work around it as done in the above commit, but it is not ideal.
Vbus detect going low is used by the musb silicon to determine that the current session has ended, and without this happening it will not switch from host to device mode or vice versa no matter what the id pin does.
Vbus detect is also used to not provide power to the port if external power is present as doing so is not a good idea.
Last vbus-detect is used to detect that the devices connected to the port are using too much power.
Regards,
Hans
PATCH 10/20 ARM: dts: sun5i: Enable USB DRC on UTOO P66
In reply to Hans de GoedeEnable the OTG controller on the UTOO P66 tablet.
--- arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts +27 -0
@@ -153,6 +153,10 @@ }; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_p66: mmc0_cd_pin at 0 { allwinner,pins = "PG0";
@@ -161,6 +165,20 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + i2c_lcd_pins: i2c_lcd_pin at 0 { allwinner,pins = "PG10", "PG12"; allwinner,function = "gpio_out";
@@ -219,7 +237,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_ldo3>; status = "okay";
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2.4.2
PATCH 11/20 ARM: dts: sun6i: Enable USB DRC on the Mele A1000G quad
In reply to Hans de GoedeThe Mele A1000G-quad has an usb to sata bridge connected to its otg controller, this commit enables support for this. Since the otg is hardwired to the sata bridge it gets enabled in host only mode.
--- arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts +5 -0
@@ -143,6 +143,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { usb1_vbus-supply = <®_usb1_vbus>; status = "okay";
Signature · 1 line
2.4.2
PATCH 12/20 ARM: dts: sun7i: Enable USB DRC on Cubietruck
In reply to Hans de GoedeFrom: Roman Byshko <[email protected]>
Enable the otg/drc usb controller on the cubietruck.
--- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
arch/arm/boot/dts/sun7i-a20-cubietruck.dts +27 -0
@@ -199,6 +199,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { vmmc3_pin_cubietruck: vmmc3_pin at 0 { allwinner,pins = "PH9";
@@ -227,6 +231,20 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH19"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; &pwm {
@@ -288,7 +306,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ + usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>;
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2.4.2
PATCH 13/20 ARM: dts: sun7i: Enable USB DRC on A20-OLinuxIno-Lime
In reply to Hans de GoedeEnable the otg/drc usb controller on the A20-OLinuxIno-Lime.
--- arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 32 ++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +32 -0
@@ -135,6 +135,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 { allwinner,pins = "PC3";
@@ -149,6 +153,20 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; }; ®_ahci_5v {
@@ -157,6 +175,10 @@ status = "okay"; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; };
@@ -171,7 +193,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";
Signature · 1 line
2.4.2
PATCH 14/20 ARM: dts: sun7i: Enable USB DRC on A20-OLinuxIno-Micro
In reply to Hans de GoedeEnable the otg/drc usb controller on the A20-OLinuxIno-Micro.
--- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 32 +++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +32 -0
@@ -215,6 +215,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc3_cd_pin_olinuxinom: mmc3_cd_pin at 0 { allwinner,pins = "PH11";
@@ -229,12 +233,30 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; }; ®_ahci_5v { status = "okay"; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; };
@@ -275,7 +297,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";
Signature · 1 line
2.4.2
PATCH 15/20 ARM: dts: sun7i: Enable USB DRC on Bananapi (BROKEN!)
In reply to Hans de GoedeEnable the otg/drc usb controller on the Bananapi.
This is based on the fex file settings which claim that vbus-det is PH5, but this does not work and the schematic shows that it is actually connected to gpio1 of the axp209, so we cannot add otg support for the bananapi until we get support for the axp209 gpio pins in the kernel.
--- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/sun7i-a20-bananapi.dts +32 -0
@@ -159,7 +159,25 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in";
@@ -182,6 +200,10 @@ }; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; };
@@ -216,7 +238,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";
Signature · 1 line
2.4.2
PATCH 15/20 ARM: dts: sun7i: Enable USB DRC on Bananapi (BROKEN!)
Hi,
Quoted 8 lines · Hans de Goede
Enable the otg/drc usb controller on the Bananapi.
This is based on the fex file settings which claim that vbus-det is PH5, but this does not work and the schematic shows that it is actually connected to gpio1 of the axp209, so we cannot add otg support for the bananapi until we get support for the axp209 gpio pins in the kernel.
Signed-off-by Hans de Goede <[email protected]>
This one obviously should not have been part of this set, please ignore this one.
Thanks,
Hans
Quoted 64 lines
--- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)arch/arm/boot/dts/sun7i-a20-bananapi.dts +32
-0@@ -159,7 +159,25 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin at 0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in";@@ -182,6 +200,10 @@ }; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; };@@ -216,7 +238,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";
PATCH 16/20 ARM: dts: sun8i: Enable USB DRC on Ippo Q8H-A23 tablets
In reply to Hans de GoedeEnable the otg controller on Ippo Q8H tablets, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic.
For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used.
--- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +9 -0
@@ -125,3 +125,12 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +};
Signature · 1 line
2.4.2
PATCH 17/20 ARM: dts: sun8i: Enable USB DRC on Ippo Q8H-A33 tablet
In reply to Hans de GoedeEnable the otg/drc usb controller on the Ippo Q8H-A33 tablet, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic.
For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used.
--- arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts +9 -0
@@ -116,3 +116,12 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +};
Signature · 1 line
2.4.2
PATCH 18/20 ARM: dts: sun8i: Enable USB DRC on GA10H-A33 tablets
In reply to Hans de GoedeEnable the otg controller on GA10H-A33 tablets, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic.
For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used.
--- arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts +9 -0
@@ -123,3 +123,12 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +};
Signature · 1 line
2.4.2
PATCH 19/20 ARM: dts: sun8i: Enable USB host on GA10H-A33 tablets
In reply to Hans de GoedeThe GA10H tablets not only have an otg connector, but also a normal usb host connector, enabled support for this.
--- arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts +8 -0
@@ -61,6 +61,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>;
@@ -109,6 +113,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &pio { mmc0_cd_pin_q8h: mmc0_cd_pin at 0 { allwinner,pins = "PB4";
Signature · 1 line
2.4.2
PATCH 20/20 ARM: dts: sun8i: sina33: Enable USB hosts
In reply to Hans de GoedeFrom: Chen-Yu Tsai <[email protected]>
The Sina33 SDK board exposes the EHCI/OHCI USB host pair. VBUS for this port is always on and non-controllable.
--- arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +13 -0
@@ -63,6 +63,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &lradc { vref-supply = <®_vcc3v0>; status = "okay";
@@ -113,6 +117,10 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; +&ohci0 { + status = "okay"; +}; + &pio { mmc0_cd_pin_sina33: mmc0_cd_pin at 0 { allwinner,pins = "PB4";
@@ -127,3 +135,8 @@ pinctrl-0 = <&uart0_pins_b>; status = "okay"; }; + +&usbphy { + status = "okay"; + usb1_vbus-supply = <®_vcc5v0>; /* USB1 VBUS is always on */ +};
Signature · 1 line
2.4.2
cover ARM: dts: Add USB and OTG related nodes and enable on various boards
In reply to Hans de GoedeHi Hans,
Quoted 8 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
Thanks,
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150608/77496d30/attachment.sig>
Hello,
Quoted 8 lines · Maxime Ripard
Hi Hans,
Quoted 5 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
Quoted 6 lines
Quoted 3 lines
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
Are these before the conversion to DT label syntax or after (meaning that the conversion patches got pulled somewhere already)?
Thanks
Michal
Hi,
Quoted 15 lines · Michal Suchanek
Hello,
Quoted 12 lines · Maxime Ripard
Hi Hans,
Quoted 8 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
Quoted 5 lines
Quoted 2 lines
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
Are these before the conversion to DT label syntax or after (meaning that the conversion patches got pulled somewhere already)?
Yes. They've been in my tree for a few monthes now, and have been in linux-next and arm-soc for quite some time too.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150609/254c4bf4/attachment.sig>
cover ARM: dts: Add USB and OTG related nodes and enable on various boards
In reply to Maxime RipardHi,
Quoted 8 lines · Maxime Ripard
Hi Hans,
Quoted 5 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
Quoted 6 lines
Quoted 3 lines
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
I've just created a branch with just these patches directly on top of sunxi/for-next for you:
https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
While preparing this branch I noticed that the dts for the ippo q8h a33 tablets is not yet merged:
http://www.spinics.net/lists/devicetree/msg82149.html
You suggested to use the DT quirks interface instead of creating a separate dts for each board variant, and in the end I agreed, and asked you to merge it renamed to a more generic name without the lcd1024x600 bit in there.
I can make it more generic and resend it myself. Do you want me to squash in the otg changes when I resend it, or shall I keep those separate ?
Regards,
Hans
cover ARM: dts: Add USB and OTG related nodes and enable on various boards
Hi,
Quoted 15 lines · Hans de Goede
Hi,
Quoted 12 lines · Maxime Ripard
Hi Hans,
Quoted 8 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
Quoted 7 lines
Quoted 2 lines
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
I've just created a branch with just these patches directly on top of sunxi/for-next for you:
https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
Please ignore this for now. There have been some changes to the extcon framework, making it more integrated with devicetree, this means I need to add an extcon property to the musb nodes in devicetree:
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt +2 -0
@@ -12,6 +12,7 @@ Required properties: - phys : phy specifier for the otg phy - phy-names : must be "usb" - dr_mode : Dual-Role mode must be "host" or "otg" + - extcon : extcon specifier for the otg phy Example:
@@ -23,5 +24,6 @@ Example: interrupt-names = "mc"; phys = <&usbphy 0>; phy-names = "usb"; + extcon = <&usbphy 0>; status = "disabled"; };
arch/arm/boot/dts/sun7i-a20.dtsi +1 -0
@@ -773,6 +773,7 @@ interrupt-names = "mc"; phys = <&usbphy 0>; phy-names = "usb"; + extcon = <&usbphy 0>; allwinner,sram = <&otg_sram 1>; status = "disabled"; };
I'll push a new version of the patches to otg-dts-for-maxime with the extcon property added for you and ping you when it is ready.
Quoted 5 lines
While preparing this branch I noticed that the dts for the ippo q8h a33 tablets is not yet merged:
Quoted 8 lines
You suggested to use the DT quirks interface instead of creating a separate dts for each board variant, and in the end I agreed, and asked you to merge it renamed to a more generic name without the lcd1024x600 bit in there.
I can make it more generic and resend it myself. Do you want me to squash in the otg changes when I resend it, or shall I keep those separate ?
And about this one: ping ?
Thanks & Regards,
Hans
cover ARM: dts: Add USB and OTG related nodes and enable on various boards
Hi,
Quoted 59 lines · Hans de Goede
Hi,
Quoted 15 lines · Hans de Goede
Hi,
Quoted 12 lines · Maxime Ripard
Hi Hans,
Quoted 8 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
Quoted 7 lines
Quoted 2 lines
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
I've just created a branch with just these patches directly on top of sunxi/for-next for you:
https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
Please ignore this for now. There have been some changes to the extcon framework, making it more integrated with devicetree, this means I need to add an extcon property to the musb nodes in devicetree:
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt +2
-0@@ -12,6 +12,7 @@ Required properties: - phys : phy specifier for the otg phy - phy-names : must be "usb" - dr_mode : Dual-Role mode must be "host" or "otg" + - extcon : extcon specifier for the otg phy Example:@@ -23,5 +24,6 @@ Example: interrupt-names = "mc"; phys = <&usbphy 0>; phy-names = "usb"; + extcon = <&usbphy 0>; status = "disabled"; };arch/arm/boot/dts/sun7i-a20.dtsi +1
-0@@ -773,6 +773,7 @@ interrupt-names = "mc"; phys = <&usbphy 0>; phy-names = "usb"; + extcon = <&usbphy 0>; allwinner,sram = <&otg_sram 1>; status = "disabled"; };
Quoted 3 lines
I'll push a new version of the patches to otg-dts-for-maxime with the extcon property added for you and ping you when it is ready.
Done, https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
now contains the necessary changes and is ready for merging for 4.3.
Regards,
Hans
cover ARM: dts: Add USB and OTG related nodes and enable on various boards
Quoted 6 lines · Hans de Goede
Quoted 3 lines
I'll push a new version of the patches to otg-dts-for-maxime with the extcon property added for you and ping you when it is ready.
Done, https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
now contains the necessary changes and is ready for merging for 4.3.
Just to make things clear, it's the updated version with extcon that I merged.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150616/e515743b/attachment.sig>
Maxime Ripard
Appliedcover ARM: dts: Add USB and OTG related nodes and enable on various boards
In reply to Hans de GoedeQuoted 15 lines · Hans de Goede
Hi,
Quoted 12 lines · Maxime Ripard
Hi Hans,
Quoted 8 lines · Hans de Goede
Hi Maxime,
Here is a patch-set with all the otg / sun8i-usb-host related dts patches I've accumulated.
These are intended for 4.3, and go hand in hand with the outstanding musb-sunxi / phy-sun4i-usb patches, which I expect to be merged as is for 4.3 .
Quoted 7 lines
Quoted 2 lines
I'm fine with these patches. Do you have a branch somewhere that I can pull (without the one that you wanted me to drop, obviously)?
I've just created a branch with just these patches directly on top of sunxi/for-next for you:
https://github.com/jwrdegoede/linux-sunxi/commits/otg-dts-for-maxime
Queued for 4.3, thanks!
Quoted 6 lines
While preparing this branch I noticed that the dts for the ippo q8h a33 tablets is not yet merged:
Quoted 8 lines
You suggested to use the DT quirks interface instead of creating a separate dts for each board variant, and in the end I agreed, and asked you to merge it renamed to a more generic name without the lcd1024x600 bit in there.
I can make it more generic and resend it myself. Do you want me to squash in the otg changes when I resend it, or shall I keep those separate ?
Sorry for being so late on that, let's discuss this in the other thread.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150616/96c814ef/attachment.sig>