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imx: mx6 remove duplicated enable_cspi_clock

PATCH Superseded Peng Fan 3 participants 7 messages Jun 25, 2015 – Jun 29, 2015 Arm (32-bit)

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Peng Fan

author
#0 lore raw

PATCH v2 1/2 imx: mx6 remove duplicated enable_cspi_clock

enable_spi_clock does the same thing with enable_cspi_clock, so remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file convert cm_fx6/spl.c to use enable_spi_clk

---
 arch/arm/cpu/armv7/mx6/clock.c        | 19 -------------------
 arch/arm/include/asm/arch-mx6/clock.h |  1 -
 board/compulab/cm_fx6/spl.c           |  2 +-
 3 files changed, 1 insertion(+), 21 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -19
index ae99945..1134770 100644
@@ -102,25 +102,6 @@ void enable_uart_clk(unsigned char enable)
 }
 #endif
 
-#ifdef CONFIG_SPI
-/* spi_num can be from 0 - 4 */
-int enable_cspi_clock(unsigned char enable, unsigned spi_num)
-{
-	u32 mask;
-
-	if (spi_num > 4)
-		return -EINVAL;
-
-	mask = MXC_CCM_CCGR_CG_MASK << (spi_num * 2);
-	if (enable)
-		setbits_le32(&imx_ccm->CCGR1, mask);
-	else
-		clrbits_le32(&imx_ccm->CCGR1, mask);
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_MMC
 int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
 {
arch/arm/include/asm/arch-mx6/clock.h +0 -1
index a6de5ee..7b3bbb8 100644
@@ -57,7 +57,6 @@ void hab_caam_clock_enable(unsigned char enable);
 void enable_ocotp_clk(unsigned char enable);
 void enable_usboh3_clk(unsigned char enable);
 void enable_uart_clk(unsigned char enable);
-int enable_cspi_clock(unsigned char enable, unsigned spi_num);
 int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
 int enable_sata_clock(void);
 void disable_sata_clock(void);
board/compulab/cm_fx6/spl.c +1 -1
index 5b4b76f..d94ced9 100644
@@ -303,7 +303,7 @@ static void cm_fx6_setup_uart(void)
 static void cm_fx6_setup_ecspi(void)
 {
 	cm_fx6_set_ecspi_iomux();
-	enable_cspi_clock(1, 0);
+	enable_spi_clk(1, 0);
 }
 #else
 static void cm_fx6_setup_ecspi(void) { }
Signature · 1 line
1.8.4
author
#1 lore raw

PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX

Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or we will get compliation failure for other platforms.

Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check.

---
 arch/arm/cpu/armv7/mx6/clock.c           | 14 ++++++++++----
 arch/arm/include/asm/arch-mx6/crm_regs.h |  9 ++++-----
 2 files changed, 14 insertions(+), 9 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +10 -4
index 1134770..b461898 100644
@@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 {
 	u32 reg;
 	u32 mask;
+	u32 *addr;
 
 	if (i2c_num > 3)
 		return -EINVAL;
@@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 			reg &= ~mask;
 		__raw_writel(reg, &imx_ccm->CCGR2);
 	} else {
-		mask = MXC_CCM_CCGR_CG_MASK
-			<< (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET);
-		reg = __raw_readl(&imx_ccm->CCGR1);
+		if (is_cpu_type(MXC_CPU_MX6SX)) {
+			mask = MXC_CCM_CCGR6_I2C4_MASK;
+			addr = &imx_ccm->CCGR6;
+		} else {
+			mask = MXC_CCM_CCGR1_I2C4_SERIAL_MASK;
+			addr = &imx_ccm->CCGR1;
+		}
+		reg = __raw_readl(addr);
 		if (enable)
 			reg |= mask;
 		else
 			reg &= ~mask;
-		__raw_writel(reg, &imx_ccm->CCGR1);
+		__raw_writel(reg, addr);
 	}
 	return 0;
 }
arch/arm/include/asm/arch-mx6/crm_regs.h +4 -5
index 887d048..4c743b6 100644
@@ -740,7 +740,10 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_USDHC4_MASK		(3 << MXC_CCM_CCGR6_USDHC4_OFFSET)
 #define MXC_CCM_CCGR6_EMI_SLOW_OFFSET		10
 #define MXC_CCM_CCGR6_EMI_SLOW_MASK		(3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET)
-#ifdef CONFIG_MX6SX
+/* The two does not exist on i.MX6SX */
+#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
+#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
+/* The following *CCGR6* exist only i.MX6SX */
 #define MXC_CCM_CCGR6_PWM8_OFFSET		16
 #define MXC_CCM_CCGR6_PWM8_MASK			(3 << MXC_CCM_CCGR6_PWM8_OFFSET)
 #define MXC_CCM_CCGR6_VADC_OFFSET		20
@@ -755,10 +758,6 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_PWM6_MASK			(3 << MXC_CCM_CCGR6_PWM6_OFFSET)
 #define MXC_CCM_CCGR6_PWM7_OFFSET		30
 #define MXC_CCM_CCGR6_PWM7_MASK			(3 << MXC_CCM_CCGR6_PWM7_OFFSET)
-#else
-#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
-#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
-#endif
 
 #define BM_ANADIG_PLL_SYS_LOCK 0x80000000
 #define BP_ANADIG_PLL_SYS_RSVD0      20
Signature · 1 line
1.8.4
#2 lore raw

PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX

Hi Peng,

Quoted 3 lines · Peng Fan

Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or we will get compliation failure for other platforms.

               ^----- compliation ?
Quoted 51 lines

Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check.

---
 arch/arm/cpu/armv7/mx6/clock.c           | 14 ++++++++++----
 arch/arm/include/asm/arch-mx6/crm_regs.h |  9 ++++-----
 2 files changed, 14 insertions(+), 9 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +10 -4
index 1134770..b461898 100644
@@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 {
 	u32 reg;
 	u32 mask;
+	u32 *addr;
 
 	if (i2c_num > 3)
 		return -EINVAL;
@@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 			reg &= ~mask;
 		__raw_writel(reg, &imx_ccm->CCGR2);
 	} else {
-		mask = MXC_CCM_CCGR_CG_MASK
-			<< (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET);
-		reg = __raw_readl(&imx_ccm->CCGR1);
+		if (is_cpu_type(MXC_CPU_MX6SX)) {
+			mask = MXC_CCM_CCGR6_I2C4_MASK;
+			addr = &imx_ccm->CCGR6;
+		} else {
+			mask = MXC_CCM_CCGR1_I2C4_SERIAL_MASK;
+			addr = &imx_ccm->CCGR1;
+		}
+		reg = __raw_readl(addr);
 		if (enable)
 			reg |= mask;
 		else
 			reg &= ~mask;
-		__raw_writel(reg, &imx_ccm->CCGR1);
+		__raw_writel(reg, addr);
 	}
 	return 0;
 }
arch/arm/include/asm/arch-mx6/crm_regs.h +0 -0
index 887d048..4c743b6 100644

arch/arm/include/asm/arch-mx6/crm_regs.h struct mxc_ccm_reg { · line 746

Quoted 8 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +4 -1
@@ -740,7 +740,10 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_USDHC4_MASK		(3 << MXC_CCM_CCGR6_USDHC4_OFFSET)
 #define MXC_CCM_CCGR6_EMI_SLOW_OFFSET		10
 #define MXC_CCM_CCGR6_EMI_SLOW_MASK		(3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET)
-#ifdef CONFIG_MX6SX
+/* The two does not exist on i.MX6SX */
+#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
+#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
+/* The following *CCGR6* exist only i.MX6SX */

Agree to group together macros that belong only to a SOC variant, else it is difficult to find them. But what has MXC_CCM_CCGR6_VDOAXICLK_OFFSET to do with addings I2C4 clock to i.MX6SX ? It should be posted in a separate patch.

Quoted 5 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +0 -0
 #define MXC_CCM_CCGR6_PWM8_OFFSET		16
 #define MXC_CCM_CCGR6_PWM8_MASK			(3 << MXC_CCM_CCGR6_PWM8_OFFSET)
 #define MXC_CCM_CCGR6_VADC_OFFSET		20

arch/arm/include/asm/arch-mx6/crm_regs.h struct mxc_ccm_reg { · line 763

Quoted 10 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +0 -4
@@ -755,10 +758,6 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_PWM6_MASK			(3 << MXC_CCM_CCGR6_PWM6_OFFSET)
 #define MXC_CCM_CCGR6_PWM7_OFFSET		30
 #define MXC_CCM_CCGR6_PWM7_MASK			(3 << MXC_CCM_CCGR6_PWM7_OFFSET)
-#else
-#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
-#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
-#endif
 
 #define BM_ANADIG_PLL_SYS_LOCK 0x80000000
 #define BP_ANADIG_PLL_SYS_RSVD0      20

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX

Hi Stefano,

Quoted 8 lines · Stefano Babic

Hi Peng,

Quoted 3 lines · Peng Fan

Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or we will get compliation failure for other platforms.

              ^----- compliation ?

I mean gcc will complains about failing to compile the code.

Quoted 57 lines
Quoted 57 lines

Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check.

---
 arch/arm/cpu/armv7/mx6/clock.c           | 14 ++++++++++----
 arch/arm/include/asm/arch-mx6/crm_regs.h |  9 ++++-----
 2 files changed, 14 insertions(+), 9 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +10 -4
index 1134770..b461898 100644
@@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 {
 	u32 reg;
 	u32 mask;
+	u32 *addr;
 
 	if (i2c_num > 3)
 		return -EINVAL;
@@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 			reg &= ~mask;
 		__raw_writel(reg, &imx_ccm->CCGR2);
 	} else {
-		mask = MXC_CCM_CCGR_CG_MASK
-			<< (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET);
-		reg = __raw_readl(&imx_ccm->CCGR1);
+		if (is_cpu_type(MXC_CPU_MX6SX)) {
+			mask = MXC_CCM_CCGR6_I2C4_MASK;
+			addr = &imx_ccm->CCGR6;
+		} else {
+			mask = MXC_CCM_CCGR1_I2C4_SERIAL_MASK;
+			addr = &imx_ccm->CCGR1;
+		}
+		reg = __raw_readl(addr);
 		if (enable)
 			reg |= mask;
 		else
 			reg &= ~mask;
-		__raw_writel(reg, &imx_ccm->CCGR1);
+		__raw_writel(reg, addr);
 	}
 	return 0;
 }
arch/arm/include/asm/arch-mx6/crm_regs.h +1 -1
index 887d048..4c743b6 100644
@@ -740,7 +740,10 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_USDHC4_MASK		(3 << MXC_CCM_CCGR6_USDHC4_OFFSET)
 #define MXC_CCM_CCGR6_EMI_SLOW_OFFSET		10
 #define MXC_CCM_CCGR6_EMI_SLOW_MASK		(3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET)
-#ifdef CONFIG_MX6SX
+/* The two does not exist on i.MX6SX */
Quoted 8 lines

arch/arm/include/asm/arch-mx6/crm_regs.h struct mxc_ccm_reg { · line 746

Quoted 3 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +3 -0
+#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
+#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
+/* The following *CCGR6* exist only i.MX6SX */

Agree to group together macros that belong only to a SOC variant, else it is difficult to find them. But what has MXC_CCM_CCGR6_VDOAXICLK_OFFSET to do with addings I2C4 clock to i.MX6SX ? It should be posted in a separate patch.

I just move this piece of code from the back to the front, see the end of the patch.
I removed the #ifdef in header file, because it is really not a good idea to see so many #ifdefs in header file. The bad point here is some CCM macros are exposed to other platforms, so we should take care to use the CCM macros.

Take the following as example:
In crm_regs.h
#ifdef CONFIG_MX6SX
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
#else
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)
#endif

u32 test()

{
	if (is_cpu_type(MXC_CPU_MX6SX))
		return MXC_CCM_CCGR6_PWM7_MASK;		
	else
		return MXC_CCM_CCGR6_VDOAXICLK_OFFSET;
}

Here gcc can not successfully compile the code if we want to build for i.mx6sx, becuase MXC_CCM_CCGR6_VDOAXICLK_OFFSET is not defined for i.mx6sx.

So:
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
/* This CCM Definition does not exist on i.MX6SX */
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)

Quoted 13 lines
Quoted 13 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +0 -4
 #define MXC_CCM_CCGR6_PWM8_OFFSET		16
 #define MXC_CCM_CCGR6_PWM8_MASK			(3 << MXC_CCM_CCGR6_PWM8_OFFSET)
 #define MXC_CCM_CCGR6_VADC_OFFSET		20
@@ -755,10 +758,6 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCGR6_PWM6_MASK			(3 << MXC_CCM_CCGR6_PWM6_OFFSET)
 #define MXC_CCM_CCGR6_PWM7_OFFSET		30
 #define MXC_CCM_CCGR6_PWM7_MASK			(3 << MXC_CCM_CCGR6_PWM7_OFFSET)
-#else
-#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET		12
-#define MXC_CCM_CCGR6_VDOAXICLK_MASK		(3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET)
-#endif
 
Quoted 13 lines

arch/arm/include/asm/arch-mx6/crm_regs.h struct mxc_ccm_reg { · line 763

Quoted 3 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +0 -0
 #define BM_ANADIG_PLL_SYS_LOCK 0x80000000
 #define BP_ANADIG_PLL_SYS_RSVD0      20

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Regards,
Peng.

#4 lore raw

PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX

Hi Peng,

Quoted 5 lines · Peng Fan

Hi Stefano,

Quoted 2 lines · Stefano Babic

Hi Peng,

Quoted 7 lines
Quoted 6 lines · Peng Fan
Quoted 3 lines

Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or we will get compliation failure for other platforms.

              ^----- compliation ?

I mean gcc will complains about failing to compile the code.

Right. Fix the commit message.

Quoted 10 lines
Quoted 4 lines

Agree to group together macros that belong only to a SOC variant, else it is difficult to find them. But what has MXC_CCM_CCGR6_VDOAXICLK_OFFSET to do with addings I2C4 clock to i.MX6SX ? It should be posted in a separate patch.

I just move this piece of code from the back to the front, see the end of the patch.
I removed the #ifdef in header file, because it is really not a good idea to see so many #ifdefs in header file. The bad point here is some CCM macros are exposed to other platforms, so we should take care to use the CCM macros.

That is correct. We have a lot of macro across all i.MXes, not only i.MX6es. This allow to have consistent code, and we must take care of not breaking other SOCs.

Quoted 9 lines

Take the following as example:
In crm_regs.h
#ifdef CONFIG_MX6SX
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
#else
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)
#endif

Quoted 7 lines

u32 test()

{
	if (is_cpu_type(MXC_CPU_MX6SX))
		return MXC_CCM_CCGR6_PWM7_MASK;		
	else
		return MXC_CCM_CCGR6_VDOAXICLK_OFFSET;
}

Here there is a bad use of these kind of macro. To use a define, we should have the same name and not different names as in this case.

Quoted 3 lines

Here gcc can not successfully compile the code if we want to build for i.mx6sx, becuase MXC_CCM_CCGR6_VDOAXICLK_OFFSET is not defined for i.mx6sx.

Right, but this is bad code and must be fixed.

Quoted 5 lines

So:
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
/* This CCM Definition does not exist on i.MX6SX */
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)

Better should be to add also a common name for both, that is then used in the function.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: [email protected]
=====================================================================
#5 lore raw

PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX

Hi Stefano,

Quoted 61 lines · Stefano Babic

Hi Peng,

Quoted 5 lines · Peng Fan

Hi Stefano,

Quoted 2 lines · Stefano Babic

Hi Peng,

Quoted 7 lines
Quoted 6 lines · Peng Fan
Quoted 3 lines

Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or we will get compliation failure for other platforms.

              ^----- compliation ?

I mean gcc will complains about failing to compile the code.

Right. Fix the commit message.

Quoted 10 lines
Quoted 4 lines

Agree to group together macros that belong only to a SOC variant, else it is difficult to find them. But what has MXC_CCM_CCGR6_VDOAXICLK_OFFSET to do with addings I2C4 clock to i.MX6SX ? It should be posted in a separate patch.

I just move this piece of code from the back to the front, see the end of the patch.
I removed the #ifdef in header file, because it is really not a good idea to see so many #ifdefs in header file. The bad point here is some CCM macros are exposed to other platforms, so we should take care to use the CCM macros.

That is correct. We have a lot of macro across all i.MXes, not only i.MX6es. This allow to have consistent code, and we must take care of not breaking other SOCs.

Quoted 9 lines

Take the following as example:
In crm_regs.h
#ifdef CONFIG_MX6SX
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
#else
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)
#endif

Quoted 7 lines

u32 test()

{
	if (is_cpu_type(MXC_CPU_MX6SX))
		return MXC_CCM_CCGR6_PWM7_MASK;		
	else
		return MXC_CCM_CCGR6_VDOAXICLK_OFFSET;
}

Here there is a bad use of these kind of macro. To use a define, we should have the same name and not different names as in this case.

Quoted 3 lines

Here gcc can not successfully compile the code if we want to build for i.mx6sx, becuase MXC_CCM_CCGR6_VDOAXICLK_OFFSET is not defined for i.mx6sx.

Right, but this is bad code and must be fixed.

Quoted 1 line
Quoted 7 lines
Quoted 4 lines

So:
#define MXC_CCM_CCGR6_PWM7_MASK (3 << 30)
/* This CCM Definition does not exist on i.MX6SX */
#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << 12)

Better should be to add also a common name for both, that is then used in the function.

To those which have same offset and same bit width, we can have a common name to cover for different SOCs. To those same offset, but different bit width, we need the ifdefs. Also some CCM definitions are not used by U-Boot, maybe we can removed them, such as GPU and etc. Anyway, better not to do big change to avoid breaking something, so when adding new definitions, avoid adding ifdefs and doing small code refactor.

Quoted 10 lines

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Regards,
Peng

#6 lore raw

PATCH v2 1/2 imx: mx6 remove duplicated enable_cspi_clock

In reply to Peng Fan

Hi Peng,

Quoted 60 lines · Peng Fan

enable_spi_clock does the same thing with enable_cspi_clock, so remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file convert cm_fx6/spl.c to use enable_spi_clk

---
 arch/arm/cpu/armv7/mx6/clock.c        | 19 -------------------
 arch/arm/include/asm/arch-mx6/clock.h |  1 -
 board/compulab/cm_fx6/spl.c           |  2 +-
 3 files changed, 1 insertion(+), 21 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -19
index ae99945..1134770 100644
@@ -102,25 +102,6 @@ void enable_uart_clk(unsigned char enable)
 }
 #endif
 
-#ifdef CONFIG_SPI
-/* spi_num can be from 0 - 4 */
-int enable_cspi_clock(unsigned char enable, unsigned spi_num)
-{
-	u32 mask;
-
-	if (spi_num > 4)
-		return -EINVAL;
-
-	mask = MXC_CCM_CCGR_CG_MASK << (spi_num * 2);
-	if (enable)
-		setbits_le32(&imx_ccm->CCGR1, mask);
-	else
-		clrbits_le32(&imx_ccm->CCGR1, mask);
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_MMC
 int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
 {
arch/arm/include/asm/arch-mx6/clock.h +0 -1
index a6de5ee..7b3bbb8 100644
@@ -57,7 +57,6 @@ void hab_caam_clock_enable(unsigned char enable);
 void enable_ocotp_clk(unsigned char enable);
 void enable_usboh3_clk(unsigned char enable);
 void enable_uart_clk(unsigned char enable);
-int enable_cspi_clock(unsigned char enable, unsigned spi_num);
 int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
 int enable_sata_clock(void);
 void disable_sata_clock(void);
board/compulab/cm_fx6/spl.c +0 -0
index 5b4b76f..d94ced9 100644

board/compulab/cm_fx6/spl.c static void cm_fx6_setup_uart(void) · line 309

Quoted 8 lines
board/compulab/cm_fx6/spl.c +1 -1
@@ -303,7 +303,7 @@ static void cm_fx6_setup_uart(void)
 static void cm_fx6_setup_ecspi(void)
 {
 	cm_fx6_set_ecspi_iomux();
-	enable_cspi_clock(1, 0);
+	enable_spi_clk(1, 0);
 }
 #else
 static void cm_fx6_setup_ecspi(void) { }

Best regards,
Stefano Babic

Signature · 5 lines
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DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
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