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arm: perf: Set affinity for PPI based PMUs

PATCH In review Stephen Boyd 2 participants 3 messages Jun 29, 2015 – Jul 1, 2015

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Arm (32-bit) perf events Arm PMU profiling and debugging
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Stephen Boyd

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#0 lore raw

PATCH 1/1 arm: perf: Set affinity for PPI based PMUs

For PPI based PMUs, we bail out early in of_pmu_irq_cfg() without setting the PMU's supported_cpus bitmap. This causes the smp_call_function_any() in armv7_probe_num_events() to fail. Set the bitmap to be all CPUs so that we properly probe PMUs that use PPIs.

Fixes cc88116da0d1 ("arm: perf: treat PMUs as CPU affine")
Cc Mark Rutland <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 arch/arm/kernel/perf_event.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
arch/arm/kernel/perf_event.c +3 -1
index 54272e0be713..7d5379c1c443 100644
@@ -795,8 +795,10 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
 
 	/* Don't bother with PPIs; they're already affine */
 	irq = platform_get_irq(pdev, 0);
-	if (irq >= 0 && irq_is_percpu(irq))
+	if (irq >= 0 && irq_is_percpu(irq)) {
+		cpumask_setall(&pmu->supported_cpus);
 		return 0;
+	}
 
 	irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
 	if (!irqs)
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
#1 lore raw

Hi Stephen,

Quoted 18 lines · Stephen Boyd

For PPI based PMUs, we bail out early in of_pmu_irq_cfg() without setting the PMU's supported_cpus bitmap. This causes the smp_call_function_any() in armv7_probe_num_events() to fail. Set the bitmap to be all CPUs so that we properly probe PMUs that use PPIs.

Fixes cc88116da0d1 ("arm: perf: treat PMUs as CPU affine")
Cc Mark Rutland <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 arch/arm/kernel/perf_event.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
arch/arm/kernel/perf_event.c +0 -0
index 54272e0be713..7d5379c1c443 100644

arch/arm/kernel/perf_event.c static int of_pmu_irq_cfg(struct arm_pmu *pmu) · line 801

Quoted 8 lines
arch/arm/kernel/perf_event.c +3 -1
@@ -795,8 +795,10 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
 
 	/* Don't bother with PPIs; they're already affine */
 	irq = platform_get_irq(pdev, 0);
-	if (irq >= 0 && irq_is_percpu(irq))
+	if (irq >= 0 && irq_is_percpu(irq)) {
+		cpumask_setall(&pmu->supported_cpus);
 		return 0;
+	}

Looks good to me as a fix, but I'm currently working on extending the interrupt-affinity property to work with both SPIs and PPIs so that we can use it to identify PMU affinity on multi-cluster systems.

https://git.kernel.org/cgit/linux/kernel/git/will/linux.git/commit/?h=perf/updates&id=633fa0b629d86e58d68aff295f92031877dd0294

Any chance you could take that for a spin on your platform, please?

Will

author Tested-by
#2 lore raw
Quoted 8 lines · Will Deacon

Looks good to me as a fix, but I'm currently working on extending the interrupt-affinity property to work with both SPIs and PPIs so that we can use it to identify PMU affinity on multi-cluster systems.

https://git.kernel.org/cgit/linux/kernel/git/will/linux.git/commit/?h=perf/updates&id=633fa0b629d86e58d68aff295f92031877dd0294

Any chance you could take that for a spin on your platform, please?

The patch you point to works fine on Krait based platforms when the interrupt-affinity property isn't present in DT. We (luckily?) don't have any multi-cluster Krait designs so we don't need to add the interrupt-affinity property in those DTs. Feel free to add a

Tested-by Stephen Boyd <[email protected]> # Krait PMU
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Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project