imx: mx6 remove duplicated enable_cspi_clock
PATCH v2 1/2 imx: mx6 remove duplicated enable_cspi_clock
enable_spi_clock does the same thing with enable_cspi_clock, so remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file convert cm_fx6/spl.c to use enable_spi_clk
---
Changes v2:
Add Stefano's Acked-by
arch/arm/cpu/armv7/mx6/clock.c | 19 ------------------- arch/arm/include/asm/arch-mx6/clock.h | 1 - board/compulab/cm_fx6/spl.c | 2 +- 3 files changed, 1 insertion(+), 21 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -19
@@ -102,25 +102,6 @@ void enable_uart_clk(unsigned char enable) }#endif -#ifdef CONFIG_SPI -/* spi_num can be from 0 - 4 */ -int enable_cspi_clock (unsigned char enable,unsigned spi_num) -{ -u32 mask; - -if (spi_num >4 ) -return -EINVAL ; - - mask =MXC_CCM_CCGR_CG_MASK << (spi_num *2 ); -if (enable) -setbits_le32 (&imx_ccm->CCGR1, mask); -else -clrbits_le32 (&imx_ccm->CCGR1, mask); - -return 0 ; -} -#endif -#ifdef CONFIG_MMC int enable_usdhc_clk (unsigned char enable,unsigned bus_num) {
arch/arm/include/asm/arch-mx6/clock.h +0 -1
@@ -57,7 +57,6 @@ void hab_caam_clock_enable(unsigned char enable);void enable_ocotp_clk (unsigned char enable);void enable_usboh3_clk (unsigned char enable);void enable_uart_clk (unsigned char enable); -int enable_cspi_clock (unsigned char enable,unsigned spi_num);int enable_usdhc_clk (unsigned char enable,unsigned bus_num);int enable_sata_clock (void );void disable_sata_clock (void );
board/compulab/cm_fx6/spl.c +1 -1
@@ -303,7 +303,7 @@ static void cm_fx6_setup_uart(void)static void cm_fx6_setup_ecspi (void ) {cm_fx6_set_ecspi_iomux (); -enable_cspi_clock (1 ,0 ); +enable_spi_clk (1 ,0 ); }#else static void cm_fx6_setup_ecspi (void ) { }
Signature · 1 line
1.8.4
PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX
Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove #ifdef .. in crm_regs.h, or gcc will fail to compile the code succesfully.
Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check.
---
Changes v2:
correct spelling error in commit log.
arch/arm/cpu/armv7/mx6/clock.c | 14 ++++++++++---- arch/arm/include/asm/arch-mx6/crm_regs.h | 5 ++--- 2 files changed, 12 insertions(+), 7 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +10 -4
@@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) {u32 reg;u32 mask; +u32 *addr;if (i2c_num >3 )return -EINVAL ;
@@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) reg &= ~mask;__raw_writel (reg, &imx_ccm->CCGR2); }else { - mask =MXC_CCM_CCGR_CG_MASK - << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET ); - reg =__raw_readl (&imx_ccm->CCGR1); +if (is_cpu_type (MXC_CPU_MX6SX )) { + mask =MXC_CCM_CCGR6_I2C4_MASK ; + addr = &imx_ccm->CCGR6; + }else { + mask =MXC_CCM_CCGR1_I2C4_SERIAL_MASK ; + addr = &imx_ccm->CCGR1; + } + reg =__raw_readl (addr);if (enable) reg |= mask;else reg &= ~mask; -__raw_writel (reg, &imx_ccm->CCGR1); +__raw_writel (reg, addr); }return 0 ; }
arch/arm/include/asm/arch-mx6/crm_regs.h +2 -3
@@ -742,7 +742,7 @@ struct mxc_ccm_reg {#define MXC_CCM_CCGR6_USDHC4_MASK (3 << MXC_CCM_CCGR6_USDHC4_OFFSET)#define MXC_CCM_CCGR6_EMI_SLOW_OFFSET 10#define MXC_CCM_CCGR6_EMI_SLOW_MASK (3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET) -#ifdef CONFIG_MX6SX +/* The following *CCGR6* exist only i.MX6SX */ #define MXC_CCM_CCGR6_PWM8_OFFSET 16#define MXC_CCM_CCGR6_PWM8_MASK (3 << MXC_CCM_CCGR6_PWM8_OFFSET)#define MXC_CCM_CCGR6_VADC_OFFSET 20
@@ -757,10 +757,9 @@ struct mxc_ccm_reg {#define MXC_CCM_CCGR6_PWM6_MASK (3 << MXC_CCM_CCGR6_PWM6_OFFSET)#define MXC_CCM_CCGR6_PWM7_OFFSET 30#define MXC_CCM_CCGR6_PWM7_MASK (3 << MXC_CCM_CCGR6_PWM7_OFFSET) -#else +/* The two does not exist on i.MX6SX */ #define MXC_CCM_CCGR6_VDOAXICLK_OFFSET 12#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET) -#endif #define BM_ANADIG_PLL_SYS_LOCK 0x80000000#define BP_ANADIG_PLL_SYS_RSVD0 20
Signature · 1 line
1.8.4
PATCH v2 2/2 imx: mx6 add i2c4 clock support for i.MX6SX
Quoted 69 lines · Peng Fan
Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove
#ifdef ..incrm_regs.h, or gcc will fail to compile the code succesfully.Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check.
Signed-off-by Peng Fan <[email protected]>---
Changes v2:
correct spelling error in commit log.arch/arm/cpu/armv7/mx6/clock.c | 14 ++++++++++---- arch/arm/include/asm/arch-mx6/crm_regs.h | 5 ++--- 2 files changed, 12 insertions(+), 7 deletions(-)arch/arm/cpu/armv7/mx6/clock.c +10
-4@@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) {u32 reg;u32 mask; +u32 *addr;if (i2c_num >3 )return -EINVAL ;@@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) reg &= ~mask;__raw_writel (reg, &imx_ccm->CCGR2); }else { - mask =MXC_CCM_CCGR_CG_MASK - << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET ); - reg =__raw_readl (&imx_ccm->CCGR1); +if (is_cpu_type (MXC_CPU_MX6SX )) { + mask =MXC_CCM_CCGR6_I2C4_MASK ; + addr = &imx_ccm->CCGR6; + }else { + mask =MXC_CCM_CCGR1_I2C4_SERIAL_MASK ; + addr = &imx_ccm->CCGR1; + } + reg =__raw_readl (addr);if (enable) reg |= mask;else reg &= ~mask; -__raw_writel (reg, &imx_ccm->CCGR1); +__raw_writel (reg, addr); }return 0 ; }arch/arm/include/asm/arch-mx6/crm_regs.h +1
-1@@ -742,7 +742,7 @@ struct mxc_ccm_reg {#define MXC_CCM_CCGR6_USDHC4_MASK (3 << MXC_CCM_CCGR6_USDHC4_OFFSET)#define MXC_CCM_CCGR6_EMI_SLOW_OFFSET 10#define MXC_CCM_CCGR6_EMI_SLOW_MASK (3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET) -#ifdef CONFIG_MX6SX +/* The following *CCGR6* exist only i.MX6SX */ #define MXC_CCM_CCGR6_PWM8_OFFSET 16#define MXC_CCM_CCGR6_PWM8_MASK (3 << MXC_CCM_CCGR6_PWM8_OFFSET)#define MXC_CCM_CCGR6_VADC_OFFSET 20@@ -757,10 +757,9 @@ struct mxc_ccm_reg {#define MXC_CCM_CCGR6_PWM6_MASK (3 << MXC_CCM_CCGR6_PWM6_OFFSET)
arch/arm/include/asm/arch-mx6/crm_regs.h struct mxc_ccm_reg { · line 765
Quoted 10 lines
arch/arm/include/asm/arch-mx6/crm_regs.h +1
-2#define MXC_CCM_CCGR6_PWM7_OFFSET 30#define MXC_CCM_CCGR6_PWM7_MASK (3 << MXC_CCM_CCGR6_PWM7_OFFSET) -#else +/* The two does not exist on i.MX6SX */ #define MXC_CCM_CCGR6_VDOAXICLK_OFFSET 12#define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET) -#endif #define BM_ANADIG_PLL_SYS_LOCK 0x80000000#define BP_ANADIG_PLL_SYS_RSVD0 20
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 1/2 imx: mx6 remove duplicated enable_cspi_clock
In reply to Peng FanHi Peng,
Quoted 8 lines · Peng Fan
enable_spi_clockdoes the same thing withenable_cspi_clock, so removeenable_cspi_clock.
Removeenable_cspi_clockprototype in header file convertcm_fx6/spl.cto useenable_spi_clkSigned-off-by Peng Fan <[email protected]>Acked-by Stefano Babic <[email protected]>---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================