dm: exynos: Driver model improvements leading to spring support

It is common for one node to reference another via a phandle. Add support for obtaining an attached device by this method. As an example, a node may have a 'power-supply' property which references a regulator, allowing the driver to turn on its power.

Signed-off-by Simon Glass <[email protected]>

---

 drivers/core/uclass.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 include/dm/uclass.h   | 17 +++++++++++++++++
 2 files changed, 59 insertions(+)

Add a way to dump the contents of an I2C message for debugging purposes.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/i2c-uclass.c | 16 ++++++++++++++++
  include/i2c.h            | 10 ++++++++++
  2 files changed, 26 insertions(+)

drivers/i2c/i2c-uclass.c +16 -0

index eaba965..42d6e89 100644
@@ -18,6 +18,22 @@ DECLARE_GLOBAL_DATA_PTR;
 
  #define I2C_MAX_OFFSET_LEN	4
 
+/* Useful debugging function */
+void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
+{
+	int i;
+
+	for (i = 0; i < nmsgs; i++) {
+		struct i2c_msg *m = &msg[i];
+
+		printf("   %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
+		       msg->addr, msg->len);
+		if (!(m->flags & I2C_M_RD))
+			printf(": %x", m->buf[0]);
+		printf("\n");
+	}
+}
+
  /**
   * i2c_setup_offset() - Set up a new message with a chip offset
   *

include/i2c.h +10 -0

index 9300d97..a5498a3 100644
@@ -473,6 +473,16 @@ int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
  				struct dm_i2c_chip *chip);
 
+/**
+ * i2c_dump_msgs() - Dump a list of I2C messages
+ *
+ * This may be useful for debugging.
+ *
+ * @msg:	Message list to dump
+ * @nmsgs:	Number of messages
+ */
+void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
+
  #ifndef CONFIG_DM_I2C
 
  /*

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 6 lines

Add a way to dump the contents of an I2C message for debugging purposes.

Signed-off-by Simon Glass <[email protected]>

---

Quoted 3 lines

  drivers/i2c/i2c-uclass.c | 16 ++++++++++++++++
  include/i2c.h            | 10 ++++++++++
  2 files changed, 26 insertions(+)

Acked-by Heiko Schocher <[email protected]>

Add documentation for the @dev parameter.

Signed-off-by Simon Glass <[email protected]>

---

  include/i2c.h | 2 ++
  1 file changed, 2 insertions(+)

include/i2c.h +2 -0

index a5498a3..e1ad8d8 100644
@@ -129,6 +129,7 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
   *
   * This reads a single value from the given address in an I2C chip
   *
+ * @dev:	Device to use for transfer
   * @addr:	Address to read from
   * @return value read, or -ve on error
   */

@@ -139,6 +140,7 @@ int dm_i2c_reg_read(struct udevice *dev, uint offset);
   *
   * This writes a single value to the given address in an I2C chip
   *
+ * @dev:	Device to use for transfer
   * @addr:	Address to write to
   * @val:	Value to write (normally a byte)
   * @return 0 on success, -ve on error

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 3 lines

Add documentation for the @dev parameter.

Quoted 5 lines

Signed-off-by Simon Glass <[email protected]>

---

  include/i2c.h | 2 ++
  1 file changed, 2 insertions(+)

Acked-by Heiko Schocher <[email protected]>

Move the flags and struct definitions higher in the file so that we can reference them with functions declared in the driver model section.

Signed-off-by Simon Glass <[email protected]>

---

  include/i2c.h | 86 +++++++++++++++++++++++++++++------------------------------
  1 file changed, 43 insertions(+), 43 deletions(-)

include/i2c.h +43 -43

index e1ad8d8..4c0e263 100644
@@ -74,6 +74,49 @@ struct dm_i2c_bus {
  	int speed_hz;
  };
 
+/*
+ * Not all of these flags are implemented in the U-Boot API
+ */
+enum dm_i2c_msg_flags {
+	I2C_M_TEN		= 0x0010, /* ten-bit chip address */
+	I2C_M_RD		= 0x0001, /* read data, from slave to master */
+	I2C_M_STOP		= 0x8000, /* send stop after this message */
+	I2C_M_NOSTART		= 0x4000, /* no start before this message */
+	I2C_M_REV_DIR_ADDR	= 0x2000, /* invert polarity of R/W bit */
+	I2C_M_IGNORE_NAK	= 0x1000, /* continue after NAK */
+	I2C_M_NO_RD_ACK		= 0x0800, /* skip the Ack bit on reads */
+	I2C_M_RECV_LEN		= 0x0400, /* length is first received byte */
+};
+
+/**
+ * struct i2c_msg - an I2C message
+ *
+ * @addr:	Slave address
+ * @flags:	Flags (see enum dm_i2c_msg_flags)
+ * @len:	Length of buffer in bytes, may be 0 for a probe
+ * @buf:	Buffer to send/receive, or NULL if no data
+ */
+struct i2c_msg {
+	uint addr;
+	uint flags;
+	uint len;
+	u8 *buf;
+};
+
+/**
+ * struct i2c_msg_list - a list of I2C messages
+ *
+ * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
+ * appropriate in U-Boot.
+ *
+ * @msg:	Pointer to i2c_msg array
+ * @nmsgs:	Number of elements in the array
+ */
+struct i2c_msg_list {
+	struct i2c_msg *msgs;
+	uint nmsgs;
+};
+
  /**
   * dm_i2c_read() - read bytes from an I2C chip
   *

@@ -294,49 +337,6 @@ void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
 
  #endif
 
-/*
- * Not all of these flags are implemented in the U-Boot API
- */
-enum dm_i2c_msg_flags {
-	I2C_M_TEN		= 0x0010, /* ten-bit chip address */
-	I2C_M_RD		= 0x0001, /* read data, from slave to master */
-	I2C_M_STOP		= 0x8000, /* send stop after this message */
-	I2C_M_NOSTART		= 0x4000, /* no start before this message */
-	I2C_M_REV_DIR_ADDR	= 0x2000, /* invert polarity of R/W bit */
-	I2C_M_IGNORE_NAK	= 0x1000, /* continue after NAK */
-	I2C_M_NO_RD_ACK		= 0x0800, /* skip the Ack bit on reads */
-	I2C_M_RECV_LEN		= 0x0400, /* length is first received byte */
-};
-
-/**
- * struct i2c_msg - an I2C message
- *
- * @addr:	Slave address
- * @flags:	Flags (see enum dm_i2c_msg_flags)
- * @len:	Length of buffer in bytes, may be 0 for a probe
- * @buf:	Buffer to send/receive, or NULL if no data
- */
-struct i2c_msg {
-	uint addr;
-	uint flags;
-	uint len;
-	u8 *buf;
-};
-
-/**
- * struct i2c_msg_list - a list of I2C messages
- *
- * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
- * appropriate in U-Boot.
- *
- * @msg:	Pointer to i2c_msg array
- * @nmsgs:	Number of elements in the array
- */
-struct i2c_msg_list {
-	struct i2c_msg *msgs;
-	uint nmsgs;
-};
-
  /**
   * struct dm_i2c_ops - driver operations for I2C uclass
   *

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 7 lines

Move the flags and struct definitions higher in the file so that we can reference them with functions declared in the driver model section.

Signed-off-by Simon Glass <[email protected]>

---

Quoted 3 lines

  include/i2c.h | 86
+++++++++++++++++++++++++++++------------------------------
  1 file changed, 43 insertions(+), 43 deletions(-)

Acked-by Heiko Schocher <[email protected]>

Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to be sent/received is in another buffer.

Add a function to provide access to this.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/i2c-uclass.c | 11 +++++++++++
  include/i2c.h            | 13 +++++++++++++
  2 files changed, 24 insertions(+)

drivers/i2c/i2c-uclass.c +11 -0

index 42d6e89..50b99ea 100644
@@ -202,6 +202,17 @@ int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  	}
  }
 
+int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct dm_i2c_ops *ops = i2c_get_ops(bus);
+
+	if (!ops->xfer)
+		return -ENOSYS;
+
+	return ops->xfer(bus, msg, nmsgs);
+}
+
  int dm_i2c_reg_read(struct udevice *dev, uint offset)
  {
  	uint8_t val;

include/i2c.h +13 -0

index 4c0e263..d191829 100644
@@ -191,6 +191,19 @@ int dm_i2c_reg_read(struct udevice *dev, uint offset);
  int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
 
  /**
+ * dm_i2c_xfer() - Transfer messages over I2C
+ *
+ * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
+ * instead.
+ *
+ * @dev:	Device to use for transfer
+ * @msg:	List of messages to transfer
+ * @nmsgs:	Number of messages to transfer
+ * @return 0 on success, -ve on error
+ */
+int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
+
+/**
   * dm_i2c_set_bus_speed() - set the speed of a bus
   *
   * @bus:	Bus to adjust

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 6 lines

Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to
be sent/received is in another buffer.

Quoted 8 lines

Add a function to provide access to this.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/i2c-uclass.c | 11 +++++++++++
  include/i2c.h            | 13 +++++++++++++
  2 files changed, 24 insertions(+)

Acked-by Heiko Schocher <[email protected]>

bye,
Heiko

Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example.

The uclass supports only two methods: select() and deselect().

Signed-off-by Simon Glass <[email protected]>

---

  doc/device-tree-bindings/i2c/i2c-mux.txt |  60 ++++++++++
  drivers/i2c/Kconfig                      |   2 +
  drivers/i2c/Makefile                     |   2 +
  drivers/i2c/muxes/Kconfig                |   8 ++
  drivers/i2c/muxes/Makefile               |   6 +
  drivers/i2c/muxes/i2c-mux-uclass.c       | 198 +++++++++++++++++++++++++++++++
  include/dm/uclass-id.h                   |   1 +
  include/i2c.h                            |  32 +++++
  8 files changed, 309 insertions(+)

create mode 100644 doc/device-tree-bindings/i2c/i2c-mux.txt create mode 100644 drivers/i2c/muxes/Kconfig create mode 100644 drivers/i2c/muxes/Makefile create mode 100644 drivers/i2c/muxes/i2c-mux-uclass.c

drivers/i2c/muxes/i2c-mux-uclass.c new file +0 -0

new file mode 100644
index 0000000..3f52bff
@@ -0,0 +1,198 @@

drivers/i2c/muxes/i2c-mux-uclass.c new file +9 -0

+static int i2c_mux_bus_xfer(struct udevice *dev, struct i2c_msg *msg,
+			    int nmsgs)
+{
+	struct udevice *mux = dev->parent;
+	struct i2c_mux *priv = dev_get_uclass_priv(mux);
+	struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus);
+	int ret, ret2;
+
+	debug("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name);

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 26 lines

Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example.

The uclass supports only two methods: select() and deselect().

Signed-off-by Simon Glass <[email protected]>

---

  doc/device-tree-bindings/i2c/i2c-mux.txt |  60 ++++++++++
  drivers/i2c/Kconfig                      |   2 +
  drivers/i2c/Makefile                     |   2 +
  drivers/i2c/muxes/Kconfig                |   8 ++
  drivers/i2c/muxes/Makefile               |   6 +
  drivers/i2c/muxes/i2c-mux-uclass.c       | 198
+++++++++++++++++++++++++++++++
  include/dm/uclass-id.h                   |   1 +
  include/i2c.h                            |  32 +++++
  8 files changed, 309 insertions(+)

create mode 100644 doc/device-tree-bindings/i2c/i2c-mux.txt create mode 100644 drivers/i2c/muxes/Kconfig create mode 100644 drivers/i2c/muxes/Makefile create mode 100644 drivers/i2c/muxes/i2c-mux-uclass.c

[...]

Quoted 8 lines

drivers/i2c/muxes/i2c-mux-uclass.c new file +0 -0

new file mode 100644
index 0000000..3f52bff
@@ -0,0 +1,198 @@

[...]

Quoted 11 lines

drivers/i2c/muxes/i2c-mux-uclass.c new file +9 -0

+static int i2c_mux_bus_xfer(struct udevice *dev, struct i2c_msg *msg,
+                           int nmsgs)
+{
+       struct udevice *mux = dev->parent;
+       struct i2c_mux *priv = dev_get_uclass_priv(mux);
+       struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus);
+       int ret, ret2;
+
+       debug("%s: %s, bus %s\n", __func__, dev->name,

priv->i2c_bus->name);

drivers/i2c/muxes/i2c-mux-uclass.c line 175

Quoted 10 lines

drivers/i2c/muxes/i2c-mux-uclass.c new file +10 -0

+       if (!ops->xfer)
+               return -ENOSYS;
+       ret = i2c_mux_select(dev);
+       if (ret)
+               return ret;
+       ret = ops->xfer(priv->i2c_bus, msg, nmsgs);
+       ret2 = i2c_mux_deselect(dev);
+
+       return ret ? ret : ret2;
+}

So we have for each transaction a select() and deselect() call. Is it possible to store the last accessed "way", and only switch with deselect(), select() if this is really needed?

Beside of this "nitpick", it looks good, thanks for the great work!

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

drivers/i2c/s3c24x0_i2c.c +1 -1

index c053e84..9a04e48 100644
@@ -1035,7 +1035,7 @@ static void process_nodes(const void *blob, int node_list[], int count,
  						CONFIG_SYS_I2C_S3C24X0_SPEED);
  		bus->node = node;
  		bus->bus_num = i;
-		exynos_pinmux_config(PERIPH_ID_I2C0 + bus->id, flags);
+		exynos_pinmux_config(bus->id, flags);
 
  		/* Mark position as used */
  		node_list[i] = -1;

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 9 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

Quoted 2 lines

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

bye,
Heiko

Quoted 15 lines

drivers/i2c/s3c24x0_i2c.c +1 -1

index c053e84..9a04e48 100644
@@ -1035,7 +1035,7 @@ static void process_nodes(const void *blob, int
 node_list[], int count,
 
 CONFIG_SYS_I2C_S3C24X0_SPEED);
                bus->node = node;
                bus->bus_num = i;
-               exynos_pinmux_config(PERIPH_ID_I2C0 + bus->id, flags);
+               exynos_pinmux_config(bus->id, flags);
 

Quoted 3 lines

                /* Mark position as used */
                node_list[i] = -1;

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Hi Minkyu, Przemyslaw,

Quoted 16 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 11 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Quoted 3 lines

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Dear Simon,

Quoted 19 lines · Simon Glass

Hi Minkyu, Przemyslaw,

Quoted 16 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 11 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Quoted 6 lines

Quoted 3 lines

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Only this patch? or all of samsung related patches?

Hi Minkyu,

Quoted 24 lines · Minkyu Kang

Dear Simon,

Quoted 21 lines · Simon Glass

Hi Minkyu, Przemyslaw,

Quoted 18 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 11 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by Heiko Schocher <[email protected]>

Quoted 6 lines

Quoted 4 lines

Quoted 1 line

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Only this patch? or all of samsung related patches?

Yes only this patch. It has been confirmed my Przemyslaw now too.

Hi Simon,

Quoted 32 lines · Simon Glass

Hi Minkyu,

Quoted 29 lines · Minkyu Kang

Dear Simon,

Quoted 25 lines · Simon Glass

Hi Minkyu, Przemyslaw,

Quoted 12 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 9 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

Quoted 7 lines

Quoted 2 lines

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Quoted 4 lines

Quoted 1 line

Only this patch? or all of samsung related patches?

Yes only this patch. It has been confirmed my Przemyslaw now too.

OK.
then, do you want to take other patches to your tree?

Hi Minkyu,

Quoted 35 lines · Minkyu Kang

Hi Simon,

Quoted 32 lines · Simon Glass

Hi Minkyu,

Quoted 29 lines · Minkyu Kang

Dear Simon,

Quoted 25 lines · Simon Glass

Hi Minkyu, Przemyslaw,

Quoted 12 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 9 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

Quoted 7 lines

Quoted 2 lines

   drivers/i2c/s3c24x0_i2c.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Quoted 7 lines

Quoted 4 lines

Quoted 1 line

Only this patch? or all of samsung related patches?

Yes only this patch. It has been confirmed my Przemyslaw now too.

OK.
then, do you want to take other patches to your tree?

There are still dependencies on u-boot-dm, so I cannot yet. But if you like I can do that later, after I have merged some more driver model support patches.

Regards,
Simon

Hi Minkyu,

Quoted 35 lines · Minkyu Kang

Hi Simon,

Quoted 32 lines · Simon Glass

Hi Minkyu,

Quoted 29 lines · Minkyu Kang

Dear Simon,

Quoted 25 lines · Simon Glass

Hi Minkyu, Przemyslaw,

Quoted 12 lines · Heiko Schocher

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 9 lines

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

Quoted 7 lines

Quoted 2 lines

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by Heiko Schocher <[email protected]>

As it is a bugfix, this should go in the current release ... right?

Minkyu, are you able to pick this up please? If not I can do it.

Quoted 7 lines

Quoted 4 lines

Quoted 1 line

Only this patch? or all of samsung related patches?

Yes only this patch. It has been confirmed my Przemyslaw now too.

OK.
then, do you want to take other patches to your tree?

There are still dependencies on u-boot-dm, so I cannot yet. But if you like I can do that later, after I have merged some more driver model support patches.

Regards,
Simon

When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit:

8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

drivers/i2c/s3c24x0_i2c.c +0 -0

index c053e84..9a04e48 100644

While I2C supports multi-master buses this is difficult to get right. This

driver provides a scheme based on two 'claim' GPIOs, one driven by the AP and one driver by the EC. With these they can communicate and reliably

share the bus. This scheme has minimal overhead and involves very little code. It is used on snow to permit the EC and the AP to share access to the main system PMIC and battery. The scheme can survive reboots by either side without difficulty.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/muxes/Kconfig                  |   9 ++
  drivers/i2c/muxes/Makefile                 |   1 +
  drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 147 +++++++++++++++++++++++++++++

  3 files changed, 157 insertions(+)

create mode 100644 drivers/i2c/muxes/i2c-arb-gpio-challenge.c

drivers/i2c/muxes/Kconfig +9 -0

index a05b32d..bd3e078 100644
@@ -6,3 +6,12 @@ config I2C_MUX
  	  one of several buses using some sort of control mechanism. The
  	  bus select is handled automatically when that bus is accessed,
  	  using a suitable I2C MUX driver.
+
+config I2C_ARB_GPIO_CHALLENGE
+        bool "GPIO-based I2C arbitration"
+        depends on I2C_MUX
+        help
+          If you say yes to this option, support will be included for an
+          I2C multimaster arbitration scheme using GPIOs and a challenge &
+          response mechanism where masters have to claim the bus by asserting
+          a GPIO.

drivers/i2c/muxes/Makefile +1 -0

index 7583e3a..612cc27 100644
@@ -3,4 +3,5 @@
  #
  # SPDX-License-Identifier:	GPL-2.0+
  #
+obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
  obj-$(CONFIG_I2C_MUX) += i2c-mux-uclass.o

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +96 -0

new file mode 100644
index 0000000..3f072c7
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct i2c_arbitrator_priv {
+	struct gpio_desc ap_claim;
+	struct gpio_desc ec_claim;
+	uint slew_delay_us;
+	uint wait_retry_ms;
+	uint wait_free_ms;
+};
+
+int i2c_arbitrator_deselect(struct udevice *mux, struct udevice *bus,
+			    uint channel)
+{
+	struct i2c_arbitrator_priv *priv = dev_get_priv(mux);
+	int ret;
+
+	debug("%s: %s\n", __func__, mux->name);
+	ret = dm_gpio_set_value(&priv->ap_claim, 0);
+	udelay(priv->slew_delay_us);
+
+	return ret;
+}
+
+int i2c_arbitrator_select(struct udevice *mux, struct udevice *bus,
+			  uint channel)
+{
+	struct i2c_arbitrator_priv *priv = dev_get_priv(mux);
+	unsigned start;
+	int ret;
+
+	debug("%s: %s\n", __func__, mux->name);
+	/* Start a round of trying to claim the bus */
+	start = get_timer(0);
+	do {
+		unsigned start_retry;
+		int waiting = 0;
+
+		/* Indicate that we want to claim the bus */
+		ret = dm_gpio_set_value(&priv->ap_claim, 1);
+		if (ret)
+			goto err;
+		udelay(priv->slew_delay_us);
+
+		/* Wait for the EC to release it */
+		start_retry = get_timer(0);
+		while (get_timer(start_retry) < priv->wait_retry_ms) {
+			ret = dm_gpio_get_value(&priv->ec_claim);
+			if (ret < 0) {
+				goto err;
+			} else if (!ret) {
+				/* We got it, so return */
+				return 0;
+			}
+
+			if (!waiting)
+				waiting = 1;
+		}
+
+		/* It didn't release, so give up, wait, and try again */
+		ret = dm_gpio_set_value(&priv->ap_claim, 0);
+		if (ret)
+			goto err;
+
+		mdelay(priv->wait_retry_ms);
+	} while (get_timer(start) < priv->wait_free_ms);
+
+	/* Give up, release our claim */
+	printf("I2C: Could not claim bus, timeout %lu\n", get_timer(start));
+	ret = -ETIMEDOUT;
+	ret = 0;
+err:
+	return ret;
+}
+
+static int i2c_arbitrator_probe(struct udevice *dev)
+{
+	struct i2c_arbitrator_priv *priv = dev_get_priv(dev);
+	const void *blob = gd->fdt_blob;
+	int node = dev->of_offset;
+	int ret;
+
+	debug("%s: %s\n", __func__, dev->name);
+	priv->slew_delay_us = fdtdec_get_int(blob, node, "slew-delay-us", 0);

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +41 -0

+	if (ret)
+		goto err_ec_gpio;
+
+	return 0;
+
+err_ec_gpio:
+	dm_gpio_free(dev, &priv->ap_claim);
+err:
+	debug("%s: ret=%d\n", __func__, ret);
+	return ret;
+}
+
+static int i2c_arbitrator_remove(struct udevice *dev)
+{
+	struct i2c_arbitrator_priv *priv = dev_get_priv(dev);
+
+	dm_gpio_free(dev, &priv->ap_claim);
+	dm_gpio_free(dev, &priv->ec_claim);
+
+	return 0;
+}
+
+static const struct i2c_mux_ops i2c_arbitrator_ops = {
+	.select		= i2c_arbitrator_select,
+	.deselect	= i2c_arbitrator_deselect,
+};
+
+static const struct udevice_id i2c_arbitrator_ids[] = {
+	{ .compatible = "i2c-arb-gpio-challenge" },
+	{ }
+};
+
+U_BOOT_DRIVER(i2c_arbitrator) = {
+	.name = "i2c_arbitrator",
+	.id = UCLASS_I2C_MUX,
+	.of_match = i2c_arbitrator_ids,
+	.probe = i2c_arbitrator_probe,
+	.remove = i2c_arbitrator_remove,
+	.ops = &i2c_arbitrator_ops,
+	.priv_auto_alloc_size = sizeof(struct i2c_arbitrator_priv),
+};

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 2 lines

While I2C supports multi-master buses this is difficult to get right. This

What do you mean here? Where are the problems? You have an i2c mux, or?

Quoted 2 lines

driver provides a scheme based on two 'claim' GPIOs, one driven by the AP and one driver by the EC. With these they can communicate and reliably

What is AP and EC ?

Quoted 6 lines

share the bus. This scheme has minimal overhead and involves very little code. It is used on snow to permit the EC and the AP to share access to the main system PMIC and battery. The scheme can survive reboots by either side without difficulty.

Quoted 7 lines

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/muxes/Kconfig                  |   9 ++
  drivers/i2c/muxes/Makefile                 |   1 +
  drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 147

+++++++++++++++++++++++++++++

Nice!

Could you add a readme, which explains this a little bit more?

Quoted 148 lines

  3 files changed, 157 insertions(+)

create mode 100644 drivers/i2c/muxes/i2c-arb-gpio-challenge.c

drivers/i2c/muxes/Kconfig +7 -0

index a05b32d..bd3e078 100644
@@ -6,3 +6,12 @@ config I2C_MUX
          one of several buses using some sort of control mechanism. The
          bus select is handled automatically when that bus is accessed,
          using a suitable I2C MUX driver.
+
+config I2C_ARB_GPIO_CHALLENGE
+        bool "GPIO-based I2C arbitration"
+        depends on I2C_MUX
+        help
+          If you say yes to this option, support will be included for an
+          I2C multimaster arbitration scheme using GPIOs and a challenge

&
+ response mechanism where masters have to claim the bus by
asserting

drivers/i2c/muxes/Kconfig +1 -0

+          a GPIO.

drivers/i2c/muxes/Makefile +1 -0

index 7583e3a..612cc27 100644
@@ -3,4 +3,5 @@
  #
  # SPDX-License-Identifier:    GPL-2.0+
  #
+obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
  obj-$(CONFIG_I2C_MUX) += i2c-mux-uclass.o

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +81 -0

new file mode 100644
index 0000000..3f072c7
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct i2c_arbitrator_priv {
+       struct gpio_desc ap_claim;
+       struct gpio_desc ec_claim;
+       uint slew_delay_us;
+       uint wait_retry_ms;
+       uint wait_free_ms;
+};
+
+int i2c_arbitrator_deselect(struct udevice *mux, struct udevice *bus,
+                           uint channel)
+{
+       struct i2c_arbitrator_priv *priv = dev_get_priv(mux);
+       int ret;
+
+       debug("%s: %s\n", __func__, mux->name);
+       ret = dm_gpio_set_value(&priv->ap_claim, 0);
+       udelay(priv->slew_delay_us);
+
+       return ret;
+}
+
+int i2c_arbitrator_select(struct udevice *mux, struct udevice *bus,
+                         uint channel)
+{
+       struct i2c_arbitrator_priv *priv = dev_get_priv(mux);
+       unsigned start;
+       int ret;
+
+       debug("%s: %s\n", __func__, mux->name);
+       /* Start a round of trying to claim the bus */
+       start = get_timer(0);
+       do {
+               unsigned start_retry;
+               int waiting = 0;
+
+               /* Indicate that we want to claim the bus */
+               ret = dm_gpio_set_value(&priv->ap_claim, 1);
+               if (ret)
+                       goto err;
+               udelay(priv->slew_delay_us);
+
+               /* Wait for the EC to release it */
+               start_retry = get_timer(0);
+               while (get_timer(start_retry) < priv->wait_retry_ms) {
+                       ret = dm_gpio_get_value(&priv->ec_claim);
+                       if (ret < 0) {
+                               goto err;
+                       } else if (!ret) {
+                               /* We got it, so return */
+                               return 0;
+                       }
+
+                       if (!waiting)
+                               waiting = 1;
+               }
+
+               /* It didn't release, so give up, wait, and try again */
+               ret = dm_gpio_set_value(&priv->ap_claim, 0);
+               if (ret)
+                       goto err;
+
+               mdelay(priv->wait_retry_ms);
+       } while (get_timer(start) < priv->wait_free_ms);
+
+       /* Give up, release our claim */
+       printf("I2C: Could not claim bus, timeout %lu\n",

get_timer(start));

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +15 -0

+       ret = -ETIMEDOUT;
+       ret = 0;
+err:
+       return ret;
+}
+
+static int i2c_arbitrator_probe(struct udevice *dev)
+{
+       struct i2c_arbitrator_priv *priv = dev_get_priv(dev);
+       const void *blob = gd->fdt_blob;
+       int node = dev->of_offset;
+       int ret;
+
+       debug("%s: %s\n", __func__, dev->name);
+       priv->slew_delay_us = fdtdec_get_int(blob, node, "slew-delay-us",

0);
+ priv->wait_retry_ms = fdtdec_get_int(blob, node, "wait-retry-us",
0) /

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +2 -0

+               1000;
+       priv->wait_free_ms = fdtdec_get_int(blob, node, "wait-free-us", 0)

/

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +2 -0

+               1000;
+       ret = gpio_request_by_name(dev, "our-claim-gpio", 0,

&priv->ap_claim,
+ GPIOD_IS_OUT);

Quoted 5 lines

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +3 -0

+       if (ret)
+               goto err;
+       ret = gpio_request_by_name(dev, "their-claim-gpios", 0,

&priv->ec_claim,
+ GPIOD_IS_IN);

What is "our" and "their"?

bye,
Heiko

Quoted 34 lines

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +34 -0

+       if (ret)
+               goto err_ec_gpio;
+
+       return 0;
+
+err_ec_gpio:
+       dm_gpio_free(dev, &priv->ap_claim);
+err:
+       debug("%s: ret=%d\n", __func__, ret);
+       return ret;
+}
+
+static int i2c_arbitrator_remove(struct udevice *dev)
+{
+       struct i2c_arbitrator_priv *priv = dev_get_priv(dev);
+
+       dm_gpio_free(dev, &priv->ap_claim);
+       dm_gpio_free(dev, &priv->ec_claim);
+
+       return 0;
+}
+
+static const struct i2c_mux_ops i2c_arbitrator_ops = {
+       .select         = i2c_arbitrator_select,
+       .deselect       = i2c_arbitrator_deselect,
+};
+
+static const struct udevice_id i2c_arbitrator_ids[] = {
+       { .compatible = "i2c-arb-gpio-challenge" },
+       { }
+};
+
+U_BOOT_DRIVER(i2c_arbitrator) = {
+       .name = "i2c_arbitrator",

drivers/i2c/muxes/i2c-arb-gpio-challenge.c line 147

Quoted 8 lines

drivers/i2c/muxes/i2c-arb-gpio-challenge.c new file +7 -0

+       .id = UCLASS_I2C_MUX,
+       .of_match = i2c_arbitrator_ids,
+       .probe = i2c_arbitrator_probe,
+       .remove = i2c_arbitrator_remove,
+       .ops = &i2c_arbitrator_ops,
+       .priv_auto_alloc_size = sizeof(struct i2c_arbitrator_priv),
+};

This function should not use mixed case, and it is simpler to use clrbits_le32() when clearing bits. Fix it.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 14 +++++++-------
  1 file changed, 7 insertions(+), 7 deletions(-)

drivers/i2c/s3c24x0_i2c.c +7 -7

index 9a04e48..4bbd012 100644
@@ -258,9 +258,9 @@ static int hsi2c_wait_for_trx(struct exynos5_hsi2c *i2c)
  	return I2C_NOK_TOUT;
  }
 
-static void ReadWriteByte(struct s3c24x0_i2c *i2c)
+static void read_write_byte(struct s3c24x0_i2c *i2c)
  {
-	writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon);
+	clrbits_le32(&i2c->iiccon, I2CCON_IRPND);
  }
 
  #ifdef CONFIG_SYS_I2C

@@ -794,7 +794,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
  	if (addr && addr_len) {
  		while ((i < addr_len) && (result == I2C_OK)) {
  			writel(addr[i++], &i2c->iicds);
-			ReadWriteByte(i2c);
+			read_write_byte(i2c);
  			result = WaitForXfer(i2c);
  		}
  		i = 0;

@@ -806,7 +806,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
  	case I2C_WRITE:
  		while ((i < data_len) && (result == I2C_OK)) {
  			writel(data[i++], &i2c->iicds);
-			ReadWriteByte(i2c);
+			read_write_byte(i2c);
  			result = WaitForXfer(i2c);
  		}
  		break;

@@ -822,7 +822,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
  			/* Generate a re-START. */
  			writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP,
  				&i2c->iicstat);
-			ReadWriteByte(i2c);
+			read_write_byte(i2c);
  			result = WaitForXfer(i2c);
 
  			if (result != I2C_OK)

@@ -835,7 +835,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
  				writel(readl(&i2c->iiccon)
  				       & ~I2CCON_ACKGEN,
  				       &i2c->iiccon);
-			ReadWriteByte(i2c);
+			read_write_byte(i2c);
  			result = WaitForXfer(i2c);
  			data[i++] = readl(&i2c->iicds);
  		}

@@ -852,7 +852,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
  bailout:
  	/* Send STOP. */
  	writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
-	ReadWriteByte(i2c);
+	read_write_byte(i2c);
 
  	return result;
  }

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 4 lines

This function should not use mixed case, and it is simpler to use clrbits_le32() when clearing bits. Fix it.

Quoted 5 lines

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 14 +++++++-------
  1 file changed, 7 insertions(+), 7 deletions(-)

Acked-by Heiko Schocher <[email protected]>

The existing driver model implementation uses the old non-driver-model code to operate, but has become impossibly tangled as a result. The actual algorithm is quite simple.

Also the normal-speed and high-speed buses are quite different and it doesn't seem that useful to put them in the same driver.

Finally, there is a bug which breaks communication with the Maxim sound codec and may cause problems with other device.

Rewrite the driver model code for normal-speed operation so that it is easier to understand, and fix the bug. Add a TODO to split the drivers.

Signed-off-by Simon Glass <[email protected]>

---

  drivers/i2c/s3c24x0_i2c.c | 139 ++++++++++++++++++++++++++++++++++------------
  1 file changed, 103 insertions(+), 36 deletions(-)

drivers/i2c/s3c24x0_i2c.c +103 -36

index 4bbd012..c11a6be 100644
@@ -1284,62 +1284,106 @@ U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
  #endif /* CONFIG_SYS_I2C */
 
  #ifdef CONFIG_DM_I2C
-static int i2c_write_data(struct s3c24x0_i2c_bus *i2c_bus, uchar chip,
-			  uchar *buffer, int len, bool end_with_repeated_start)
+static int exynos_hs_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
+			      int nmsgs)
  {
+	struct s3c24x0_i2c_bus *i2c_bus = dev_get_priv(dev);
+	struct exynos5_hsi2c *hsregs = i2c_bus->hsregs;
  	int ret;
 
-	if (i2c_bus->is_highspeed) {
-		ret = hsi2c_write(i2c_bus->hsregs, chip, 0, 0,
-				  buffer, len, true);
-		if (ret)
+	for (; nmsgs > 0; nmsgs--, msg++) {
+		if (msg->flags & I2C_M_RD) {
+			ret = hsi2c_read(hsregs, msg->addr, 0, 0, msg->buf,
+					 msg->len);
+		} else {
+			ret = hsi2c_write(hsregs, msg->addr, 0, 0, msg->buf,
+					  msg->len, true);
+		}
+		if (ret) {
  			exynos5_i2c_reset(i2c_bus);
-	} else {
-		ret = i2c_transfer(i2c_bus->regs, I2C_WRITE,
-				   chip << 1, 0, 0, buffer, len);
+			return -EREMOTEIO;
+		}
  	}
 
-	return ret != I2C_OK;
+	return 0;
  }
 
-static int i2c_read_data(struct s3c24x0_i2c_bus  *i2c_bus, uchar chip,
-			 uchar *buffer, int len)
+static int s3c24x0_do_msg(struct s3c24x0_i2c_bus *i2c_bus, struct i2c_msg *msg,
+			  int seq)
  {
-	int ret;
+	struct s3c24x0_i2c *i2c = i2c_bus->regs;
+	bool is_read = msg->flags & I2C_M_RD;
+	uint status;
+	uint addr;
+	int ret, i;
 
-	if (i2c_bus->is_highspeed) {
-		ret = hsi2c_read(i2c_bus->hsregs, chip, 0, 0, buffer, len);
-		if (ret)
-			exynos5_i2c_reset(i2c_bus);
+	if (!seq)
+		setbits_le32(&i2c->iiccon, I2CCON_ACKGEN);
+
+	/* Get the slave chip address going */
+	addr = msg->addr << 1;
+	writel(addr, &i2c->iicds);
+	status = I2C_TXRX_ENA | I2C_START_STOP;
+	if (is_read)
+		status |= I2C_MODE_MR;
+	else
+		status |= I2C_MODE_MT;
+	writel(status, &i2c->iicstat);
+	if (seq)
+		read_write_byte(i2c);
+
+	/* Wait for chip address to transmit */
+	ret = WaitForXfer(i2c);
+	if (ret)
+		goto err;
+
+	if (is_read) {
+		for (i = 0; !ret && i < msg->len; i++) {
+			/* disable ACK for final READ */
+			if (i == msg->len - 1)
+				clrbits_le32(&i2c->iiccon, I2CCON_ACKGEN);
+			read_write_byte(i2c);
+			ret = WaitForXfer(i2c);
+			msg->buf[i] = readl(&i2c->iicds);
+		}
+		if (ret == I2C_NACK)
+			ret = I2C_OK; /* Normal terminated read */
  	} else {
-		ret = i2c_transfer(i2c_bus->regs, I2C_READ,
-				   chip << 1, 0, 0, buffer, len);
+		for (i = 0; !ret && i < msg->len; i++) {
+			writel(msg->buf[i], &i2c->iicds);
+			read_write_byte(i2c);
+			ret = WaitForXfer(i2c);
+		}
  	}
 
-	return ret != I2C_OK;
+err:
+	return ret;
  }
 
  static int s3c24x0_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
  			    int nmsgs)
  {
  	struct s3c24x0_i2c_bus *i2c_bus = dev_get_priv(dev);
-	int ret;
+	struct s3c24x0_i2c *i2c = i2c_bus->regs;
+	ulong start_time;
+	int ret, i;
 
-	for (; nmsgs > 0; nmsgs--, msg++) {
-		bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD);
-
-		if (msg->flags & I2C_M_RD) {
-			ret = i2c_read_data(i2c_bus, msg->addr, msg->buf,
-					    msg->len);
-		} else {
-			ret = i2c_write_data(i2c_bus, msg->addr, msg->buf,
-					     msg->len, next_is_read);
+	start_time = get_timer(0);
+	while (readl(&i2c->iicstat) & I2CSTAT_BSY) {
+		if (get_timer(start_time) > I2C_TIMEOUT_MS) {
+			debug("Timeout\n");
+			return -ETIMEDOUT;
  		}
-		if (ret)
-			return -EREMOTEIO;
  	}
 
-	return 0;
+	for (ret = 0, i = 0; !ret && i < nmsgs; i++)
+		ret = s3c24x0_do_msg(i2c_bus, &msg[i], i);
+
+	/* Send STOP */
+	writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
+	read_write_byte(i2c);
+
+	return ret ? -EREMOTEIO : 0;
  }
 
  static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)

@@ -1364,8 +1408,7 @@ static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)
  	i2c_bus->id = pinmux_decode_periph_id(blob, node);
 
  	i2c_bus->clock_frequency = fdtdec_get_int(blob, node,
-						"clock-frequency",
-						CONFIG_SYS_I2C_S3C24X0_SPEED);
+						  "clock-frequency", 100000);
  	i2c_bus->node = node;
  	i2c_bus->bus_num = dev->seq;
 

@@ -1384,7 +1427,6 @@ static const struct dm_i2c_ops s3c_i2c_ops = {
 
  static const struct udevice_id s3c_i2c_ids[] = {
  	{ .compatible = "samsung,s3c2440-i2c", .data = EXYNOS_I2C_STD },
-	{ .compatible = "samsung,exynos5-hsi2c", .data = EXYNOS_I2C_HS },
  	{ }
  };
 

@@ -1397,4 +1439,29 @@ U_BOOT_DRIVER(i2c_s3c) = {
  	.priv_auto_alloc_size = sizeof(struct s3c24x0_i2c_bus),
  	.ops	= &s3c_i2c_ops,
  };
+
+/*
+ * TODO(sjg at chromium.org): Move this to a separate file when everything uses
+ * driver model
+ */
+static const struct dm_i2c_ops exynos_hs_i2c_ops = {
+	.xfer		= exynos_hs_i2c_xfer,
+	.probe_chip	= s3c24x0_i2c_probe,
+	.set_bus_speed	= s3c24x0_i2c_set_bus_speed,
+};
+
+static const struct udevice_id exynos_hs_i2c_ids[] = {
+	{ .compatible = "samsung,exynos5-hsi2c", .data = EXYNOS_I2C_HS },
+	{ }
+};
+
+U_BOOT_DRIVER(hs_i2c) = {
+	.name	= "i2c_s3c_hs",
+	.id	= UCLASS_I2C,
+	.of_match = exynos_hs_i2c_ids,
+	.ofdata_to_platdata = s3c_i2c_ofdata_to_platdata,
+	.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
+	.priv_auto_alloc_size = sizeof(struct s3c24x0_i2c_bus),
+	.ops	= &exynos_hs_i2c_ops,
+};
  #endif /* CONFIG_DM_I2C */

Hello Simon,

Am 03.07.2015 um 02:15 schrieb Simon Glass:

Quoted 18 lines

The existing driver model implementation uses the old non-driver-model code
to operate, but has become impossibly tangled as a result. The actual algorithm is quite simple.

Also the normal-speed and high-speed buses are quite different and it doesn't seem that useful to put them in the same driver.

Finally, there is a bug which breaks communication with the Maxim sound codec and may cause problems with other device.

Rewrite the driver model code for normal-speed operation so that it is easier to understand, and fix the bug. Add a TODO to split the drivers.

Signed-off-by Simon Glass <[email protected]>

---

Quoted 3 lines

  drivers/i2c/s3c24x0_i2c.c | 139
++++++++++++++++++++++++++++++++++------------
  1 file changed, 103 insertions(+), 36 deletions(-)

Reviewed-by Heiko Schocher <[email protected]>

The kernel uses upper case for I2C unit addresses. Follow the same convention to reduce differences.

Signed-off-by Simon Glass <[email protected]>

---

  arch/arm/dts/exynos5.dtsi             | 34 ++++++++++++++++-----------------
  arch/arm/dts/exynos5250-arndale.dts   | 16 ++++++++--------
  arch/arm/dts/exynos5250-smdk5250.dts  | 21 ++++++++++----------
  arch/arm/dts/exynos5250-snow.dts      | 32 +++++++++++++++++--------------
  arch/arm/dts/exynos5250.dtsi          | 24 +++++++++++------------
  arch/arm/dts/exynos5420-peach-pit.dts |  8 ++++----
  arch/arm/dts/exynos5420-smdk5420.dts  |  4 ++--
  arch/arm/dts/exynos54xx.dtsi          | 36 +++++++++++++++++------------------
  arch/arm/dts/exynos5800-peach-pi.dts  |  8 ++++----
  9 files changed, 94 insertions(+), 89 deletions(-)

arch/arm/dts/exynos5.dtsi +17 -17

index 238acb8..179584c 100644
@@ -72,39 +72,39 @@
  		interrupts = <1 9 0xf04>;
  	};
 
-	i2c at 12c60000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
+	i2c_0: i2c at 12C60000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12C60000 0x100>;
  		interrupts = <0 56 0>;
-	};
-
-	i2c at 12c70000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_1: i2c at 12C70000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12C70000 0x100>;
  		interrupts = <0 57 0>;
-	};
-
-	i2c at 12c80000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_2: i2c at 12C80000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12C80000 0x100>;
  		interrupts = <0 58 0>;
-	};
-
-	i2c at 12c90000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_3: i2c at 12C90000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12C90000 0x100>;
  		interrupts = <0 59 0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
  	};
 
-	spi at 12d20000 {
+	spi_0: spi at 12d20000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos-spi";

@@ -112,7 +112,7 @@
  		interrupts = <0 68 0>;
  	};
 
-	spi at 12d30000 {
+	spi_1: spi at 12d30000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos-spi";

@@ -120,7 +120,7 @@
  		interrupts = <0 69 0>;
  	};
 
-	spi at 12d40000 {
+	spi_2: spi at 12d40000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos-spi";

@@ -129,7 +129,7 @@
  		interrupts = <0 70 0>;
          };
 
-	spi at 131a0000 {
+	spi_3: spi at 131a0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos-spi";

@@ -137,7 +137,7 @@
  		interrupts = <0 129 0>;
  	};
 
-	spi at 131b0000 {
+	spi_4: spi at 131b0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos-spi";

arch/arm/dts/exynos5250-arndale.dts +8 -8

index 21c0a21..031c622 100644
@@ -15,14 +15,14 @@
  	compatible = "samsung,arndale", "samsung,exynos5250";
 
  	aliases {
-		i2c0 = "/i2c at 12c60000";
-		i2c1 = "/i2c at 12c70000";
-		i2c2 = "/i2c at 12c80000";
-		i2c3 = "/i2c at 12c90000";
-		i2c4 = "/i2c at 12ca0000";
-		i2c5 = "/i2c at 12cb0000";
-		i2c6 = "/i2c at 12cc0000";
-		i2c7 = "/i2c at 12cd0000";
+		i2c0 = "/i2c at 12C60000";
+		i2c1 = "/i2c at 12C70000";
+		i2c2 = "/i2c at 12C80000";
+		i2c3 = "/i2c at 12C90000";
+		i2c4 = "/i2c at 12CA0000";
+		i2c5 = "/i2c at 12CB0000";
+		i2c6 = "/i2c at 12CC0000";
+		i2c7 = "/i2c at 12CD0000";
  		serial0 = "/serial at 12C20000";
  		console = "/serial at 12C20000";
  	};

arch/arm/dts/exynos5250-smdk5250.dts +11 -10

index 3cebfc2..636fec9 100644
@@ -11,20 +11,21 @@
 
  /dts-v1/;
  #include "exynos5250.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
  / {
  	model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
  	compatible = "samsung,smdk5250", "samsung,exynos5250";
 
  	aliases {
-		i2c0 = "/i2c at 12c60000";
-		i2c1 = "/i2c at 12c70000";
-		i2c2 = "/i2c at 12c80000";
-		i2c3 = "/i2c at 12c90000";
-		i2c4 = "/i2c at 12ca0000";
-		i2c5 = "/i2c at 12cb0000";
-		i2c6 = "/i2c at 12cc0000";
-		i2c7 = "/i2c at 12cd0000";
+		i2c0 = "/i2c at 12C60000";
+		i2c1 = "/i2c at 12C70000";
+		i2c2 = "/i2c at 12C80000";
+		i2c3 = "/i2c at 12C90000";
+		i2c4 = "/i2c at 12CA0000";
+		i2c5 = "/i2c at 12CB0000";
+		i2c6 = "/i2c at 12CC0000";
+		i2c7 = "/i2c at 12CD0000";
  		spi0 = "/spi at 12d20000";
  		spi1 = "/spi at 12d30000";
  		spi2 = "/spi at 12d40000";

@@ -58,14 +59,14 @@
  		status = "disabled";
  	};
 
-	i2c at 12c70000 {
+	i2c at 12C70000 {
  		soundcodec at 1a {
  			reg = <0x1a>;
  			compatible = "wolfson,wm8994-codec";
  		};
  	};
 
-	i2c at 12c60000 {
+	i2c at 12C60000 {
  		pmic at 9 {
  			reg = <0x9>;
  			compatible = "maxim,max77686";

arch/arm/dts/exynos5250-snow.dts +18 -14

index e4b3dc2..9abe0b7 100644
@@ -7,24 +7,27 @@
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
-*/
+ */
 
  /dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/input/input.h>
  #include "exynos5250.dtsi"
 
  / {
  	model = "Google Snow";
-	compatible = "google,snow", "samsung,exynos5250";
+	compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5";
 
  	aliases {
-		i2c0 = "/i2c at 12c60000";
-		i2c1 = "/i2c at 12c70000";
-		i2c2 = "/i2c at 12c80000";
-		i2c3 = "/i2c at 12c90000";
-		i2c4 = "/i2c at 12ca0000";
-		i2c5 = "/i2c at 12cb0000";
-		i2c6 = "/i2c at 12cc0000";
-		i2c7 = "/i2c at 12cd0000";
+		i2c0 = "/i2c at 12C60000";
+		i2c1 = "/i2c at 12C70000";
+		i2c2 = "/i2c at 12C80000";
+		i2c3 = "/i2c at 12C90000";
+		i2c4 = "/i2c at 12CA0000";
+		i2c5 = "/i2c at 12CB0000";
+		i2c6 = "/i2c at 12CC0000";
+		i2c7 = "/i2c at 12CD0000";
  		spi0 = "/spi at 12d20000";
  		spi1 = "/spi at 12d30000";
  		spi2 = "/spi at 12d40000";

@@ -39,7 +42,7 @@
  		i2s = "/sound at 3830000";
  	};
 
-	i2c4: i2c at 12ca0000 {
+	i2c4: i2c at 12CA0000 {
  		cros_ec: cros-ec at 1e {
  			reg = <0x1e>;
  			compatible = "google,cros-ec-i2c";

@@ -66,6 +69,7 @@
  		spi-max-frequency = <1000000>;
  		spi-deactivate-delay = <100>;
 
+		/* Snow did support SPI but the released version used I2C */
  		embedded-controller {
  			compatible = "google,cros-ec-i2c";
  			reg = <0x1e>;

@@ -85,7 +89,7 @@
  		status = "disabled";
  	};
 
-	i2c at 12cd0000 {
+	i2c at 12CD0000 {
  		soundcodec at 22 {
  			reg = <0x22>;
  			compatible = "maxim,max98095-codec";

@@ -105,8 +109,8 @@
  		};
  	};
 
-	i2c at 12c60000 {
-		pmic at 9 {
+	i2c at 12C60000 {
+		max77686 at 09 {
  			reg = <0x9>;
  			compatible = "maxim,max77686";
  		};

arch/arm/dts/exynos5250.dtsi +12 -12

index ccbafe9..7eef3e3 100644
@@ -47,36 +47,36 @@
  		interrupts = <0 47 0>;
  	};
 
-	i2c at 12ca0000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
+	i2c_4: i2c at 12CA0000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12CA0000 0x100>;
  		interrupts = <0 60 0>;
-	};
-
-	i2c at 12cb0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_5: i2c at 12CB0000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12CB0000 0x100>;
  		interrupts = <0 61 0>;
-	};
-
-	i2c at 12cc0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_6: i2c at 12CC0000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12CC0000 0x100>;
  		interrupts = <0 62 0>;
-	};
-
-	i2c at 12cd0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
+	};
+
+	i2c_7: i2c at 12CD0000 {
  		compatible = "samsung,s3c2440-i2c";
  		reg = <0x12CD0000 0x100>;
  		interrupts = <0 63 0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
  	};
 
  	sound at 3830000 {

arch/arm/dts/exynos5420-peach-pit.dts +4 -4

index 6fe762d..0f1002e 100644
@@ -25,7 +25,7 @@
  	aliases {
  		serial0 = "/serial at 12C30000";
  		console = "/serial at 12C30000";
-		pmic = "/i2c at 12ca0000";
+		pmic = "/i2c at 12CA0000";
  	};
 
  	dmc {

@@ -49,7 +49,7 @@
  	};
 
  	/* MAX77802 is on i2c bus 4 */
-	i2c at 12ca0000 {
+	i2c at 12CA0000 {
  		clock-frequency = <400000>;
  		power-regulator at 9 {
  			compatible = "maxim,max77802-pmic";

@@ -57,7 +57,7 @@
  		};
  	};
 
-	i2c at 12cd0000 { /* i2c7 */
+	i2c at 12CD0000 { /* i2c7 */
  		clock-frequency = <100000>;
  	       soundcodec at 20 {
  	              reg = <0x20>;

@@ -76,7 +76,7 @@
                  samsung,codec-type = "max98090";
          };
 
-	i2c at 12e10000 { /* i2c9 */
+	i2c at 12E10000 { /* i2c9 */
  		clock-frequency = <400000>;
                  tpm at 20 {
                          compatible = "infineon,slb9645tt";

arch/arm/dts/exynos5420-smdk5420.dts +2 -2

index 6855027..015ff15 100644
@@ -37,7 +37,7 @@
  	};
 
  	/* s2mps11 is on i2c bus 4 */
-	i2c at 12ca0000 {
+	i2c at 12CA0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		pmic at 66 {

@@ -82,7 +82,7 @@
  		samsung,codec-type = "wm8994";
  	};
 
-	i2c at 12c70000 {
+	i2c at 12C70000 {
  		soundcodec at 1a {
  			reg = <0x1a>;
  			compatible = "wolfson,wm8994-codec";

arch/arm/dts/exynos54xx.dtsi +18 -18

index 31fabb1..bd3619d 100644
@@ -14,17 +14,17 @@
  	};
 
  	aliases {
-		i2c0 = "/i2c at 12c60000";
-		i2c1 = "/i2c at 12c70000";
-		i2c2 = "/i2c at 12c80000";
-		i2c3 = "/i2c at 12c90000";
-		i2c4 = "/i2c at 12ca0000";
-		i2c5 = "/i2c at 12cb0000";
-		i2c6 = "/i2c at 12cc0000";
-		i2c7 = "/i2c at 12cd0000";
-		i2c8 = "/i2c at 12e00000";
-		i2c9 = "/i2c at 12e10000";
-		i2c10 = "/i2c at 12e20000";
+		i2c0 = "/i2c at 12C60000";
+		i2c1 = "/i2c at 12C70000";
+		i2c2 = "/i2c at 12C80000";
+		i2c3 = "/i2c at 12C90000";
+		i2c4 = "/i2c at 12CA0000";
+		i2c5 = "/i2c at 12CB0000";
+		i2c6 = "/i2c at 12CC0000";
+		i2c7 = "/i2c at 12CD0000";
+		i2c8 = "/i2c at 12E00000";
+		i2c9 = "/i2c at 12E10000";
+		i2c10 = "/i2c at 12E20000";
  		pinctrl0 = &pinctrl_0;
  		pinctrl1 = &pinctrl_1;
  		pinctrl2 = &pinctrl_2;

@@ -42,7 +42,7 @@
  		xhci1 = "/xhci at 12400000";
  	};
 
-	i2c at 12ca0000 {
+	i2c at 12CA0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -50,7 +50,7 @@
  		interrupts = <0 60 0>;
  	};
 
-	i2c at 12cb0000 {
+	i2c at 12CB0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -58,7 +58,7 @@
  		interrupts = <0 61 0>;
  	};
 
-	i2c at 12cc0000 {
+	i2c at 12CC0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -66,7 +66,7 @@
  		interrupts = <0 62 0>;
  	};
 
-	i2c at 12cd0000 {
+	i2c at 12CD0000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -74,7 +74,7 @@
  		interrupts = <0 63 0>;
  	};
 
-	i2c at 12e00000 {
+	i2c at 12E00000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -82,7 +82,7 @@
  		interrupts = <0 87 0>;
  	};
 
-	i2c at 12e10000 {
+	i2c at 12E10000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

@@ -90,7 +90,7 @@
  		interrupts = <0 88 0>;
  	};
 
-	i2c at 12e20000 {
+	i2c at 12E20000 {
  		#address-cells = <1>;
  		#size-cells = <0>;
  		compatible = "samsung,exynos5-hsi2c";

arch/arm/dts/exynos5800-peach-pi.dts +3 -3

index 176ce55..4e548f7 100644
@@ -25,7 +25,7 @@
  	aliases {
  		serial0 = "/serial at 12C30000";
  		console = "/serial at 12C30000";
-		pmic = "/i2c at 12ca0000";
+		pmic = "/i2c at 12CA0000";
  	};
 
  	dmc {

@@ -49,7 +49,7 @@
  	};
 
  	/* MAX77802 is on i2c bus 4 */
-	i2c at 12ca0000 {
+	i2c at 12CA0000 {
  		clock-frequency = <400000>;
  		power-regulator at 9 {
  			compatible = "maxim,max77802-pmic";

@@ -57,7 +57,7 @@
  		};
  	};
 
-	i2c at 12cd0000 { /* i2c7 */
+	i2c at 12CD0000 { /* i2c7 */
  		clock-frequency = <100000>;
  	       soundcodec at 20 {
  	              reg = <0x20>;

Hello Simon,

Quoted 22 lines · Simon Glass

The kernel uses upper case for I2C unit addresses. Follow the same convention to reduce differences.

Signed-off-by Simon Glass <[email protected]>

---

  arch/arm/dts/exynos5.dtsi             | 34
++++++++++++++++-----------------
  arch/arm/dts/exynos5250-arndale.dts   | 16 ++++++++--------
  arch/arm/dts/exynos5250-smdk5250.dts  | 21 ++++++++++----------
  arch/arm/dts/exynos5250-snow.dts      | 32
+++++++++++++++++--------------
  arch/arm/dts/exynos5250.dtsi          | 24 +++++++++++------------
  arch/arm/dts/exynos5420-peach-pit.dts |  8 ++++----
  arch/arm/dts/exynos5420-smdk5420.dts  |  4 ++--
  arch/arm/dts/exynos54xx.dtsi          | 36
+++++++++++++++++------------------
  arch/arm/dts/exynos5800-peach-pi.dts  |  8 ++++----
  9 files changed, 94 insertions(+), 89 deletions(-)

Acked-by Przemyslaw Marczak <[email protected]>

Best regards
--
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com

Snow and smdk5250 use a max77686 PMIC. We have a driver for this, so add the relevant node to the device tree so it can be used.

Signed-off-by Simon Glass <[email protected]>

---

  arch/arm/dts/exynos5250-smdk5250.dts | 150 ++++++++++++++++++++++++++++++++++
  arch/arm/dts/exynos5250-snow.dts     | 154 +++++++++++++++++++++++++++++++++++
  2 files changed, 304 insertions(+)

arch/arm/dts/exynos5250-smdk5250.dts +0 -0

index 636fec9..8b69544 100644
@@ -150,3 +150,153 @@
  		samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
  	};

arch/arm/dts/exynos5250-smdk5250.dts +10 -0

+		interrupt-parent = <&gpx3>;
+		interrupts = <2 IRQ_TYPE_NONE>;
+
+		voltage-regulators {
+			ldo1_reg: LDO1 {
+				regulator-name = "P1.0V_LDO_OUT1";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};

Hello Simon,

Quoted 26 lines · Simon Glass

Snow and smdk5250 use a max77686 PMIC. We have a driver for this, so add the relevant node to the device tree so it can be used.

Signed-off-by Simon Glass <[email protected]>

---

  arch/arm/dts/exynos5250-smdk5250.dts | 150
++++++++++++++++++++++++++++++++++
  arch/arm/dts/exynos5250-snow.dts     | 154
+++++++++++++++++++++++++++++++++++
  2 files changed, 304 insertions(+)

arch/arm/dts/exynos5250-smdk5250.dts +4 -0

index 636fec9..8b69544 100644
@@ -150,3 +150,153 @@
                samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
        };
  };
+
+&i2c_0 {
+       status = "okay";
+       samsung,i2c-sda-delay = <100>;

arch/arm/dts/exynos5250-smdk5250.dts line 161

Quoted 5 lines

arch/arm/dts/exynos5250-smdk5250.dts +5 -0

+       samsung,i2c-max-bus-freq = <20000>;
+
+       max77686 at 09 {
+               compatible = "maxim,max77686";
+               reg = <0x09>;

Are those two properties below, required? (The same for snow dts)

Quoted 2 lines

arch/arm/dts/exynos5250-smdk5250.dts +2 -0

+               interrupt-parent = <&gpx3>;
+               interrupts = <2 IRQ_TYPE_NONE>;

Quoted 8 lines

arch/arm/dts/exynos5250-smdk5250.dts +8 -0

+
+               voltage-regulators {
+                       ldo1_reg: LDO1 {
+                               regulator-name = "P1.0V_LDO_OUT1";
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-always-on;
+                       };

...snip...

Acked-by Przemyslaw Marczak <[email protected]>

Best regards
--
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com

On pit and pi the TPS65090 regulator is connected only to the EC and we must use a tunnel to get to it. The existing U-Boot support relies on a special driver. Add a tunnel definition so that the new device-model TPS65090 driver can be used unmodified.

Signed-off-by Simon Glass <[email protected]>

---

 arch/arm/dts/exynos5250-snow.dts      |  98 ++++++++++++++++++++++++++-
 arch/arm/dts/exynos5420-peach-pit.dts | 124 +++++++++++++++++++++++++++-------
 arch/arm/dts/exynos5800-peach-pi.dts  | 123 ++++++++++++++++++++++++++-------
 3 files changed, 297 insertions(+), 48 deletions(-)