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ARM: dts: socfpga: Add support of Terasic DE0 Atlas board

PATCH New dinguyen at opensource.altera.com 2 participants 4 messages Jul 14, 2015 – Jul 16, 2015

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PATCH 1/1 ARM: dts: socfpga: Add support of Terasic DE0 Atlas board

From: Dalon Westergreen <[email protected]>

The Terasic DE0 Atlas board is also known as the DE0-Nano board.

---
 arch/arm/boot/dts/Makefile                        |    1 +
 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts |  109 +++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
arch/arm/boot/dts/Makefile +1 -0
index 246473a..29e33aa 100644
@@ -522,6 +522,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
 	socfpga_cyclone5_socdk.dtb \
+	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
 	socfpga_vt.dtb
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +109 -0

109 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 ARM: dts: socfpga: Add support of Terasic DE0 Atlas board

Hi!

Quoted 17 lines · dinguyen at opensource.altera.com

From: Dalon Westergreen <[email protected]>

The Terasic DE0 Atlas board is also known as the DE0-Nano board.

---
 arch/arm/boot/dts/Makefile                        |    1 +
 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts |  109 +++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
arch/arm/boot/dts/Makefile +0 -0
index 246473a..29e33aa 100644

arch/arm/boot/dts/Makefile dtb-$(CONFIG_ARCH_SOCFPGA) += \ · line 525

Quoted 4 lines
arch/arm/boot/dts/Makefile +1 -0
@@ -522,6 +522,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
 	socfpga_cyclone5_socdk.dtb \
+	socfpga_cyclone5_de0_sockit.dtb \
                             ^^^^^^

Is that intentional? Terasic doesn't mention sockit at all in the name of the board.

Quoted 35 lines
arch/arm/boot/dts/Makefile +0 -0
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
 	socfpga_vt.dtb
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +26 -0
new file mode 100644
index 0000000..3172c82
@@ -0,0 +1,109 @@
+/*
+ * Copyright Altera Corporation (C) 2015. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "Terasic DE-0(Atlas)";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 36

Quoted 10 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +10 -0
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>; /* 1GB */
+	};
+
+	aliases {
+		/* this allow the ethaddr uboot environmnet variable contents
+		 * to be added to the gmac1 device tree blob.
+		 */

I'd personally like to get rid of these types of comments in the dts. It doesn't matter what uboot needs or does IMHO.

Quoted 63 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +63 -0
+		ethernet0 = &gmac1;
+	};
+
+	regulator_3_3v: 3-3-v-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		hps0 {
+			label = "hps_led0";
+			gpios = <&portb 24 0>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
+
+&gmac1 {
+	status = "okay";
+	phy-mode = "rgmii";
+
+	rxd0-skew-ps = <0>;
+	rxd1-skew-ps = <0>;
+	rxd2-skew-ps = <0>;
+	rxd3-skew-ps = <0>;
+	txen-skew-ps = <0>;
+	txc-skew-ps = <2600>;
+	rxdv-skew-ps = <0>;
+	rxc-skew-ps = <2000>;
+	max-frame-size = <3800>;
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	speed-mode = <0>;
+
+	adxl345: adxl345 at 0 {
+		compatible = "adi,adxl345";
+		reg = <0x53>;
+
+		interrupt-parent = <&portc>;
+		interrupts = <3 2>;
+	};
+	
+};
+
+&mmc0 {
+	vmmc-supply = <&regulator_3_3v>;

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 109

Quoted 10 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +10 -0
+	vqmmc-supply = <&regulator_3_3v>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};

Rest looks okay to me.

Regards,
Steffen

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#2 lore raw

PATCH 1/1 ARM: dts: socfpga: Add support of Terasic DE0 Atlas board

Quoted 26 lines · Steffen Trumtrar

Hi!

Quoted 17 lines · dinguyen at opensource.altera.com

From: Dalon Westergreen <[email protected]>

The Terasic DE0 Atlas board is also known as the DE0-Nano board.

---
 arch/arm/boot/dts/Makefile                        |    1 +
 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts |  109 +++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
arch/arm/boot/dts/Makefile +0 -0
index 246473a..29e33aa 100644

arch/arm/boot/dts/Makefile dtb-$(CONFIG_ARCH_SOCFPGA) += \ · line 525

Quoted 4 lines
arch/arm/boot/dts/Makefile +1 -0
@@ -522,6 +522,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
 	socfpga_cyclone5_socdk.dtb \
+	socfpga_cyclone5_de0_sockit.dtb \
                             ^^^^^^
Quoted 3 lines

Is that intentional? Terasic doesn't mention sockit at all in the name of the board.

Yes. From the Terasic website[1], they name it DE0-Nano-SoCKit/Atlas-SoCKit.

Quoted 25 lines
Quoted 25 lines
arch/arm/boot/dts/Makefile +0 -0
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
 	socfpga_vt.dtb
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +16 -0
new file mode 100644
index 0000000..3172c82
@@ -0,0 +1,109 @@
+/*
+ * Copyright Altera Corporation (C) 2015. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
Quoted 8 lines

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 24

Quoted 8 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +8 -0
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "Terasic DE-0(Atlas)";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";

Use stdpath-out here.

Quoted 7 lines
Quoted 7 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +7 -0
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>; /* 1GB */
+	};
Quoted 9 lines

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 36

Quoted 5 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +5 -0
+
+	aliases {
+		/* this allow the ethaddr uboot environmnet variable contents
+		 * to be added to the gmac1 device tree blob.
+		 */

I'd personally like to get rid of these types of comments in the dts. It doesn't matter what uboot needs or does IMHO.

Thats fine, I can remove the comment.

Dinh

[1]
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=941

#3 lore raw

PATCH 1/1 ARM: dts: socfpga: Add support of Terasic DE0 Atlas board

Hi!

Quoted 27 lines · Dinh Nguyen
Quoted 26 lines · Steffen Trumtrar

Hi!

Quoted 17 lines · dinguyen at opensource.altera.com

From: Dalon Westergreen <[email protected]>

The Terasic DE0 Atlas board is also known as the DE0-Nano board.

---
 arch/arm/boot/dts/Makefile                        |    1 +
 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts |  109 +++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
arch/arm/boot/dts/Makefile +0 -0
index 246473a..29e33aa 100644

arch/arm/boot/dts/Makefile dtb-$(CONFIG_ARCH_SOCFPGA) += \ · line 525

Quoted 4 lines
arch/arm/boot/dts/Makefile +1 -0
@@ -522,6 +522,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
 	socfpga_cyclone5_socdk.dtb \
+	socfpga_cyclone5_de0_sockit.dtb \
                             ^^^^^^
Quoted 6 lines
Quoted 3 lines

Is that intentional? Terasic doesn't mention sockit at all in the name of the board.

Yes. From the Terasic website[1], they name it DE0-Nano-SoCKit/Atlas-SoCKit.

Ah, you're right. There is a DE0-Nano "Development Board" AND and a DE0-Nano"-Soc Kit". Then the name is correct of course. For "DE0 nano" Google gave me the first though. Maybe the commit message should mention that there are two boards and this is the DE0-Nano-Soc Kit (even if Atlas seems to point to the right board) ?!

Quoted 53 lines
Quoted 25 lines
Quoted 25 lines
arch/arm/boot/dts/Makefile +0 -0
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
 	socfpga_vt.dtb
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +16 -0
new file mode 100644
index 0000000..3172c82
@@ -0,0 +1,109 @@
+/*
+ * Copyright Altera Corporation (C) 2015. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
Quoted 8 lines

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 24

Quoted 8 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +8 -0
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "Terasic DE-0(Atlas)";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";

Use stdpath-out here.

Quoted 7 lines
Quoted 7 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +7 -0
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>; /* 1GB */
+	};
Quoted 9 lines

arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts line 36

Quoted 5 lines
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts new file +5 -0
+
+	aliases {
+		/* this allow the ethaddr uboot environmnet variable contents
+		 * to be added to the gmac1 device tree blob.
+		 */

I'd personally like to get rid of these types of comments in the dts. It doesn't matter what uboot needs or does IMHO.

Quoted 2 lines

Thats fine, I can remove the comment.

Cool.

Thanks,
Steffen

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |