armv8: ls2085aqds: DSPI pin muxing configure through QIXIS

From: Haikun Wang <[email protected]>

DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" configuration, if those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure the SPI routing to on-board SPI memory. Otherwise will configure to SDHC.
Enable DSPI in u-boot "hwconfig" using below command:
setenv hwconfig "$hwconfig;dspi"

---
 arch/arm/include/asm/arch-fsl-lsch3/config.h |  2 ++
 board/freescale/ls2085aqds/ls2085aqds.c      | 48 ++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

index ca8d38c..8675e91 100644
@@ -137,6 +137,8 @@
 #define DCFG_PORSR1			0x000
 #define DCFG_PORSR1_RCW_SRC		0xff800000
 #define DCFG_PORSR1_RCW_SRC_NOR		0x12f00000
+#define DCFG_RCWSR13			0x130
+#define DCFG_RCWSR13_DSPI		(0 << 8)
 
 #define DCFG_DCSR_BASE		0X700100000ULL
 #define DCFG_DCSR_PORCR1		0x000

1.9.1

This set is applied to u-boot-fsl-qoriq master branch with subject fix.

York