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keystone2: add high memory test

PATCH New Vitaly Andrianov 2 participants 3 messages Jul 8, 2015 – Jul 22, 2015

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm/Texas instrument Keystone architecture
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Vitaly Andrianov

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PATCH 1/1 keystone2: add high memory test

Keystone2 SOC physical DDR3 address range is outside the first 4GB and cannot be entirely accessible without MMU enabled. Only first 2GB of the physical memory have 32-bits aliased addresses. This patch adds u-boot shell command that allows to enable/disable MMU and map the 1GB of 36bits physical memory to the first 4GB address range.

Signed-off-by Vitaly Andrianov <[email protected]>
---
 arch/arm/mach-keystone/Makefile  |   3 +-
 arch/arm/mach-keystone/highmem.c | 162 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 164 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-keystone/highmem.c
arch/arm/mach-keystone/Makefile +2 -1
index ed030db..56b6457 100644
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2012-2014
+# (C) Copyright 2012-2015
 #     Texas Instruments Incorporated, <www.ti.com>
 #
 # SPDX-License-Identifier:     GPL-2.0+

@@ -16,3 +16,4 @@ obj-y	+= cmd_mon.o
 obj-y	+= msmc.o
 obj-y	+= ddr3.o cmd_ddr3.o
 obj-y	+= keystone.o
+obj-y	+= highmem.o
arch/arm/mach-keystone/highmem.c new file +162 -0

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PATCH 1/1 keystone2: add high memory test

Quoted 6 lines · Vitaly Andrianov

Keystone2 SOC physical DDR3 address range is outside the first 4GB and cannot be entirely accessible without MMU enabled. Only first 2GB of the physical memory have 32-bits aliased addresses. This patch adds u-boot shell command that allows to enable/disable MMU and map the 1GB of 36bits physical memory to the first 4GB address range.

Quoted 6 lines
Signed-off-by Vitaly Andrianov <[email protected]>
---
 arch/arm/mach-keystone/Makefile  |   3 +-
 arch/arm/mach-keystone/highmem.c | 162 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 164 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-keystone/highmem.c

The code looks reasonable. But why do we need this? Thanks.

Signature · 8 lines
Tom
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PATCH 1/1 keystone2: add high memory test

Quoted 8 lines · Tom Rini
Quoted 6 lines · Vitaly Andrianov

Keystone2 SOC physical DDR3 address range is outside the first 4GB and cannot be entirely accessible without MMU enabled. Only first 2GB of the physical memory have 32-bits aliased addresses. This patch adds u-boot shell command that allows to enable/disable MMU and map the 1GB of 36bits physical memory to the first 4GB address range.

Quoted 9 lines
Quoted 6 lines
Signed-off-by Vitaly Andrianov <[email protected]>
---
  arch/arm/mach-keystone/Makefile  |   3 +-
  arch/arm/mach-keystone/highmem.c | 162 +++++++++++++++++++++++++++++++++++++++
  2 files changed, 164 insertions(+), 1 deletion(-)

create mode 100644 arch/arm/mach-keystone/highmem.c

The code looks reasonable. But why do we need this? Thanks.

Tom,

I added this code to test DDR3 configuration. Probably you are right. After configuration is done we don't need this code.

Thanks,
-Vitaly