nand: Sync with Linux v4.1
cover nand: Sync with Linux v4.1
As requested, these patches can be found in the sync-4.1 branch of u-boot-nand-flash.git.
Ezequiel Garcia (1):
mtd: Introduce mtd_block_isreserved()
Scott Wood (2):
nand: Remove __UBOOT__ ifdefs
nand: Sync with Linux v4.1
drivers/mtd/mtdcore.c | 14 +- drivers/mtd/mtdpart.c | 9 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/atmel_nand_ecc.h | 3 + drivers/mtd/nand/denali.c | 209 +++++++------ drivers/mtd/nand/denali.h | 8 +- drivers/mtd/nand/docg4.c | 6 +- drivers/mtd/nand/fsl_elbc_nand.c | 14 + drivers/mtd/nand/fsl_ifc_nand.c | 33 +- drivers/mtd/nand/nand_base.c | 615 ++++++++++---------------------------- drivers/mtd/nand/nand_bbt.c | 75 ++--- drivers/mtd/nand/nand_ids.c | 10 +- drivers/mtd/nand/nand_timings.c | 252 ++++++++++++++++ include/fsl_ifc.h | 2 + include/linux/mtd/mtd.h | 2 + include/linux/mtd/nand.h | 122 +++++--- 16 files changed, 715 insertions(+), 660 deletions(-) create mode 100644 drivers/mtd/nand/nand_timings.c
Signature · 1 line
2.1.4
PATCH 1/3 nand: Remove __UBOOT__ ifdefs
I didn't approve the patch that added them. Get them out of the way before doing a sync.
--- drivers/mtd/nand/nand_base.c | 397 +------------------------------------------ drivers/mtd/nand/nand_bbt.c | 30 +--- drivers/mtd/nand/nand_ids.c | 5 - include/linux/mtd/nand.h | 34 ---- 4 files changed, 4 insertions(+), 462 deletions(-)
drivers/mtd/nand/nand_base.c +1 -396
@@ -29,26 +29,6 @@* */ -#ifndef __UBOOT__ -#define pr_fmt (fmt) KBUILD_MODNAME ": " fmt - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/types.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/nand_ecc.h> -#include <linux/mtd/nand_bch.h> -#include <linux/interrupt.h> -#include <linux/bitops.h> -#include <linux/leds.h> -#include <linux/io.h> -#include <linux/mtd/partitions.h> -#else #define pr_fmt (fmt) KBUILD_MODNAME ": " fmt#include <common.h> #include <malloc.h>
@@ -77,7 +57,6 @@#endif static bool is_module_text_address (unsigned long addr) {return 0 ;} -#endif /* Define default oob placement schemes for large and small page devices */ static struct nand_ecclayout nand_oob_8 = {
@@ -165,17 +144,8 @@ static void nand_release_device(struct mtd_info *mtd) {struct nand_chip *chip = mtd->priv; -#ifndef __UBOOT__ -/* Release the controller and the chip */ -spin_lock (&chip->controller->lock); - chip->controller->active =NULL ; - chip->state =FL_READY ; -wake_up (&chip->controller->wq); -spin_unlock (&chip->controller->lock); -#else /* De-select the NAND device */ chip->select_chip (mtd,-1 ); -#endif }/**
@@ -184,11 +154,7 @@ static void nand_release_device(struct mtd_info *mtd)* * Default read function for 8bit buswidth */ -#ifndef __UBOOT__ -static uint8_t nand_read_byte(struct mtd_info *mtd) -#else uint8_t nand_read_byte (struct mtd_info *mtd) -#endif {struct nand_chip *chip = mtd->priv;return readb (chip->IO_ADDR_R);
@@ -288,7 +254,7 @@ static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte) chip->write_buf (mtd, (uint8_t *)&word,2 ); } -#if defined(__UBOOT__) && !defined(CONFIG_BLACKFIN ) +#if !defined(CONFIG_BLACKFIN )static void iowrite8_rep (void *addr,const uint8_t *buf,int len) {int i;
@@ -331,11 +297,7 @@ static void iowrite16_rep(void *addr, void *buf, int len)* * Default write function for 8bit buswidth. */ -#ifndef __UBOOT__ -static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) -#else void nand_write_buf (struct mtd_info *mtd,const uint8_t *buf,int len) -#endif {struct nand_chip *chip = mtd->priv;
@@ -350,11 +312,7 @@ void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)* * Default read function for 8bit buswidth. */ -#ifndef __UBOOT__ -static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) -#else void nand_read_buf (struct mtd_info *mtd,uint8_t *buf,int len) -#endif {struct nand_chip *chip = mtd->priv;
@@ -369,11 +327,7 @@ void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)* * Default write function for 16bit buswidth. */ -#ifndef __UBOOT__ -static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) -#else void nand_write_buf16 (struct mtd_info *mtd,const uint8_t *buf,int len) -#endif {struct nand_chip *chip = mtd->priv;u16 *p = (u16 *) buf;
@@ -389,11 +343,7 @@ void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)* * Default read function for 16bit buswidth. */ -#ifndef __UBOOT__ -static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) -#else void nand_read_buf16 (struct mtd_info *mtd,uint8_t *buf,int len) -#endif {struct nand_chip *chip = mtd->priv;u16 *p = (u16 *) buf;
@@ -602,50 +552,10 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,return nand_isbad_bbt (mtd, ofs, allowbbt); } -#ifndef __UBOOT__ -/** -* panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. -* @mtd: MTD device structure -* @timeo: Timeout -* -* Helper function for nand_wait_ready used when needing to wait in interrupt -* context. -*/ -static void panic_nand_wait_ready (struct mtd_info *mtd,unsigned long timeo) -{ -struct nand_chip *chip = mtd->priv; -int i; - -/* Wait for the device to get ready */ -for (i =0 ; i < timeo; i++) { -if (chip->dev_ready (mtd)) -break ; -touch_softlockup_watchdog (); -mdelay (1 ); - } -} -#endif -/* Wait for the ready pin, after a command. The timeout is caught later. */ void nand_wait_ready (struct mtd_info *mtd) {struct nand_chip *chip = mtd->priv; -#ifndef __UBOOT__ -unsigned long timeo = jiffies +msecs_to_jiffies (20 ); - -/* 400ms timeout */ -if (in_interrupt () || oops_in_progress) -return panic_nand_wait_ready (mtd,400 ); - -led_trigger_event (nand_led_trigger,LED_FULL ); -/* Wait until command is processed or timeout occurs */ -do { -if (chip->dev_ready (mtd)) -break ; -touch_softlockup_watchdog (); - }while (time_before (jiffies, timeo)); -led_trigger_event (nand_led_trigger,LED_OFF ); -#else u32 timeo = (CONFIG_SYS_HZ *20 ) /1000 ;u32 time_start;
@@ -656,7 +566,6 @@ void nand_wait_ready(struct mtd_info *mtd)if (chip->dev_ready (mtd))break ; } -#endif }EXPORT_SYMBOL_GPL (nand_wait_ready);
@@ -903,39 +812,8 @@ static int nand_get_device(struct mtd_info *mtd, int new_state) {struct nand_chip *chip = mtd->priv; -#ifndef __UBOOT__ -spinlock_t *lock = &chip->controller->lock; -wait_queue_head_t *wq = &chip->controller->wq; -DECLARE_WAITQUEUE (wait, current); -retry: -spin_lock (lock); - -/* Hardware controller shared among independent devices */ -if (!chip->controller->active) - chip->controller->active = chip; - -if (chip->controller->active == chip && chip->state ==FL_READY ) { - chip->state = new_state; -spin_unlock (lock); -return 0 ; - } -if (new_state ==FL_PM_SUSPENDED ) { -if (chip->controller->active->state ==FL_PM_SUSPENDED ) { - chip->state =FL_PM_SUSPENDED ; -spin_unlock (lock); -return 0 ; - } - } -set_current_state (TASK_UNINTERRUPTIBLE ); -add_wait_queue (wq, &wait); -spin_unlock (lock); -schedule (); -remove_wait_queue (wq, &wait); - goto retry; -#else chip->state = new_state;return 0 ; -#endif }/**
@@ -989,23 +867,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) chip->cmdfunc (mtd,NAND_CMD_STATUS ,-1 ,-1 ); -#ifndef __UBOOT__ -if (in_interrupt () || oops_in_progress) -panic_nand_wait (mtd, chip, timeo); -else { - timeo = jiffies +msecs_to_jiffies (timeo); -while (time_before (jiffies, timeo)) { -if (chip->dev_ready) { -if (chip->dev_ready (mtd)) -break ; - }else { -if (chip->read_byte (mtd) &NAND_STATUS_READY ) -break ; - } -cond_resched (); - } - } -#else u32 timer = (CONFIG_SYS_HZ * timeo) /1000 ;u32 time_start;
@@ -1019,7 +880,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)break ; } } -#endif led_trigger_event (nand_led_trigger,LED_OFF ); status = (int )chip->read_byte (mtd);
@@ -1028,162 +888,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)return status; } -#ifndef __UBOOT__ -/** -* __nand_unlock - [REPLACEABLE] unlocks specified locked blocks -* @mtd: mtd info -* @ofs: offset to start unlock from -* @len: length to unlock -* @invert: when = 0, unlock the range of blocks within the lower and -* upper boundary address -* when = 1, unlock the range of blocks outside the boundaries -* of the lower and upper boundary address -* -* Returs unlock status. -*/ -static int __nand_unlock (struct mtd_info *mtd,loff_t ofs, -uint64_t len,int invert) -{ -int ret =0 ; -int status, page; -struct nand_chip *chip = mtd->priv; - -/* Submit address of first page to unlock */ - page = ofs >> chip->page_shift; - chip->cmdfunc (mtd,NAND_CMD_UNLOCK1 ,-1 , page & chip->pagemask); - -/* Submit address of last page to unlock */ - page = (ofs + len) >> chip->page_shift; - chip->cmdfunc (mtd,NAND_CMD_UNLOCK2 ,-1 , - (page | invert) & chip->pagemask); - -/* Call wait ready function */ - status = chip->waitfunc (mtd, chip); -/* See if device thinks it succeeded */ -if (status &NAND_STATUS_FAIL ) { -pr_debug ("%s: error status = 0x%08x\n" , - __func__, status); - ret = -EIO ; - } - -return ret; -} - -/** -* nand_unlock - [REPLACEABLE] unlocks specified locked blocks -* @mtd: mtd info -* @ofs: offset to start unlock from -* @len: length to unlock -* -* Returns unlock status. -*/ -int nand_unlock (struct mtd_info *mtd,loff_t ofs,uint64_t len) -{ -int ret =0 ; -int chipnr; -struct nand_chip *chip = mtd->priv; - -pr_debug ("%s: start = 0x%012llx, len = %llu\n" , - __func__, (unsigned long long )ofs, len); - -if (check_offs_len (mtd, ofs, len)) - ret = -EINVAL ; - -/* Align to last block address if size addresses end of the device */ -if (ofs + len == mtd->size) - len -= mtd->erasesize; - -nand_get_device (mtd,FL_UNLOCKING ); - -/* Shift to get chip number */ - chipnr = ofs >> chip->chip_shift; - - chip->select_chip (mtd, chipnr); - -/* Check, if it is write protected */ -if (nand_check_wp (mtd)) { -pr_debug ("%s: device is write protected!\n" , - __func__); - ret = -EIO ; - goto out; - } - - ret =__nand_unlock (mtd, ofs, len,0 ); - -out: - chip->select_chip (mtd,-1 ); -nand_release_device (mtd); - -return ret; -} -EXPORT_SYMBOL (nand_unlock); - -/** -* nand_lock - [REPLACEABLE] locks all blocks present in the device -* @mtd: mtd info -* @ofs: offset to start unlock from -* @len: length to unlock -* -* This feature is not supported in many NAND parts. 'Micron' NAND parts do -* have this feature, but it allows only to lock all blocks, not for specified -* range for block. Implementing 'lock' feature by making use of 'unlock', for -* now. -* -* Returns lock status. -*/ -int nand_lock (struct mtd_info *mtd,loff_t ofs,uint64_t len) -{ -int ret =0 ; -int chipnr, status, page; -struct nand_chip *chip = mtd->priv; - -pr_debug ("%s: start = 0x%012llx, len = %llu\n" , - __func__, (unsigned long long )ofs, len); - -if (check_offs_len (mtd, ofs, len)) - ret = -EINVAL ; - -nand_get_device (mtd,FL_LOCKING ); - -/* Shift to get chip number */ - chipnr = ofs >> chip->chip_shift; - - chip->select_chip (mtd, chipnr); - -/* Check, if it is write protected */ -if (nand_check_wp (mtd)) { -pr_debug ("%s: device is write protected!\n" , - __func__); - status =MTD_ERASE_FAILED ; - ret = -EIO ; - goto out; - } - -/* Submit address of first page to lock */ - page = ofs >> chip->page_shift; - chip->cmdfunc (mtd,NAND_CMD_LOCK ,-1 , page & chip->pagemask); - -/* Call wait ready function */ - status = chip->waitfunc (mtd, chip); -/* See if device thinks it succeeded */ -if (status &NAND_STATUS_FAIL ) { -pr_debug ("%s: error status = 0x%08x\n" , - __func__, status); - ret = -EIO ; - goto out; - } - - ret =__nand_unlock (mtd, ofs, len,0x1 ); - -out: - chip->select_chip (mtd,-1 ); -nand_release_device (mtd); - -return ret; -} -EXPORT_SYMBOL (nand_lock); -#endif -/** * nand_read_page_raw - [INTERN] read raw page data without ecc * @mtd: mtd info structure
@@ -2479,13 +2183,8 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,if (!writelen)return 0 ; -#ifndef __UBOOT__ -/* Reject writes, which are not page aligned */ -if (NOTALIGNED (to) ||NOTALIGNED (ops->len)) { -#else /* Reject writes, which are not page aligned */ if (NOTALIGNED (to)) { -#endif pr_notice ("%s: attempt to write non page aligned data\n" , __func__);return -EINVAL ;
@@ -3013,31 +2712,6 @@ static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,return 0 ; } -#ifndef __UBOOT__ -/** -* nand_suspend - [MTD Interface] Suspend the NAND flash -* @mtd: MTD device structure -*/ -static int nand_suspend (struct mtd_info *mtd) -{ -return nand_get_device (mtd,FL_PM_SUSPENDED ); -} - -/** -* nand_resume - [MTD Interface] Resume the NAND flash -* @mtd: MTD device structure -*/ -static void nand_resume (struct mtd_info *mtd) -{ -struct nand_chip *chip = mtd->priv; - -if (chip->state ==FL_PM_SUSPENDED ) -nand_release_device (mtd); -else -pr_err ("%s called for a chip which is not in suspended state\n" , - __func__); -} -#endif /* Set default functions */ static void nand_set_defaults (struct nand_chip *chip,int busw)
@@ -3090,11 +2764,7 @@ static void nand_set_defaults(struct nand_chip *chip, int busw) }/* Sanitize ONFI strings so we can safely print them */ -#ifndef __UBOOT__ -static void sanitize_string(uint8_t *s, size_t len) -#else static void sanitize_string (char *s,size_t len) -#endif {ssize_t i;
@@ -3160,11 +2830,7 @@ static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,* Check the signature. * Do not strictly follow the ONFI spec, maybe changed in future. */ -#ifndef __UBOOT__ -if (strncmp (ep->sig,"EPPS" ,4 )) { -#else if (strncmp ((char *)ep->sig,"EPPS" ,4 )) { -#endif pr_debug ("The signature is invalid.\n" ); goto ext_out; }
@@ -3695,11 +3361,7 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type)static bool find_full_id_nand (struct mtd_info *mtd,struct nand_chip *chip,struct nand_flash_dev *type,u8 *id_data,int *busw) { -#ifndef __UBOOT__ -if (!strncmp (type->id, id_data, type->id_len)) { -#else if (!strncmp ((char *)type->id, (char *)id_data, type->id_len)) { -#endif mtd->writesize = type->pagesize; mtd->erasesize = type->erasesize; mtd->oobsize = type->oobsize;
@@ -3980,18 +3642,7 @@ int nand_scan_tail(struct mtd_info *mtd) !(chip->bbt_options & NAND_BBT_USE_FLASH));if (!(chip->options &NAND_OWN_BUFFERS )) { -#ifndef __UBOOT__ - nbuf =kzalloc (sizeof (*nbuf) + mtd->writesize - + mtd->oobsize *3 ,GFP_KERNEL ); -if (!nbuf) -return -ENOMEM ; - nbuf->ecccalc = (uint8_t *)(nbuf +1 ); - nbuf->ecccode = nbuf->ecccalc + mtd->oobsize; - nbuf->databuf = nbuf->ecccode + mtd->oobsize; -#else nbuf =kzalloc (sizeof (struct nand_buffers ),GFP_KERNEL ); -#endif - chip->buffers = nbuf; }else {if (!chip->buffers)
@@ -4224,10 +3875,6 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->flags = (chip->options &NAND_ROM ) ?MTD_CAP_ROM :MTD_CAP_NANDFLASH ; mtd->_erase = nand_erase; -#ifndef __UBOOT__ - mtd->_point =NULL ; - mtd->_unpoint =NULL ; -#endif mtd->_read = nand_read; mtd->_write = nand_write; mtd->_panic_write = panic_nand_write;
@@ -4236,10 +3883,6 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->_sync = nand_sync; mtd->_lock =NULL ; mtd->_unlock =NULL ; -#ifndef __UBOOT__ - mtd->_suspend = nand_suspend; - mtd->_resume = nand_resume; -#endif mtd->_block_isbad = nand_block_isbad; mtd->_block_markbad = nand_block_markbad; mtd->writebufsize = mtd->writesize;
@@ -4299,44 +3942,6 @@ int nand_scan(struct mtd_info *mtd, int maxchips) }EXPORT_SYMBOL (nand_scan); -#ifndef __UBOOT__ -/** -* nand_release - [NAND Interface] Free resources held by the NAND device -* @mtd: MTD device structure -*/ -void nand_release (struct mtd_info *mtd) -{ -struct nand_chip *chip = mtd->priv; - -if (chip->ecc.mode ==NAND_ECC_SOFT_BCH ) -nand_bch_free ((struct nand_bch_control *)chip->ecc.priv); - -mtd_device_unregister (mtd); - -/* Free bad block table memory */ -kfree (chip->bbt); -if (!(chip->options &NAND_OWN_BUFFERS )) -kfree (chip->buffers); - -/* Free bad block descriptor memory */ -if (chip->badblock_pattern && chip->badblock_pattern->options - &NAND_BBT_DYNAMICSTRUCT ) -kfree (chip->badblock_pattern); -} -EXPORT_SYMBOL_GPL (nand_release); - -static int __init nand_base_init (void ) -{ -led_trigger_register_simple ("nand-disk" , &nand_led_trigger); -return 0 ; -} - -static void __exit nand_base_exit(void) -{ -led_trigger_unregister_simple (nand_led_trigger); -} -#endif -module_init (nand_base_init);module_exit (nand_base_exit);
drivers/mtd/nand/nand_bbt.c +3 -27
@@ -59,30 +59,15 @@* */ -#ifndef __UBOOT__ -#include <linux/slab.h> -#include <linux/types.h> +#include <common.h> +#include <malloc.h> +#include <linux/compat.h> #include <linux/mtd/mtd.h> #include <linux/mtd/bbm.h> #include <linux/mtd/nand.h> #include <linux/mtd/nand_ecc.h> #include <linux/bitops.h> -#include <linux/delay.h> -#include <linux/vmalloc.h> -#include <linux/export.h> #include <linux/string.h> -#else -#include <common.h> -#include <malloc.h> -#include <linux/compat.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/bbm.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/nand_ecc.h> -#include <linux/bitops.h> -#include <linux/string.h> -#endif #define BBT_BLOCK_GOOD 0x00#define BBT_BLOCK_WORN 0x01
@@ -541,11 +526,7 @@ static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr {struct nand_chip *this = mtd->priv;int i, chips; -#ifndef __UBOOT__ -int bits, startblock, block, dir; -#else int startblock, block, dir; -#endif int scanlen = mtd->writesize + mtd->oobsize;int bbtblocks;int blocktopage = this->bbt_erase_shift - this->page_shift;
@@ -569,11 +550,6 @@ static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr bbtblocks = mtd->size >> this->bbt_erase_shift; } -#ifndef __UBOOT__ -/* Number of bits for each erase block in the bbt */ - bits = td->options &NAND_BBT_NRBITS_MSK ; -#endif -for (i =0 ; i < chips; i++) {/* Reset version information */ td->version[i] =0 ;
drivers/mtd/nand/nand_ids.c +0 -5
@@ -8,13 +8,8 @@* published by the Free Software Foundation. * */ -#ifndef __UBOOT__ -#include <linux/module.h> -#include <linux/mtd/nand.h> -#else #include <common.h> #include <linux/mtd/nand.h> -#endif #include <linux/sizes.h> #define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
include/linux/mtd/nand.h +0 -34
@@ -16,20 +16,12 @@#ifndef __LINUX_MTD_NAND_H#define __LINUX_MTD_NAND_H -#ifndef __UBOOT__ -#include <linux/wait.h> -#include <linux/spinlock.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/flashchip.h> -#include <linux/mtd/bbm.h> -#else #include "config.h" #include "linux/compat.h" #include "linux/mtd/mtd.h" #include "linux/mtd/flashchip.h" #include "linux/mtd/bbm.h" -#endif struct mtd_info ;struct nand_flash_dev ;
@@ -49,16 +41,6 @@ extern void nand_release(struct mtd_info *mtd);/* Internal helper for board drivers which need to override command function */ extern void nand_wait_ready (struct mtd_info *mtd); -#ifndef __UBOOT__ -/* locks all blocks present in the device */ -extern int nand_lock (struct mtd_info *mtd,loff_t ofs,uint64_t len); - -/* unlocks specified locked blocks */ -extern int nand_unlock (struct mtd_info *mtd,loff_t ofs,uint64_t len); - -/* The maximum number of NAND chips in an array */ -#define NAND_MAX_CHIPS 8 -#else /* * This constant declares the max. oobsize / page, which * is supported now. If you add a chip with bigger oobsize/page
@@ -66,7 +48,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);*/ #define NAND_MAX_OOBSIZE 744#define NAND_MAX_PAGESIZE 8192 -#endif /* * Constants for hardware specific CLE/ALE/NCE function
@@ -473,9 +454,6 @@ struct nand_jedec_params {struct nand_hw_control {spinlock_t lock;struct nand_chip *active; -#ifndef __UBOOT__ -wait_queue_head_t wq; -#endif };/**
@@ -557,16 +535,10 @@ struct nand_ecc_ctrl {* consecutive order. */ struct nand_buffers { -#ifndef __UBOOT__ -uint8_t *ecccalc; -uint8_t *ecccode; -uint8_t *databuf; -#else uint8_t ecccalc[ALIGN (NAND_MAX_OOBSIZE ,ARCH_DMA_MINALIGN )];uint8_t ecccode[ALIGN (NAND_MAX_OOBSIZE ,ARCH_DMA_MINALIGN )];uint8_t databuf[ALIGN (NAND_MAX_PAGESIZE +NAND_MAX_OOBSIZE ,ARCH_DMA_MINALIGN )]; -#endif };/**
@@ -734,9 +706,7 @@ struct nand_chip {uint8_t *oob_poi;struct nand_hw_control *controller; -#ifdef __UBOOT__struct nand_ecclayout *ecclayout; -#endif struct nand_ecc_ctrl ecc;struct nand_buffers *buffers;
@@ -866,13 +836,11 @@ extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,extern int nand_do_read (struct mtd_info *mtd,loff_t from,size_t len,size_t *retlen,uint8_t *buf); -#ifdef __UBOOT__/* * Constants for oob configuration */ #define NAND_SMALL_BADBLOCK_POS 5#define NAND_LARGE_BADBLOCK_POS 0 -#endif /** * struct platform_nand_chip - chip level device structure
@@ -1008,12 +976,10 @@ static inline int jedec_feature(struct nand_chip *chip) : 0; } -#ifdef __UBOOT__/* Standard NAND functions from nand_base.c */ void nand_write_buf (struct mtd_info *mtd,const uint8_t *buf,int len);void nand_write_buf16 (struct mtd_info *mtd,const uint8_t *buf,int len);void nand_read_buf (struct mtd_info *mtd,uint8_t *buf,int len);void nand_read_buf16 (struct mtd_info *mtd,uint8_t *buf,int len);uint8_t nand_read_byte (struct mtd_info *mtd); -#endif #endif /* __LINUX_MTD_NAND_H */
Signature · 1 line
2.1.4
PATCH 2/3 mtd: Introduce mtd_block_isreserved()
In reply to Scott WoodFrom: Ezequiel Garcia <[email protected]>
In addition to mtd_block_isbad(), which checks if a block is bad or reserved, it's needed to check if a block is reserved only (but not bad). This commit adds an MTD interface for it, in a similar fashion to mtd_block_isbad().
While here, fix mtd_block_isbad() so the out-of-bounds checking is done before the callback check.
---
I'd not adding anything that needs this, but the sync from v4.1 would add the NAND implementation and I don't think it makes sense to remove it. If/when other parts of MTD are synced then they will need this.
drivers/mtd/mtdcore.c | 14 ++++++++++++-- drivers/mtd/mtdpart.c | 9 +++++++++ drivers/mtd/nand/nand_base.c | 18 ++++++++++++++++++ drivers/mtd/nand/nand_bbt.c | 14 ++++++++++++++ include/linux/mtd/mtd.h | 2 ++ include/linux/mtd/nand.h | 1 + 6 files changed, 56 insertions(+), 2 deletions(-)
drivers/mtd/mtdcore.c +12 -2
@@ -1125,12 +1125,22 @@ int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) }EXPORT_SYMBOL_GPL (mtd_is_locked); -int mtd_block_isbad (struct mtd_info *mtd,loff_t ofs) +int mtd_block_isreserved (struct mtd_info *mtd,loff_t ofs) { -if (!mtd->_block_isbad) +if (ofs <0 || ofs > mtd->size) +return -EINVAL ; +if (!mtd->_block_isreserved)return 0 ; +return mtd->_block_isreserved (mtd, ofs); +} +EXPORT_SYMBOL_GPL (mtd_block_isreserved); + +int mtd_block_isbad (struct mtd_info *mtd,loff_t ofs) +{if (ofs <0 || ofs > mtd->size)return -EINVAL ; +if (!mtd->_block_isbad) +return 0 ;return mtd->_block_isbad (mtd, ofs); }EXPORT_SYMBOL_GPL (mtd_block_isbad);
drivers/mtd/mtdpart.c +9 -0
@@ -321,6 +321,13 @@ static void part_resume(struct mtd_info *mtd) }#endif +static int part_block_isreserved (struct mtd_info *mtd,loff_t ofs) +{ +struct mtd_part *part =PART (mtd); + ofs += part->offset; +return part->master->_block_isreserved (part->master, ofs); +} +static int part_block_isbad (struct mtd_info *mtd,loff_t ofs) {struct mtd_part *part =PART (mtd);
@@ -459,6 +466,8 @@ static struct mtd_part *allocate_partition(struct mtd_info *master, slave->mtd._unlock = part_unlock;if (master->_is_locked) slave->mtd._is_locked = part_is_locked; +if (master->_block_isreserved) + slave->mtd._block_isreserved = part_block_isreserved;if (master->_block_isbad) slave->mtd._block_isbad = part_block_isbad;if (master->_block_markbad)
drivers/mtd/nand/nand_base.c +18 -0
@@ -528,6 +528,23 @@ static int nand_check_wp(struct mtd_info *mtd)* nand_block_checkbad - [GENERIC] Check if a block is marked bad * @mtd: MTD device structure * @ofs: offset from device start +* +* Check if the block is mark as reserved. +*/ +static int nand_block_isreserved (struct mtd_info *mtd,loff_t ofs) +{ +struct nand_chip *chip = mtd->priv; + +if (!chip->bbt) +return 0 ; +/* Return info from the table */ +return nand_isreserved_bbt (mtd, ofs); +} + +/** +* nand_block_checkbad - [GENERIC] Check if a block is marked bad +* @mtd: MTD device structure +* @ofs: offset from device start * @getchip: 0, if the chip is already selected * @allowbbt: 1, if its allowed to access the bbt area *
@@ -3883,6 +3900,7 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->_sync = nand_sync; mtd->_lock =NULL ; mtd->_unlock =NULL ; + mtd->_block_isreserved = nand_block_isreserved; mtd->_block_isbad = nand_block_isbad; mtd->_block_markbad = nand_block_markbad; mtd->writebufsize = mtd->writesize;
drivers/mtd/nand/nand_bbt.c +14 -0
@@ -1305,6 +1305,20 @@ int nand_default_bbt(struct mtd_info *mtd) }/** +* nand_isreserved_bbt - [NAND Interface] Check if a block is reserved +* @mtd: MTD device structure +* @offs: offset in the device +*/ +int nand_isreserved_bbt (struct mtd_info *mtd,loff_t offs) +{ +struct nand_chip *this = mtd->priv; +int block; + + block = (int )(offs >> this->bbt_erase_shift); +return bbt_get_entry (this, block) ==BBT_BLOCK_RESERVED ; +} + +/** * nand_isbad_bbt - [NAND Interface] Check if a block is bad * @mtd: MTD device structure * @offs: offset in the device
include/linux/mtd/mtd.h +2 -0
@@ -238,6 +238,7 @@ struct mtd_info {int (*_lock) (struct mtd_info *mtd,loff_t ofs,uint64_t len);int (*_unlock) (struct mtd_info *mtd,loff_t ofs,uint64_t len);int (*_is_locked) (struct mtd_info *mtd,loff_t ofs,uint64_t len); +int (*_block_isreserved) (struct mtd_info *mtd,loff_t ofs);int (*_block_isbad) (struct mtd_info *mtd,loff_t ofs);int (*_block_markbad) (struct mtd_info *mtd,loff_t ofs);#ifndef __UBOOT__
@@ -328,6 +329,7 @@ static inline void mtd_sync(struct mtd_info *mtd)int mtd_lock (struct mtd_info *mtd,loff_t ofs,uint64_t len);int mtd_unlock (struct mtd_info *mtd,loff_t ofs,uint64_t len);int mtd_is_locked (struct mtd_info *mtd,loff_t ofs,uint64_t len); +int mtd_block_isreserved (struct mtd_info *mtd,loff_t ofs);int mtd_block_isbad (struct mtd_info *mtd,loff_t ofs);int mtd_block_markbad (struct mtd_info *mtd,loff_t ofs);
include/linux/mtd/nand.h +1 -0
@@ -830,6 +830,7 @@ extern struct nand_manufacturers nand_manuf_ids[];extern int nand_scan_bbt (struct mtd_info *mtd,struct nand_bbt_descr *bd);extern int nand_default_bbt (struct mtd_info *mtd);extern int nand_markbad_bbt (struct mtd_info *mtd,loff_t offs); +extern int nand_isreserved_bbt (struct mtd_info *mtd,loff_t offs);extern int nand_isbad_bbt (struct mtd_info *mtd,loff_t offs,int allowbbt);extern int nand_erase_nand (struct mtd_info *mtd,struct erase_info *instr,int allowbbt);
Signature · 1 line
2.1.4
PATCH 3/3 nand: Sync with Linux v4.1
In reply to Scott WoodUpdate the NAND code to match Linux v4.1. The previous sync was from Linux v3.15 in commit 4e67c57125290b25.
CONFIG_SYS_NAND_RESET_CNT is removed, as the upstream Linux code now has its own timeout. Plus, CONFIG_SYS_NAND_RESET_CNT was undocumented and not selected by any board.
--- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/atmel_nand_ecc.h | 3 + drivers/mtd/nand/denali.c | 209 +++++++++++++++++-------------- drivers/mtd/nand/denali.h | 8 +- drivers/mtd/nand/docg4.c | 6 +- drivers/mtd/nand/fsl_elbc_nand.c | 14 +++ drivers/mtd/nand/fsl_ifc_nand.c | 33 +++-- drivers/mtd/nand/nand_base.c | 204 ++++++++++++++++++++---------- drivers/mtd/nand/nand_bbt.c | 31 ++--- drivers/mtd/nand/nand_ids.c | 5 + drivers/mtd/nand/nand_timings.c | 252 ++++++++++++++++++++++++++++++++++++++ include/fsl_ifc.h | 2 + include/linux/mtd/nand.h | 87 ++++++++++++- 13 files changed, 657 insertions(+), 198 deletions(-) create mode 100644 drivers/mtd/nand/nand_timings.c
drivers/mtd/nand/Makefile +1 -0
@@ -33,6 +33,7 @@ obj-y += nand_ids.o obj-y += nand_util.o obj-y += nand_ecc.o obj-y += nand_base.o +obj-y += nand_timings.o endif # not spl
drivers/mtd/nand/atmel_nand_ecc.h +3 -0
@@ -170,4 +170,7 @@ struct pmecc_errloc_regs {#define PMECC_MAX_TIMEOUT_US (100 * 1000) +/* Reserved bytes in oob area */ +#define PMECC_OOB_RESERVED_BYTES 2 +#endif
drivers/mtd/nand/denali.c +115 -94
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drivers/mtd/nand/denali.h +4 -4
@@ -5,6 +5,9 @@* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DENALI_H__ +#define __DENALI_H__ +#include <linux/mtd/nand.h> #define DEVICE_RESET 0x0
@@ -381,9 +384,6 @@#define CUSTOM_CONF_PARAMS 0 -#ifndef _LLD_NAND_ -#define _LLD_NAND_ -#define INDEX_CTRL_REG 0x0#define INDEX_DATA_REG 0x10
@@ -463,4 +463,4 @@ struct denali_nand_info { uint32_t max_banks; }; -#endif /*_LLD_NAND_*/ +#endif /* __DENALI_H__ */
drivers/mtd/nand/docg4.c +4 -2
@@ -717,7 +717,7 @@ static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand,return read_page (mtd, nand, buf, page,1 ); } -static void docg4_erase_block (struct mtd_info *mtd,int page) +static int docg4_erase_block (struct mtd_info *mtd,int page) {struct nand_chip *nand = mtd->priv;struct docg4_priv *doc = nand->priv;
@@ -760,6 +760,8 @@ static void docg4_erase_block(struct mtd_info *mtd, int page)write_nop (docptr);poll_status (docptr);write_nop (docptr); + +return nand->waitfunc (mtd, nand); }static int read_factory_bbt (struct mtd_info *mtd)
@@ -972,7 +974,7 @@ int docg4_nand_init(struct mtd_info *mtd, struct nand_chip *nand, int devnum) nand->read_buf = docg4_read_buf; nand->write_buf = docg4_write_buf16; nand->scan_bbt = nand_default_bbt; - nand->erase_cmd = docg4_erase_block; + nand->erase = docg4_erase_block; nand->ecc.read_page = docg4_read_page; nand->ecc.write_page = docg4_write_page; nand->ecc.read_page_raw = docg4_read_page_raw;
drivers/mtd/nand/fsl_elbc_nand.c +14 -0
@@ -621,6 +621,19 @@ static int fsl_elbc_write_page(struct mtd_info *mtd, struct nand_chip *chip,static struct fsl_elbc_ctrl *elbc_ctrl; +/* ECC will be calculated automatically, and errors will be detected in +* waitfunc. +*/ +static int fsl_elbc_write_subpage (struct mtd_info *mtd,struct nand_chip *chip, +uint32_t offset,uint32_t data_len, +const uint8_t *buf,int oob_required) +{ +fsl_elbc_write_buf (mtd, buf, mtd->writesize); +fsl_elbc_write_buf (mtd, chip->oob_poi, mtd->oobsize); + +return 0 ; +} +static void fsl_elbc_ctrl_init (void ) { elbc_ctrl =kzalloc (sizeof (*elbc_ctrl),GFP_KERNEL );
@@ -710,6 +723,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr) nand->ecc.read_page = fsl_elbc_read_page; nand->ecc.write_page = fsl_elbc_write_page; + nand->ecc.write_subpage = fsl_elbc_write_subpage; priv->fmr = (15 <<FMR_CWTO_SHIFT ) | (2 <<FMR_AL_SHIFT );
drivers/mtd/nand/fsl_ifc_nand.c +22 -11
@@ -47,7 +47,7 @@ struct fsl_ifc_ctrl {/* device info */ struct fsl_ifc regs; -uint8_t __iomem *addr;/* Address of assigned IFC buffer */ +void __iomem *addr;/* Address of assigned IFC buffer */ unsigned int cs_nand;/* On which chipsel NAND is connected */ unsigned int page;/* Last page written to / read from */ unsigned int read_bytes;/* Number of bytes read during command */
@@ -577,8 +577,15 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,fsl_ifc_run_command (mtd); -/* Chip sometimes reporting write protect even when it's not */ -out_8 (ctrl->addr,in_8 (ctrl->addr) |NAND_STATUS_WP ); +/* +* The chip always seems to report that it is +* write-protected, even when it is not. +*/ +if (chip->options &NAND_BUSWIDTH_16 ) +ifc_out16 (ctrl->addr, +ifc_in16 (ctrl->addr) |NAND_STATUS_WP ); +else +out_8 (ctrl->addr,in_8 (ctrl->addr) |NAND_STATUS_WP );return ;case NAND_CMD_RESET :
@@ -618,7 +625,7 @@ static void fsl_ifc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) len = bufsize - ctrl->index; } -memcpy_toio (&ctrl->addr[ctrl->index], buf, len); +memcpy_toio (ctrl->addr + ctrl->index, buf, len); ctrl->index += len; }
@@ -631,11 +638,16 @@ static u8 fsl_ifc_read_byte(struct mtd_info *mtd)struct nand_chip *chip = mtd->priv;struct fsl_ifc_mtd *priv = chip->priv;struct fsl_ifc_ctrl *ctrl = priv->ctrl; +unsigned int offset; -/* If there are still bytes in the IFC buffer, then use the -* next byte. */ -if (ctrl->index < ctrl->read_bytes) -return in_8 (&ctrl->addr[ctrl->index++]); +/* +* If there are still bytes in the IFC buffer, then use the +* next byte. +*/ +if (ctrl->index < ctrl->read_bytes) { + offset = ctrl->index++; +return in_8 (ctrl->addr + offset); + }printf ("%s beyond end of buffer\n" , __func__);return ERR_BYTE ;
@@ -657,8 +669,7 @@ static uint8_t fsl_ifc_read_byte16(struct mtd_info *mtd)* next byte. */ if (ctrl->index < ctrl->read_bytes) { - data =ifc_in16 ((uint16_t *)&ctrl-> - addr[ctrl->index]); + data =ifc_in16 (ctrl->addr + ctrl->index); ctrl->index +=2 ;return (uint8_t )data; }
@@ -681,7 +692,7 @@ static void fsl_ifc_read_buf(struct mtd_info *mtd, u8 *buf, int len)return ; avail =min ((unsigned int )len, ctrl->read_bytes - ctrl->index); -memcpy_fromio (buf, &ctrl->addr[ctrl->index], avail); +memcpy_fromio (buf, ctrl->addr + ctrl->index, avail); ctrl->index += avail;if (len > avail)
drivers/mtd/nand/nand_base.c +137 -67
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drivers/mtd/nand/nand_bbt.c +16 -15
@@ -199,12 +199,12 @@ static int read_bbt(struct mtd_info *mtd, uint8_t *buf, int page, int num, res =mtd_read (mtd, from, len, &retlen, buf);if (res <0 ) {if (mtd_is_eccerr (res)) { -pr_info ("nand_bbt: ECC error in BBT@" -"0x%012llx\n" , from & ~mtd->writesize); +pr_info ("nand_bbt: ECC error in BBT at 0x%012llx\n" , + from & ~mtd->writesize);return res; }else if (mtd_is_bitflip (res)) { -pr_info ("nand_bbt: corrected error in BBT at " -"0x%012llx\n" , from & ~mtd->writesize); +pr_info ("nand_bbt: corrected error in BBT at 0x%012llx\n" , + from & ~mtd->writesize); ret = res; }else {pr_info ("nand_bbt: error reading BBT\n" );
@@ -578,8 +578,8 @@ static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descrif (td->pages[i] ==-1 )pr_warn ("Bad block table not found for chip %d\n" , i);else -pr_info ("Bad block table found at page %d, version " -"0x%02X\n" , td->pages[i], td->version[i]); +pr_info ("Bad block table found at page %d, version 0x%02X\n" , + td->pages[i], td->version[i]); }return 0 ; }
@@ -723,12 +723,10 @@ static int write_bbt(struct mtd_info *mtd, uint8_t *buf, res =mtd_read (mtd, to, len, &retlen, buf);if (res <0 ) {if (retlen != len) { -pr_info ("nand_bbt: error reading block " -"for writing the bad block table\n" ); +pr_info ("nand_bbt: error reading block for writing the bad block table\n" );return res; } -pr_warn ("nand_bbt: ECC error while reading " -"block for writing bad block table\n" ); +pr_warn ("nand_bbt: ECC error while reading block for writing bad block table\n" ); }/* Read oob data */ ops.ooblen = (len >> this->page_shift) * mtd->oobsize;
@@ -1280,6 +1278,7 @@ static int nand_create_badblock_pattern(struct nand_chip *this)int nand_default_bbt (struct mtd_info *mtd) {struct nand_chip *this = mtd->priv; +int ret;/* Is a flash based bad block table requested? */ if (this->bbt_options &NAND_BBT_USE_FLASH ) {
@@ -1298,8 +1297,11 @@ int nand_default_bbt(struct mtd_info *mtd) this->bbt_md =NULL ; } -if (!this->badblock_pattern) -nand_create_badblock_pattern (this); +if (!this->badblock_pattern) { + ret =nand_create_badblock_pattern (this); +if (ret) +return ret; + }return nand_scan_bbt (mtd, this->badblock_pattern); }
@@ -1332,9 +1334,8 @@ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) block = (int )(offs >> this->bbt_erase_shift); res =bbt_get_entry (this, block); -pr_debug ("nand_isbad_bbt(): bbt info for offs 0x%08x: " -"(block %d) 0x%02x\n" , - (unsigned int )offs, block, res); +pr_debug ("nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n" , + (unsigned int )offs, block, res);switch (res) {case BBT_BLOCK_GOOD :
drivers/mtd/nand/nand_ids.c +5 -0
@@ -56,6 +56,10 @@ struct nand_flash_dev nand_flash_ids[] = { {"SDTNRGAMA 64G 3.3V 8-bit" , { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} }, SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) }, + {"H27UCG8T2ATR-BC 64G 3.3V 8-bit" , + { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, +SZ_8K ,SZ_8K ,SZ_2M ,0 ,6 ,640 ,NAND_ECC_INFO (40 ,SZ_1K ), + 4 },LEGACY_ID_NAND ("NAND 4MiB 5V 8-bit" ,0x6B ,4 ,SZ_8K ,SP_OPTIONS ), LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
@@ -184,6 +188,7 @@ struct nand_manufacturers nand_manuf_ids[] = { {NAND_MFR_EON, "Eon"}, {NAND_MFR_SANDISK, "SanDisk"}, {NAND_MFR_INTEL, "Intel"}, + {NAND_MFR_ATO, "ATO"}, {0x0, "Unknown"} };
drivers/mtd/nand/nand_timings.c new file +252 -0
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include/fsl_ifc.h +2 -0
@@ -19,10 +19,12 @@#define ifc_in32 (a) in_le32(a)#define ifc_out32 (a, v) out_le32(a, v)#define ifc_in16 (a) in_le16(a) +#define ifc_out16 (a, v) out_le16(a, v)#elif defined(CONFIG_SYS_FSL_IFC_BE )#define ifc_in32 (a) in_be32(a)#define ifc_out32 (a, v) out_be32(a, v)#define ifc_in16 (a) in_be16(a) +#define ifc_out16 (a, v) out_be16(a, v)#else #error Neither CONFIG_SYS_FSL_IFC_LE nor CONFIG_SYS_FSL_IFC_BE is defined#endif
include/linux/mtd/nand.h +82 -5
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Signature · 1 line
2.1.4
cover nand: Sync with Linux v4.1
In reply to Scott WoodHi Scott,
Quoted 27 lines · Scott Wood
As requested, these patches can be found in the sync-4.1 branch of u-boot-nand-flash.git.
Ezequiel Garcia (1):
mtd: Introducemtd_block_isreserved()Scott Wood (2):
nand: Remove__UBOOT__ifdefs
nand: Sync with Linux v4.1drivers/mtd/mtdcore.c | 14 +- drivers/mtd/mtdpart.c | 9 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/atmel_nand_ecc.h | 3 + drivers/mtd/nand/denali.c | 209 +++++++------ drivers/mtd/nand/denali.h | 8 +- drivers/mtd/nand/docg4.c | 6 +- drivers/mtd/nand/fsl_elbc_nand.c | 14 + drivers/mtd/nand/fsl_ifc_nand.c | 33 +- drivers/mtd/nand/nand_base.c | 615 ++++++++++---------------------------- drivers/mtd/nand/nand_bbt.c | 75 ++--- drivers/mtd/nand/nand_ids.c | 10 +- drivers/mtd/nand/nand_timings.c | 252 ++++++++++++++++ include/fsl_ifc.h | 2 + include/linux/mtd/mtd.h | 2 + include/linux/mtd/nand.h | 122 +++++--- 16 files changed, 715 insertions(+), 660 deletions(-)
Quoted 1 line
create mode 100644
drivers/mtd/nand/nand_timings.c
I've used these patches while porting the pxa3xx_nand driver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:
Thanks,
Stefan
cover nand: Sync with Linux v4.1
Hi Scott,
Quoted 31 lines · Stefan Roese
Quoted 28 lines · Scott Wood
As requested, these patches can be found in the sync-4.1 branch of u-boot-nand-flash.git.
Ezequiel Garcia (1):
mtd: Introducemtd_block_isreserved()Scott Wood (2):
nand: Remove__UBOOT__ifdefs
nand: Sync with Linux v4.1drivers/mtd/mtdcore.c | 14 +- drivers/mtd/mtdpart.c | 9 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/atmel_nand_ecc.h | 3 + drivers/mtd/nand/denali.c | 209 +++++++------ drivers/mtd/nand/denali.h | 8 +- drivers/mtd/nand/docg4.c | 6 +- drivers/mtd/nand/fsl_elbc_nand.c | 14 + drivers/mtd/nand/fsl_ifc_nand.c | 33 +- drivers/mtd/nand/nand_base.c | 615 ++++++++++---------------------------- drivers/mtd/nand/nand_bbt.c | 75 ++--- drivers/mtd/nand/nand_ids.c | 10 +- drivers/mtd/nand/nand_timings.c | 252 ++++++++++++++++ include/fsl_ifc.h | 2 + include/linux/mtd/mtd.h | 2 + include/linux/mtd/nand.h | 122 +++++--- 16 files changed, 715 insertions(+), 660 deletions(-)Quoted 1 line
create mode 100644
drivers/mtd/nand/nand_timings.c
Quoted 5 lines
I've used these patches while porting the
pxa3xx_nanddriver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:Tested-by Stefan Roese <[email protected]>
What are plans for this patch series? Do you plan to send a pull request soon? Could you perhaps add my patch with the pxa3xx NAND support [1] as well?
Thanks,
Stefan
cover nand: Sync with Linux v4.1
Quoted 34 lines · Stefan Roese
Hi Scott,
Quoted 31 lines · Stefan Roese
Quoted 29 lines · Scott Wood
As requested, these patches can be found in the sync-4.1 branch of u-boot-nand-flash.git.
Ezequiel Garcia (1):
mtd: Introducemtd_block_isreserved()Scott Wood (2):
nand: Remove__UBOOT__ifdefs
nand: Sync with Linux v4.1drivers/mtd/mtdcore.c | 14 +- drivers/mtd/mtdpart.c | 9 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/atmel_nand_ecc.h | 3 + drivers/mtd/nand/denali.c | 209 +++++++------ drivers/mtd/nand/denali.h | 8 +- drivers/mtd/nand/docg4.c | 6 +- drivers/mtd/nand/fsl_elbc_nand.c | 14 + drivers/mtd/nand/fsl_ifc_nand.c | 33 +- drivers/mtd/nand/nand_base.c | 615 ++++++++++---------------------------- drivers/mtd/nand/nand_bbt.c | 75 ++--- drivers/mtd/nand/nand_ids.c | 10 +- drivers/mtd/nand/nand_timings.c | 252 ++++++++++++++++ include/fsl_ifc.h | 2 + include/linux/mtd/mtd.h | 2 + include/linux/mtd/nand.h | 122 +++++--- 16 files changed, 715 insertions(+), 660 deletions(-)create mode 100644
drivers/mtd/nand/nand_timings.c
Quoted 8 lines
Quoted 5 lines
I've used these patches while porting the
pxa3xx_nanddriver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:Tested-by Stefan Roese <[email protected]>What are plans for this patch series? Do you plan to send a pull request soon?
The "merge" window (which for U-Boot is really a patch submission window) is still open according to the IRC channel topic. I do plan to submit a pull request not too long after it closes.
Meanwhile, Linux's merge window is an actual merge deadline, so most of my focus will be there for the moment.
Quoted 2 lines
Could you perhaps add my patch with the pxa3xx NAND support [1] as
well?
It's patch 6/10 -- you want me to pick it independently of the rest?
-Scott
cover nand: Sync with Linux v4.1
Quoted 5 lines · Scott Wood
Quoted 4 lines · Stefan Roese
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I've used these patches while porting the
pxa3xx_nanddriver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:
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Tested-by Stefan Roese <[email protected]>What are plans for this patch series? Do you plan to send a pull request soon?
The "merge" window (which for U-Boot is really a patch submission window) is still open according to the IRC channel topic. I do plan to submit a pull request not too long after it closes.
The merge window has actually been closed by Tom a few days ago:
https://www.mail-archive.com/u-boot at lists.denx.de/msg180049.html
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Meanwhile, Linux's merge window is an actual merge deadline, so most of my focus will be there for the moment.
Understood.
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Could you perhaps add my patch with the pxa3xx NAND support [1] as
well?It's patch 6/10 -- you want me to pick it independently of the rest?
Yes please. Since it depends on the new Linux NAND driverf sync from you.
Thanks,
Stefan
cover nand: Sync with Linux v4.1
Quoted 11 lines · Stefan Roese
Quoted 10 lines · Scott Wood
Quoted 8 lines · Stefan Roese
Quoted 5 lines
I've used these patches while porting the
pxa3xx_nanddriver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:Tested-by Stefan Roese <[email protected]>What are plans for this patch series? Do you plan to send a pull request soon?
Quoted 7 lines
Quoted 3 lines
The "merge" window (which for U-Boot is really a patch submission window) is still open according to the IRC channel topic. I do plan to submit a pull request not too long after it closes.
The merge window has actually been closed by Tom a few days ago:
https://www.mail-archive.com/u-boot at lists.denx.de/msg180049.html
And I'm bad about updating the IRC topic too, sorry.
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Quoted 2 lines
Meanwhile, Linux's merge window is an actual merge deadline, so most of my focus will be there for the moment.
Understood.
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Quoted 2 lines
Could you perhaps add my patch with the pxa3xx NAND support [1] as
well?It's patch 6/10 -- you want me to pick it independently of the rest?
Yes please. Since it depends on the new Linux NAND driverf sync from you.
So, how are things looking? Thanks!
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cover nand: Sync with Linux v4.1
Quoted 30 lines · Tom Rini
Quoted 11 lines · Stefan Roese
Quoted 10 lines · Scott Wood
Quoted 8 lines · Stefan Roese
Quoted 5 lines
I've used these patches while porting the
pxa3xx_nanddriver for the Marvell Armada XP / 38x SoC's to current U-Boot. And have found no issues so far. So:Tested-by Stefan Roese <[email protected]>What are plans for this patch series? Do you plan to send a pull request soon?
Quoted 7 lines
Quoted 3 lines
The "merge" window (which for U-Boot is really a patch submission window) is still open according to the IRC channel topic. I do plan to submit a pull request not too long after it closes.
The merge window has actually been closed by Tom a few days ago:
https://www.mail-archive.com/u-boot at lists.denx.de/msg180049.html
And I'm bad about updating the IRC topic too, sorry.
Quoted 8 lines
Quoted 2 lines
Meanwhile, Linux's merge window is an actual merge deadline, so most of my focus will be there for the moment.
Understood.
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Quoted 2 lines
Could you perhaps add my patch with the pxa3xx NAND support [1] as
well?
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Quoted 4 lines
Quoted 1 line
It's patch 6/10 -- you want me to pick it independently of the rest?
Yes please. Since it depends on the new Linux NAND driverf sync from you.
So, how are things looking? Thanks!
I hope to send a pull request next week (I'm at a conference this week).
-Scott