ARM: BCM5301X: activate some additional options in pl310 cache controller

In the default Broadcom SDK the shared override is activated for this cache controller, do the same in the upstream code. Data and instruction prefetching is not activated by default for this cache controller on the bcm53xx SoC, do it manually like it is done in the vendor SDK.

---
 arch/arm/boot/dts/bcm5301x.dtsi | 3 +++
 1 file changed, 3 insertions(+)

index 21fefd4..0bae982 100644
@@ -78,6 +78,9 @@
 			compatible = "arm,pl310-cache";
 			reg = <0x2000 0x1000>;
 			cache-unified;
+			arm,shared-override;
+			prefetch-data = <1>;
+			prefetch-instr = <1>;
 			cache-level = <2>;
 		};
 	};

2.1.4

From: Felix Fietkau <[email protected]>

---
 arch/arm/boot/dts/bcm5301x.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

index 0bae982..6f50f67 100644
@@ -85,6 +85,13 @@
 		};
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupts =
+			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	clocks {
 		#address-cells = <1>;
 		#size-cells = <0>;

2.1.4

Applied to devicetree/next, thanks!

Florian

Applied to devicetree/next, thanks!

Florian