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ARM: dts: add bcm2835-pwm bindings

PATCH Applied Bart Tanghe 3 participants 3 messages Jan 15, 2015 – Jul 31, 2015

Subsystems (3)
Device tree bindings Broadcom BCM2711/BCM2835 Arm architecture Broadcom BCM281XX/BCM11XXX/BCM216XX Arm architecture
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Bart Tanghe

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#0 lore raw

PATCH v4 1/1 ARM: dts: add bcm2835-pwm bindings

To probe the bcm2835-pwm driver properly, this dts bindings has to be added to the bcm2835 dtsi file.
In expectation of a bcm2835 clock driver, I've added fixed-clock clock binding.
---
Changes in v4:
- node added by reg value

Signed-off-by Bart Tanghe <[email protected]>
Acked-by Stephen Warren <[email protected]>
arch/arm/boot/dts/bcm2835.dtsi +16 -0
index 3342cb1..e8a0f13 100644
@@ -122,6 +123,14 @@
 			status = "disabled";
 		};
 
+                pwm: pwm at 7e20c000 {
+                        compatible = "brcm,bcm2835-pwm";
+                        reg = <0x7e20c000 0x28>;
+                        clocks = <&clk_pwm>;
+                        #pwm-cells = <2>;
+                        status = "disabled";
+                };
+
 		sdhci: sdhci at 7e300000 {
 			compatible = "brcm,bcm2835-sdhci";
 			reg = <0x7e300000 0x100>;

@@ -179,5 +188,13 @@
 			clock-output-names = "spi";
 			clock-frequency = <250000000>;
 		};
+
+		clk_pwm: clock at 3 {
+			compatible = "fixed-clock";
+			reg = <3>;
+			#clock-cells = <0>;
+			clock-output-names = "pwm";
+			clock-frequency = <9200000>;
+		};
 	};
 };
Applied
#1 lore raw
Quoted 9 lines · Bart Tanghe

To probe the bcm2835-pwm driver properly, this dts bindings has to be added to the bcm2835 dtsi file.
In expectation of a bcm2835 clock driver, I've added fixed-clock clock binding.
---
Changes in v4:
- node added by reg value

Signed-off-by Bart Tanghe <[email protected]>
Acked-by Stephen Warren <[email protected]>

Applied, thanks.

Quoted 33 lines
arch/arm/boot/dts/bcm2835.dtsi +16 -0
index 3342cb1..e8a0f13 100644
@@ -122,6 +123,14 @@
 			status = "disabled";
 		};
 
+                pwm: pwm at 7e20c000 {
+                        compatible = "brcm,bcm2835-pwm";
+                        reg = <0x7e20c000 0x28>;
+                        clocks = <&clk_pwm>;
+                        #pwm-cells = <2>;
+                        status = "disabled";
+                };
+
 		sdhci: sdhci at 7e300000 {
 			compatible = "brcm,bcm2835-sdhci";
 			reg = <0x7e300000 0x100>;

@@ -179,5 +188,13 @@
 			clock-output-names = "spi";
 			clock-frequency = <250000000>;
 		};
+
+		clk_pwm: clock at 3 {
+			compatible = "fixed-clock";
+			reg = <3>;
+			#clock-cells = <0>;
+			clock-output-names = "pwm";
+			clock-frequency = <9200000>;
+		};
 	};
 };
Signature · 4 lines
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
#2 lore raw

PATCH v4 1/1 ARM: dts: add bcm2835-pwm bindings

Tried with latest rpi kernel from github, branch rpi-4.0.y on RaspberryPi A+ on pins 18 and 19

     pwm_pins: pwm {
         brcm,pins = <18 19>;
         brcm,function = <2 2>; /* alt5*/
     };

and pins 12, 13

     pwm_pins: pwm {
         brcm,pins = <12 13>;
         brcm,function = <4 4>; /* alt0*/
     };

different combinations for period/duty_cycle without any output.

(WiringPi library works on pins 18 and 12.)
Did something changed in recent kernels?
Thank you.

Quoted 46 lines · Lee Jones
Quoted 9 lines · Bart Tanghe

To probe the bcm2835-pwm driver properly, this dts bindings has to be added to the bcm2835 dtsi file.
In expectation of a bcm2835 clock driver, I've added fixed-clock clock binding.
---
Changes in v4:
- node added by reg value

Signed-off-by Bart Tanghe <[email protected]>
Acked-by Stephen Warren <[email protected]>

Applied, thanks.

Quoted 33 lines
arch/arm/boot/dts/bcm2835.dtsi +16 -0
index 3342cb1..e8a0f13 100644
@@ -122,6 +123,14 @@
  			status = "disabled";
  		};
 
+                pwm: pwm at 7e20c000 {
+                        compatible = "brcm,bcm2835-pwm";
+                        reg = <0x7e20c000 0x28>;
+                        clocks = <&clk_pwm>;
+                        #pwm-cells = <2>;
+                        status = "disabled";
+                };
+
  		sdhci: sdhci at 7e300000 {
  			compatible = "brcm,bcm2835-sdhci";
  			reg = <0x7e300000 0x100>;

@@ -179,5 +188,13 @@
  			clock-output-names = "spi";
  			clock-frequency = <250000000>;
  		};
+
+		clk_pwm: clock at 3 {
+			compatible = "fixed-clock";
+			reg = <3>;
+			#clock-cells = <0>;
+			clock-output-names = "pwm";
+			clock-frequency = <9200000>;
+		};
  	};
  };