drivers/ddr/fsl: Adjust bstopre value
PATCH 1/1 drivers/ddr/fsl: Adjust bstopre value
By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge.
Signed-off-by York Sun <[email protected]>
--- drivers/ddr/fsl/main.c | 2 +- drivers/ddr/fsl/options.c | 10 ++++++---- include/fsl_ddr.h | 2 +- 3 files changed, 8 insertions(+), 6 deletions(-)
drivers/ddr/fsl/main.c +1 -1
@@ -535,7 +535,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,* which is currently STEP_ASSIGN_ADDRESSES. */ populate_memctl_options ( - timing_params[i].all_dimms_registered, + &timing_params[i], &pinfo->memctl_opts[i], pinfo->dimm_params[i], i);/*
drivers/ddr/fsl/options.c +6 -4
@@ -499,7 +499,7 @@ static inline unsigned int auto_bank_intlv(dimm_params_t *pdimm)return 0 ; } -unsigned int populate_memctl_options (int all_dimms_registered, +unsigned int populate_memctl_options (const common_timing_params_t *common_dimm,memctl_options_t *popts,dimm_params_t *pdimm,unsigned int ctrl_num)
@@ -640,7 +640,7 @@ unsigned int populate_memctl_options(int all_dimms_registered, popts->ba_intlv_ctl =0 ;/* Memory Organization Parameters */ - popts->registered_dimm_en = all_dimms_registered; + popts->registered_dimm_en = common_dimm->all_dimms_registered;/* Operational Mode Paramters */
@@ -778,9 +778,11 @@ unsigned int populate_memctl_options(int all_dimms_registered,* Set this to 0 for global auto precharge * The value of 0x100 has been used for DDR1, DDR2, DDR3. * It is not wrong. Any value should be OK. The performance depends on -* applications. There is no one good value for all. +* applications. There is no one good value for all. One way to set +* is to use 1/4 of refint value. */ - popts->bstopre =0x100 ; + popts->bstopre =picos_to_mclk (ctrl_num, common_dimm->refresh_rate_ps) + >>2 ;/* * Window for four activates -- tFAW
include/fsl_ddr.h +1 -1
@@ -103,7 +103,7 @@ unsigned int compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms); -unsigned int populate_memctl_options (int all_dimms_registered, +unsigned int populate_memctl_options (const common_timing_params_t *common_dimm,memctl_options_t *popts,dimm_params_t *pdimm,unsigned int ctrl_num);
Signature · 1 line
1.7.9.5
PATCH 1/1 drivers/ddr/fsl: Adjust bstopre value
Quoted 7 lines · York Sun
By default the bstopre value has been set to
0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge.Signed-off-by York Sun <[email protected]>---
Applied to u-boot-fsl-qoriq master.
York