ARM: rockchip: rename osc_switch_to_32k variable
Subsystems (3)
Heiko Stübner
maintainerPATCH v3 1/3 ARM: rockchip: rename osc_switch_to_32k variable
The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remain running in some cases, which this var indicates.
So rename it to osc_disable to clarity.
--- arch/arm/mach-rockchip/pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-rockchip/pm.c +2 -2
@@ -96,7 +96,7 @@ static bool rk3288_slp_disable_osc(void)static void rk3288_slp_mode_set (int level) {u32 mode_set, mode_set1; -bool osc_switch_to_32k =rk3288_slp_disable_osc (); +bool osc_disable =rk3288_slp_disable_osc ();regmap_read (sgrf_regmap,RK3288_SGRF_CPU_CON0 , &rk3288_sgrf_cpu_con0);regmap_read (sgrf_regmap,RK3288_SGRF_SOC_CON0 , &rk3288_sgrf_soc_con0);
@@ -140,7 +140,7 @@ static void rk3288_slp_mode_set(int level)BIT (PMU_DDR1IO_RET_EN ) |BIT (PMU_DDR0IO_RET_EN ) |BIT (PMU_ALIVE_USE_LF ) |BIT (PMU_PLL_PD_EN ); -if (osc_switch_to_32k) +if (osc_disable) mode_set |=BIT (PMU_OSC_24M_DIS ); mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
Signature · 1 line
2.1.4
PATCH v3 1/3 ARM: rockchip: rename osc_switch_to_32k variable
Am Mittwoch, 5. August 2015, 00:50:39 schrieb Heiko St?bner:
Quoted 7 lines
The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remain running in some cases, which this var indicates.
So rename it to
osc_disableto clarity.Signed-off-by Heiko Stuebner <[email protected]>
applied all 3 patches with Chris' and Doug's tags to my soc branch
Heiko Stübner
maintainerPATCH v3 2/3 ARM: rockchip: set correct stabilization thresholds in suspend
In reply to Heiko StübnerCurrently the stabilization thresholds for the oscillator and external pmu are statically set to 30ms based on a 32kHz clock rate. This leaves out the case when we don't switch to the 32kHz clock when only entering the shallow suspend mode where the logic keeps running.
So, set the correct threshold after we have determined if we switch to the 32kHz clock or stay with the 24MHz one. Also set the oscillator- stabilization to 0 if it is kept running during suspend, as it of course does not need to stabilize then.
---
changes since v2:
- describe 32kHz vs 24MHz
- don't wait for oscillator stabilization if it's still running, as explained by Chris Zhong in v2
changes since v1:
- 24MHz oriented threshold is only needed in shallow suspend, the deep suspend always switches to 32kHz and only leaves the 24MHz oscillator running if needed for stuff like usb wakeup
arch/arm/mach-rockchip/pm.c | 22 +++++++++++++++++++--- arch/arm/mach-rockchip/pm.h | 4 ---- 2 files changed, 19 insertions(+), 7 deletions(-)
arch/arm/mach-rockchip/pm.c +19 -3
@@ -145,6 +145,19 @@ static void rk3288_slp_mode_set(int level) mode_set1 |=BIT (PMU_CLR_ALIVE ) |BIT (PMU_CLR_BUS ) |BIT (PMU_CLR_PERI ) |BIT (PMU_CLR_DMA ); + +/* +* In deep suspend we use PMU_PMU_USE_LF to let the rk3288 +* switch its main clock supply to the alternative 32kHz +* source. Therefore set 30ms on a 32kHz clock for pmic +* stabilization. Similar 30ms on 24MHz for the other +* mode below. +*/ +regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,32 *30 ); + +/* only wait for stabilization, if we turned the osc off */ +regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT , + osc_disable ?32 *30 :0 ); }else {/* * arm off, logic normal
@@ -152,6 +165,12 @@ static void rk3288_slp_mode_set(int level)* wakeup will be error */ mode_set |=BIT (PMU_CLK_CORE_SRC_GATE_EN ); + +/* 30ms on a 24MHz clock for pmic stabilization */ +regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,24000 *30 ); + +/* oscillator is still running, so no need to wait */ +regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT ,0 ); }regmap_write (pmu_regmap,RK3288_PMU_PWRMODE_CON , mode_set);
@@ -262,9 +281,6 @@ static int rk3288_suspend_init(struct device_node *np)memcpy (rk3288_bootram_base, rockchip_slp_cpu_resume, rk3288_bootram_sz); -regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT ,OSC_STABL_CNT_THRESH ); -regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,PMU_STABL_CNT_THRESH ); -return 0 ; }
arch/arm/mach-rockchip/pm.h +0 -4
@@ -62,10 +62,6 @@ static inline void rockchip_suspend_init(void)/* PMU_WAKEUP_CFG1 bits */ #define PMU_ARMINT_WAKEUP_EN BIT(0) -/* wait 30ms for OSC stable and 30ms for pmic stable */ -#define OSC_STABL_CNT_THRESH (32 * 30) -#define PMU_STABL_CNT_THRESH (32 * 30) -enum rk3288_pwr_mode_con {PMU_PWR_MODE_EN =0 ,PMU_CLK_CORE_SRC_GATE_EN ,
Signature · 1 line
2.1.4
PATCH v3 2/3 ARM: rockchip: set correct stabilization thresholds in suspend
Quoted 78 lines · Heiko St?bner
Currently the stabilization thresholds for the oscillator and external pmu are statically set to 30ms based on a 32kHz clock rate. This leaves out the case when we don't switch to the 32kHz clock when only entering the shallow suspend mode where the logic keeps running.
So, set the correct threshold after we have determined if we switch to the 32kHz clock or stay with the 24MHz one. Also set the oscillator- stabilization to 0 if it is kept running during suspend, as it of course does not need to stabilize then.
Reported-by Chris Zhong <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>---
changes since v2:
- describe 32kHz vs 24MHz
- don't wait for oscillator stabilization if it's still running, as explained by Chris Zhong in v2
changes since v1:
- 24MHz oriented threshold is only needed in shallow suspend, the deep suspend always switches to 32kHz and only leaves the 24MHz oscillator running if needed for stuff like usb wakeuparch/arm/mach-rockchip/pm.c | 22 +++++++++++++++++++--- arch/arm/mach-rockchip/pm.h | 4 ---- 2 files changed, 19 insertions(+), 7 deletions(-)arch/arm/mach-rockchip/pm.c +19
-3@@ -145,6 +145,19 @@ static void rk3288_slp_mode_set(int level) mode_set1 |=BIT (PMU_CLR_ALIVE ) |BIT (PMU_CLR_BUS ) |BIT (PMU_CLR_PERI ) |BIT (PMU_CLR_DMA ); + +/* +* In deep suspend we use PMU_PMU_USE_LF to let the rk3288 +* switch its main clock supply to the alternative 32kHz +* source. Therefore set 30ms on a 32kHz clock for pmic +* stabilization. Similar 30ms on 24MHz for the other +* mode below. +*/ +regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,32 *30 ); + +/* only wait for stabilization, if we turned the osc off */ +regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT , + osc_disable ?32 *30 :0 ); }else {/* * arm off, logic normal @@ -152,6 +165,12 @@ static void rk3288_slp_mode_set(int level)* wakeup will be error */ mode_set |=BIT (PMU_CLK_CORE_SRC_GATE_EN ); + +/* 30ms on a 24MHz clock for pmic stabilization */ +regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,24000 *30 ); + +/* oscillator is still running, so no need to wait */ +regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT ,0 ); }regmap_write (pmu_regmap,RK3288_PMU_PWRMODE_CON , mode_set);@@ -262,9 +281,6 @@ static int rk3288_suspend_init(struct device_node *np)memcpy (rk3288_bootram_base, rockchip_slp_cpu_resume, rk3288_bootram_sz); -regmap_write (pmu_regmap,RK3288_PMU_OSC_CNT ,OSC_STABL_CNT_THRESH ); -regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,PMU_STABL_CNT_THRESH ); -return 0 ; }arch/arm/mach-rockchip/pm.h +0
-0
arch/arm/mach-rockchip/pm.h static inline void rockchip_suspend_init(void) · line 67
Quoted 10 lines
arch/arm/mach-rockchip/pm.h +0
-4@@ -62,10 +62,6 @@ static inline void rockchip_suspend_init(void)/* PMU_WAKEUP_CFG1 bits */ #define PMU_ARMINT_WAKEUP_EN BIT(0) -/* wait 30ms for OSC stable and 30ms for pmic stable */ -#define OSC_STABL_CNT_THRESH (32 * 30) -#define PMU_STABL_CNT_THRESH (32 * 30) -enum rk3288_pwr_mode_con {PMU_PWR_MODE_EN =0 ,PMU_CLK_CORE_SRC_GATE_EN ,
PATCH v3 2/3 ARM: rockchip: set correct stabilization thresholds in suspend
In reply to Heiko StübnerHeiko,
Quoted 33 lines · Heiko St?bner
Currently the stabilization thresholds for the oscillator and external pmu are statically set to 30ms based on a 32kHz clock rate. This leaves out the case when we don't switch to the 32kHz clock when only entering the shallow suspend mode where the logic keeps running.
So, set the correct threshold after we have determined if we switch to the 32kHz clock or stay with the 24MHz one. Also set the oscillator- stabilization to 0 if it is kept running during suspend, as it of course does not need to stabilize then.
Reported-by Chris Zhong <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>---
changes since v2:
- describe 32kHz vs 24MHz
- don't wait for oscillator stabilization if it's still running, as explained by Chris Zhong in v2
changes since v1:
- 24MHz oriented threshold is only needed in shallow suspend, the deep suspend always switches to 32kHz and only leaves the 24MHz oscillator running if needed for stuff like usb wakeuparch/arm/mach-rockchip/pm.c | 22 +++++++++++++++++++--- arch/arm/mach-rockchip/pm.h | 4 ---- 2 files changed, 19 insertions(+), 7 deletions(-)arch/arm/mach-rockchip/pm.c +0
-0@@ -145,6 +145,19 @@ static void rk3288_slp_mode_set(int level) mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
arch/arm/mach-rockchip/pm.c static void rk3288_slp_mode_set(int level) · line 156
Quoted 10 lines
arch/arm/mach-rockchip/pm.c +9
-0BIT (PMU_CLR_PERI ) |BIT (PMU_CLR_DMA ); + +/* +* In deep suspend we use PMU_PMU_USE_LF to let the rk3288 +* switch its main clock supply to the alternative 32kHz +* source. Therefore set 30ms on a 32kHz clock for pmic +* stabilization. Similar 30ms on 24MHz for the other +* mode below. +*/ +regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,32 *30 );
Took me a little while to parse the comment, but it looks right. Basically we need 30ms for PMIC stabilization both here and in the other mode. That is programmed as 32 * 30 here and 2400 * 30 there. ...and we know we're on 32k clock because of PMU_PMU_USE_LF.
PATCH v3 1/3 ARM: rockchip: rename osc_switch_to_32k variable
In reply to Heiko StübnerQuoted 25 lines · Heiko St?bner
The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remain running in some cases, which this var indicates.
So rename it to
osc_disableto clarity.Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-rockchip/pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)arch/arm/mach-rockchip/pm.c +1
-1@@ -96,7 +96,7 @@ static bool rk3288_slp_disable_osc(void)static void rk3288_slp_mode_set (int level) {u32 mode_set, mode_set1; -bool osc_switch_to_32k =rk3288_slp_disable_osc (); +bool osc_disable =rk3288_slp_disable_osc ();regmap_read (sgrf_regmap,RK3288_SGRF_CPU_CON0 , &rk3288_sgrf_cpu_con0);regmap_read (sgrf_regmap,RK3288_SGRF_SOC_CON0 , &rk3288_sgrf_soc_con0);
arch/arm/mach-rockchip/pm.c static void rk3288_slp_mode_set(int level) · line 146
Quoted 8 lines
arch/arm/mach-rockchip/pm.c +1
-1@@ -140,7 +140,7 @@ static void rk3288_slp_mode_set(int level)BIT (PMU_DDR1IO_RET_EN ) |BIT (PMU_DDR0IO_RET_EN ) |BIT (PMU_ALIVE_USE_LF ) |BIT (PMU_PLL_PD_EN ); -if (osc_switch_to_32k) +if (osc_disable) mode_set |=BIT (PMU_OSC_24M_DIS ); mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
PATCH v3 1/3 ARM: rockchip: rename osc_switch_to_32k variable
In reply to Heiko StübnerHeiko,
Quoted 10 lines · Heiko St?bner
The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remain running in some cases, which this var indicates.
So rename it to
osc_disableto clarity.Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-rockchip/pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Heiko Stübner
maintainerPATCH v3 3/3 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
In reply to Heiko StübnerPMU_GPIOINT_WAKEUP_EN seems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend.
--- arch/arm/mach-rockchip/pm.c | 9 ++++++--- arch/arm/mach-rockchip/pm.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-)
arch/arm/mach-rockchip/pm.c +6 -3
@@ -123,9 +123,6 @@ static void rk3288_slp_mode_set(int level)regmap_write (sgrf_regmap,RK3288_SGRF_FAST_BOOT_ADDR , rk3288_bootram_phy); -regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , -PMU_ARMINT_WAKEUP_EN ); - mode_set =BIT (PMU_GLOBAL_INT_DISABLE ) |BIT (PMU_L2FLUSH_EN ) |BIT (PMU_SREF0_ENTER_EN ) |BIT (PMU_SREF1_ENTER_EN ) | BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |
@@ -146,6 +143,9 @@ static void rk3288_slp_mode_set(int level) mode_set1 |=BIT (PMU_CLR_ALIVE ) |BIT (PMU_CLR_BUS ) |BIT (PMU_CLR_PERI ) |BIT (PMU_CLR_DMA ); +regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , +PMU_ARMINT_WAKEUP_EN ); +/* * In deep suspend we use PMU_PMU_USE_LF to let the rk3288 * switch its main clock supply to the alternative 32kHz
@@ -166,6 +166,9 @@ static void rk3288_slp_mode_set(int level)*/ mode_set |=BIT (PMU_CLK_CORE_SRC_GATE_EN ); +regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , +PMU_ARMINT_WAKEUP_EN |PMU_GPIOINT_WAKEUP_EN ); +/* 30ms on a 24MHz clock for pmic stabilization */ regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,24000 *30 );
arch/arm/mach-rockchip/pm.h +1 -0
@@ -61,6 +61,7 @@ static inline void rockchip_suspend_init(void)/* PMU_WAKEUP_CFG1 bits */ #define PMU_ARMINT_WAKEUP_EN BIT(0) +#define PMU_GPIOINT_WAKEUP_EN BIT(3)enum rk3288_pwr_mode_con {PMU_PWR_MODE_EN =0 ,
Signature · 1 line
2.1.4
PATCH v3 3/3 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
Quoted 53 lines · Heiko St?bner
PMU_GPIOINT_WAKEUP_ENseems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend.Reported-by Chris Zhong <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-rockchip/pm.c | 9 ++++++--- arch/arm/mach-rockchip/pm.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-)arch/arm/mach-rockchip/pm.c +6
-3@@ -123,9 +123,6 @@ static void rk3288_slp_mode_set(int level)regmap_write (sgrf_regmap,RK3288_SGRF_FAST_BOOT_ADDR , rk3288_bootram_phy); -regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , -PMU_ARMINT_WAKEUP_EN ); - mode_set =BIT (PMU_GLOBAL_INT_DISABLE ) |BIT (PMU_L2FLUSH_EN ) |BIT (PMU_SREF0_ENTER_EN ) |BIT (PMU_SREF1_ENTER_EN ) | BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |@@ -146,6 +143,9 @@ static void rk3288_slp_mode_set(int level) mode_set1 |=BIT (PMU_CLR_ALIVE ) |BIT (PMU_CLR_BUS ) |BIT (PMU_CLR_PERI ) |BIT (PMU_CLR_DMA ); +regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , +PMU_ARMINT_WAKEUP_EN ); +/* * In deep suspend we use PMU_PMU_USE_LF to let the rk3288 * switch its main clock supply to the alternative 32kHz @@ -166,6 +166,9 @@ static void rk3288_slp_mode_set(int level)*/ mode_set |=BIT (PMU_CLK_CORE_SRC_GATE_EN ); +regmap_write (pmu_regmap,RK3288_PMU_WAKEUP_CFG1 , +PMU_ARMINT_WAKEUP_EN |PMU_GPIOINT_WAKEUP_EN ); +/* 30ms on a 24MHz clock for pmic stabilization */ regmap_write (pmu_regmap,RK3288_PMU_STABL_CNT ,24000 *30 );arch/arm/mach-rockchip/pm.h +0
-0
arch/arm/mach-rockchip/pm.h static inline void rockchip_suspend_init(void) · line 67
Quoted 7 lines
arch/arm/mach-rockchip/pm.h +1
-0@@ -61,6 +61,7 @@ static inline void rockchip_suspend_init(void)/* PMU_WAKEUP_CFG1 bits */ #define PMU_ARMINT_WAKEUP_EN BIT(0) +#define PMU_GPIOINT_WAKEUP_EN BIT(3)enum rk3288_pwr_mode_con {PMU_PWR_MODE_EN =0 ,
PATCH v3 3/3 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
In reply to Heiko StübnerHeiko,
Quoted 6 lines · Heiko St?bner
PMU_GPIOINT_WAKEUP_ENseems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend.
Quoted 6 lines
Reported-by Chris Zhong <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-rockchip/pm.c | 9 ++++++--- arch/arm/mach-rockchip/pm.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-)
Very odd, but OK by me... Hopefully we'll eventually end up being able to use deep suspend on mainline. That'd be nice, wouldn't it?
Heiko Stübner
maintainerPATCH v3 3/3 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
Am Mittwoch, 5. August 2015, 18:55:52 schrieb Doug Anderson:
Quoted 13 lines
Heiko,
Quoted 10 lines · Heiko St?bner
PMU_GPIOINT_WAKEUP_ENseems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend.Reported-by Chris Zhong <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>---
Quoted 5 lines
Quoted 3 lines
arch/arm/mach-rockchip/pm.c | 9 ++++++--- arch/arm/mach-rockchip/pm.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-)Very odd, but OK by me...
Hopefully we'll get an explaination from the ic-people soon-ish.
Quoted 2 lines
Hopefully we'll eventually end up being
able to use deep suspend on mainline. That'd be nice, wouldn't it?
hehe ... yep, one of the big remaining projects :-)