dm: exynos: Driver model improvements leading to spring support

index e1ea428..6c5990f 100644
@@ -57,22 +57,30 @@ static int video_bridge_pre_probe(struct udevice *dev)
 		debug("%s: Could not decode sleep-gpios (%d)\n", __func__, ret);
 		return ret;
 	}
-	ret = dm_gpio_set_pull(&uc_priv->sleep, GPIO_PULL_NONE);
-	if (ret) {
-		debug("%s: Could not set sleep pull value\n", __func__);
-		return ret;
-	}
+	/*
+	 * Drop this for now as we do not have driver model pinctrl support
+	 *
+	 * ret = dm_gpio_set_pull(&uc_priv->sleep, GPIO_PULL_NONE);
+	 * if (ret) {
+	 *	debug("%s: Could not set sleep pull value\n", __func__);
+	 *	return ret;
+	 * }
+	 */
 	ret = gpio_request_by_name(dev, "reset-gpios", 0, &uc_priv->reset,
 				   GPIOD_IS_OUT);
 	if (ret) {
 		debug("%s: Could not decode reset-gpios (%d)\n", __func__, ret);
 		return ret;
 	}
-	ret = dm_gpio_set_pull(&uc_priv->reset, GPIO_PULL_NONE);
-	if (ret) {
-		debug("%s: Could not set reset pull value\n", __func__);
-		return ret;
-	}
+	/*
+	 * Drop this for now as we do not have driver model pinctrl support
+	 *
+	 * ret = dm_gpio_set_pull(&uc_priv->reset, GPIO_PULL_NONE);
+	 * if (ret) {
+	 *	debug("%s: Could not set reset pull value\n", __func__);
+	 *	return ret;
+	 * }
+	 */
 	ret = gpio_request_by_name(dev, "hotplug-gpios", 0, &uc_priv->hotplug,
 				   GPIOD_IS_IN);
 	if (ret && ret != -ENOENT) {

198 lines not on this page · raw message

index 1b80ca0..c744044 100644
@@ -35,6 +35,7 @@ enum uclass_id {
 	UCLASS_I2C,		/* I2C bus */
 	UCLASS_I2C_EEPROM,	/* I2C EEPROM device */
 	UCLASS_I2C_GENERIC,	/* Generic I2C device */
+	UCLASS_I2C_MUX,		/* I2C multiplexer */
 	UCLASS_LED,		/* Light-emitting diode (LED) */
 	UCLASS_LPC,		/* x86 'low pin count' interface */
 	UCLASS_MASS_STORAGE,	/* Mass storage device */

index d191829..6493931 100644
@@ -445,6 +445,45 @@ struct dm_i2c_ops {
 #define i2c_get_ops(dev)	((struct dm_i2c_ops *)(dev)->driver->ops)
 
 /**
+ * struct i2c_mux_ops - operations for an I2C mux
+ *
+ * The current mux state is expected to be stored in the mux itself since
+ * it is the only thing that knows how to make things work. The mux can
+ * record the current state and then avoid switching unless it is necessary.
+ * So select() can be skipped if the mux is already in the correct state.
+ * Also deselect() can be made a nop if required.
+ */
+struct i2c_mux_ops {
+	/**
+	 * select() - select one of of I2C buses attached to a mux
+	 *
+	 * This will be called when there is no bus currently selected by the
+	 * mux. This method does not need to deselect the old bus since
+	 * deselect() will be already have been called if necessary.
+	 *
+	 * @mux:	Mux device
+	 * @bus:	I2C bus to select
+	 * @channel:	Channel number correponding to the bus to select
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
+
+	/**
+	 * deselect() - select one of of I2C buses attached to a mux
+	 *
+	 * This is used to deselect the currently selected I2C bus.
+	 *
+	 * @mux:	Mux device
+	 * @bus:	I2C bus to deselect
+	 * @channel:	Channel number correponding to the bus to deselect
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
+};
+
+#define i2c_mux_get_ops(dev)	((struct i2c_mux_ops *)(dev)->driver->ops)
+
+/**
  * i2c_get_chip() - get a device to use to access a chip on a bus
  *
  * This returns the device for the given chip address. The device can then

147 lines not on this page · raw message

41 lines not on this page · raw message

133 lines not on this page · raw message

index ac0d44f..f79a878 100644
@@ -56,8 +56,8 @@ enum {
  */
 static int tps65090_read(u32 reg, u8 *val)
 {
-	return cros_ec_i2c_xfer(config.dev, TPS65090_ADDR, reg, 1,
-				val, 1, true);
+	return cros_ec_i2c_xfer_old(config.dev, TPS65090_ADDR, reg, 1,
+				    val, 1, true);
 }
 
 /**

@@ -69,8 +69,8 @@ static int tps65090_read(u32 reg, u8 *val)
  */
 static int tps65090_write(u32 reg, u8 val)
 {
-	return cros_ec_i2c_xfer(config.dev, TPS65090_ADDR, reg, 1,
-				&val, 1, false);
+	return cros_ec_i2c_xfer_old(config.dev, TPS65090_ADDR, reg, 1,
+				    &val, 1, false);
 }
 
 /**

index 3b2be2c..41951c3 100644
@@ -390,6 +390,16 @@ int cros_ec_decode_ec_flash(const void *blob, int node,
  */
 void cros_ec_check_keyboard(struct cros_ec_dev *dev);
 
+struct i2c_msg;
+/*
+ * Tunnel an I2C transfer to the EC
+ *
+ * @param dev		CROS-EC device
+ * @param msg		List of messages to transfer
+ * @param nmsgs		Number of messages to transfer
+ */
+int cros_ec_i2c_tunnel(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
+
 /*
  * Tunnel an I2C transfer to the EC
  *

@@ -401,7 +411,7 @@ void cros_ec_check_keyboard(struct cros_ec_dev *dev);
  * @param len		Length of buffer
  * @param is_read	1 if this is a read, 0 if this is a write
  */
-int cros_ec_i2c_xfer(struct cros_ec_dev *dev, uchar chip, uint addr,
-		     int alen, uchar *buffer, int len, int is_read);
+int cros_ec_i2c_xfer_old(struct cros_ec_dev *dev, uchar chip, uint addr,
+			 int alen, uchar *buffer, int len, int is_read);
 
 #endif

77 lines not on this page · raw message

index ae52561..6027177 100644
@@ -931,31 +931,32 @@ int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block)
 	return 0;
 }
 
-int cros_ec_set_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t state)
+int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state)
 {
+	struct cros_ec_dev *cdev = dev_get_uclass_priv(dev);
 	struct ec_params_ldo_set params;
 
 	params.index = index;
 	params.state = state;
 
-	if (ec_command_inptr(dev, EC_CMD_LDO_SET, 0,
-		       &params, sizeof(params),
-		       NULL, 0))
+	if (ec_command_inptr(cdev, EC_CMD_LDO_SET, 0, &params, sizeof(params),
+			     NULL, 0))
 		return -1;
 
 	return 0;
 }
 
-int cros_ec_get_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t *state)
+int cros_ec_get_ldo(struct udevice *dev, uint8_t index, uint8_t *state)
 {
+	struct cros_ec_dev *cdev = dev_get_uclass_priv(dev);
 	struct ec_params_ldo_get params;
 	struct ec_response_ldo_get *resp;
 
 	params.index = index;
 
-	if (ec_command_inptr(dev, EC_CMD_LDO_GET, 0,
-		       &params, sizeof(params),
-		       (uint8_t **)&resp, sizeof(*resp)) != sizeof(*resp))
+	if (ec_command_inptr(cdev, EC_CMD_LDO_GET, 0, &params, sizeof(params),
+			     (uint8_t **)&resp, sizeof(*resp)) !=
+			     sizeof(*resp))
 		return -1;
 
 	*state = resp->state;

@@ -1681,9 +1682,9 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			state = simple_strtoul(argv[3], &endp, 10);
 			if (*argv[3] == 0 || *endp != 0)
 				return CMD_RET_USAGE;
-			ret = cros_ec_set_ldo(dev, index, state);
+			ret = cros_ec_set_ldo(udev, index, state);
 		} else {
-			ret = cros_ec_get_ldo(dev, index, &state);
+			ret = cros_ec_get_ldo(udev, index, &state);
 			if (!ret) {
 				printf("LDO%d: %s\n", index,
 					state == EC_LDO_STATE_ON ?

index 41951c3..0ad9d81 100644
@@ -350,7 +350,7 @@ int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp);
  * @param state		new state of the LDO/FET : EC_LDO_STATE_ON|OFF
  * @return 0 if ok, -1 on error
  */
-int cros_ec_set_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t state);
+int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state);
 
 /**
  * Read back a LDO / FET current state.

@@ -360,7 +360,7 @@ int cros_ec_set_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t state);
  * @param state		current state of the LDO/FET : EC_LDO_STATE_ON|OFF
  * @return 0 if ok, -1 on error
  */
-int cros_ec_get_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t *state);
+int cros_ec_get_ldo(struct udevice *dev, uint8_t index, uint8_t *state);
 
 /**
  * Get access to the error reported when cros_ec_board_init() was called

index 21173fc..946b87c 100644
@@ -81,13 +81,15 @@ static int max77686_buck_volt2hex(int buck, int uV)
 		/* hex = (uV - 600000) / 12500; */
 		hex = (uV - MAX77686_BUCK_UV_LMIN) / MAX77686_BUCK_UV_LSTEP;
 		hex_max = MAX77686_BUCK234_VOLT_MAX_HEX;
-		/**
-		 * Those use voltage scaller - temporary not implemented
-		 * so return just 0
-		 */
-		return -ENOSYS;
+		break;
 	default:
-		/* hex = (uV - 750000) / 50000; */
+		/*
+		 * hex = (uV - 750000) / 50000. We assume that dynamic voltage
+		 * scaling via GPIOs is not enabled and don't support that.
+		 * If this is enabled then the driver will need to take that
+		 * into account anrd check different registers depending on
+		 * the current setting See the datasheet for details.
+		 */
 		hex = (uV - MAX77686_BUCK_UV_HMIN) / MAX77686_BUCK_UV_HSTEP;
 		hex_max = MAX77686_BUCK_VOLT_MAX_HEX;
 		break;

@@ -379,11 +381,11 @@ static int max77686_buck_val(struct udevice *dev, int op, int *uV)
 	case 2:
 	case 3:
 	case 4:
-		/* Those use voltage scallers - will support in the future */
 		mask = MAX77686_BUCK234_VOLT_MASK;
-		return -ENOSYS;
+		break;
 	default:
 		mask = MAX77686_BUCK_VOLT_MASK;
+		break;
 	}
 
 	ret = pmic_read(dev->parent, adr, &val, 1);

362 lines not on this page · raw message

index 88f4044..57cc92c 100644
@@ -50,9 +50,9 @@ static int has_edp_bridge(void)
 
 void exynos_lcd_power_on(void)
 {
+#ifdef CONFIG_POWER_TPS65090
 	int ret;
 
-#ifdef CONFIG_POWER_TPS65090
 	ret = tps65090_init();
 	if (ret < 0) {
 		printf("%s: tps65090_init() failed\n", __func__);

index 3ad4a9b..91e32df 100644
@@ -60,4 +60,8 @@
 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
 #define CONFIG_ARM_GIC_BASE_ADDRESS	0x10480000
 
+/* Power */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+
 #endif	/* __CONFIG_H */

index e04dec7..15363d0 100644
@@ -67,6 +67,8 @@
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
 
 /* specific .lds file */
 #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"

@@ -126,10 +128,6 @@
 #define SPI_FLASH_UBOOT_POS	(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
 
 /* I2C */
-
-/* TODO([email protected]): Move these two options to Kconfig */
-#define CONFIG_DM_I2C
-#define CONFIG_DM_I2C_COMPAT
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C_S3C24X0
 #define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */

@@ -149,10 +147,6 @@
 #define CONFIG_OF_SPI
 #endif
 
-/* Power */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_MODE	SPI_MODE_0
 #define CONFIG_ENV_SECT_SIZE	CONFIG_ENV_SIZE

index b1b8e1a..098734b 100644
@@ -18,11 +18,6 @@
 
 #include "exynos5-common.h"
 
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_TPS65090
-
 /* Enable keyboard */
 #define CONFIG_KEYBOARD
 

index e5655fc..bbec672 100644
@@ -17,9 +17,6 @@
 
 #include <configs/exynos5250-common.h>
 
-/* PMIC */
-#define CONFIG_POWER_MAX77686
-
 #define CONFIG_BOARD_COMMON
 
 #define CONFIG_USB_XHCI

index 557f86c..a467792 100644
@@ -18,9 +18,6 @@
 #include <configs/exynos5250-common.h>
 #include <configs/exynos5-dt-common.h>
 
-
-#define CONFIG_POWER_TPS65090_I2C
-
 #define CONFIG_BOARD_COMMON
 
 #define CONFIG_USB_XHCI

index 91e32df..8784c4e 100644
@@ -13,6 +13,7 @@
 	"fdtfile=exynos5250-arndale.dtb\0"
 
 #include "exynos5250-common.h"
+#include <configs/exynos5-common.h>
 
 /* SD/MMC configuration */
 #define CONFIG_SUPPORT_EMMC_BOOT

@@ -20,15 +21,6 @@
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
-/* USB */
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_EXYNOS
-
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_ETHER_ASIX88179
-
 /* MMC SPL */
 #define CONFIG_EXYNOS_SPL
 

@@ -36,9 +28,6 @@
 #define CONFIG_SYS_PROMPT		"ARNDALE # "
 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
 
-#define CONFIG_NR_DRAM_BANKS	8
-#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
-
 #define CONFIG_IDENT_STRING		" for ARNDALE"
 
 #define CONFIG_ENV_IS_IN_MMC

@@ -49,6 +38,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR	CONFIG_IRAM_STACK
 
 /* PMIC */
+#define CONFIG_POWER
 #define CONFIG_PMIC
 #define CONFIG_POWER_I2C
 

index 15363d0..e710f41 100644
@@ -143,8 +143,6 @@
 #define CONFIG_SPI_FLASH_GIGADEVICE
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #define CONFIG_SF_DEFAULT_SPEED		50000000
-#define EXYNOS5_SPI_NUM_CONTROLLERS	5
-#define CONFIG_OF_SPI
 #endif
 
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH

@@ -194,7 +192,6 @@
 #define CONFIG_FIT
 #define CONFIG_FIT_BEST_MATCH
 
-
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 1) \
 	func(MMC, mmc, 0) \

index 098734b..29ef84b 100644
@@ -16,7 +16,21 @@
 		"stdout=serial,lcd\0" \
 		"stderr=serial,lcd\0"
 
-#include "exynos5-common.h"
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_BASE	0x12D30000
+#define FLASH_SIZE		(4 << 20)
+#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_SPI_BOOTING
+
+#define CONFIG_BOARD_COMMON
+
+/* Display */
+#define CONFIG_LCD
+#ifdef CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_BPP			LCD_COLOR16
+#endif
 
 /* Enable keyboard */
 #define CONFIG_KEYBOARD

index 95e96ec..7d8921f 100644
@@ -10,7 +10,6 @@
 #ifndef __CONFIG_5250_H
 #define __CONFIG_5250_H
 
-#include <configs/exynos5-common.h>
 #define CONFIG_EXYNOS5250
 
 #define CONFIG_SYS_SDRAM_BASE		0x40000000

@@ -28,16 +27,13 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR	CONFIG_IRAM_STACK
 
-/* I2C */
-#define CONFIG_MAX_I2C_NUM	8
+/* USB */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_EXYNOS
 
-/* Display */
-#define CONFIG_LCD
-#ifdef CONFIG_LCD
-#define CONFIG_EXYNOS_FB
-#define CONFIG_EXYNOS_DP
-#define LCD_BPP			LCD_COLOR16
-#endif
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_ASIX88179
 
 /* DRAM Memory Banks */
 #define CONFIG_NR_DRAM_BANKS	8

index 3b1ac2c..3cdec51 100644
@@ -13,8 +13,6 @@
 /* A variant of Exynos5420 (Exynos5 Family) */
 #define CONFIG_EXYNOS5800
 
-#include <configs/exynos5-common.h>
-
 #define MACH_TYPE_SMDK5420	8002
 #define CONFIG_MACH_TYPE	MACH_TYPE_SMDK5420
 

@@ -32,10 +30,6 @@
 #define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi"	\
 				"exynos5420-peach-pit exynos5420-smdk5420"
 
-#define CONFIG_MAX_I2C_NUM	11
-
-#define CONFIG_BOARD_REV_GPIO_COUNT	2
-
 #define CONFIG_PHY_IRAM_BASE		0x02020000
 
 /* Address for relocating helper code (Last 4 KB of IRAM) */

@@ -52,4 +46,7 @@
  */
 #define CONFIG_CORE_COUNT		0x8
 
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_EXYNOS
+
 #endif	/* __CONFIG_EXYNOS5420_H */

index 8d5c736..0deff46 100644
@@ -9,7 +9,9 @@
 #define __CONFIG_ODROID_XU3_H
 
 #include "exynos5420-common.h"
+#include <configs/exynos5-common.h>
 
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_SYS_PROMPT		"ODROID-XU3 # "
 #define CONFIG_IDENT_STRING		" for ODROID-XU3"
 

index 46699ff..b97faf2 100644
@@ -9,12 +9,6 @@
 #ifndef __CONFIG_PEACH_PI_H
 #define __CONFIG_PEACH_PI_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
-#define CONFIG_SPI_BOOTING
-
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"bootm_size=0x10000000\0" \
 	"kernel_addr_r=0x22000000\0" \

@@ -25,8 +19,7 @@
 
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>
-
-#define CONFIG_BOARD_COMMON
+#include <configs/exynos5-common.h>
 
 #define CONFIG_SYS_SDRAM_BASE	0x20000000
 #define CONFIG_SYS_TEXT_BASE	0x23E00000

@@ -51,9 +44,6 @@
 
 #define CONFIG_POWER_TPS65090_EC
 
-#define CONFIG_USB_XHCI
-#define CONFIG_USB_XHCI_EXYNOS
-
 /* DRAM Memory Banks */
 #define CONFIG_NR_DRAM_BANKS	7
 #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */

index c5c9e3a..18be42c 100644
@@ -9,12 +9,6 @@
 #ifndef __CONFIG_PEACH_PIT_H
 #define __CONFIG_PEACH_PIT_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
-#define CONFIG_SPI_BOOTING
-
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"bootm_size=0x10000000\0" \
 	"kernel_addr_r=0x22000000\0" \

@@ -25,8 +19,7 @@
 
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>
-
-#define CONFIG_BOARD_COMMON
+#include <configs/exynos5-common.h>
 
 #define CONFIG_SYS_SDRAM_BASE	0x20000000
 #define CONFIG_SYS_TEXT_BASE	0x23E00000

@@ -41,19 +34,8 @@
 
 #define CONFIG_VIDEO_PARADE
 
-/* Display */
-#define CONFIG_LCD
-#ifdef CONFIG_LCD
-#define CONFIG_EXYNOS_FB
-#define CONFIG_EXYNOS_DP
-#define LCD_BPP			LCD_COLOR16
-#endif
-
 #define CONFIG_POWER_TPS65090_EC
 
-#define CONFIG_USB_XHCI
-#define CONFIG_USB_XHCI_EXYNOS
-
 /* DRAM Memory Banks */
 #define CONFIG_NR_DRAM_BANKS	4
 #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */

index bbec672..82d41cc 100644
@@ -9,23 +9,16 @@
 #ifndef __CONFIG_SMDK_H
 #define __CONFIG_SMDK_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
-#define CONFIG_SPI_BOOTING
-
 #include <configs/exynos5250-common.h>
+#include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
 
-#define CONFIG_BOARD_COMMON
+#undef CONFIG_KEYBOARD
 
-#define CONFIG_USB_XHCI
-#define CONFIG_USB_XHCI_EXYNOS
+#define CONFIG_BOARD_COMMON
 
 #define CONFIG_SYS_PROMPT		"SMDK5250 # "
 #define CONFIG_IDENT_STRING		" for SMDK5250"
-
-/* Miscellaneous configurable options */
 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
 
 #endif	/* __CONFIG_SMDK_H */

index 607877c..623efa8 100644
@@ -9,13 +9,11 @@
 #ifndef __CONFIG_SMDK5420_H
 #define __CONFIG_SMDK5420_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
-#define CONFIG_SPI_BOOTING
-
 #include <configs/exynos5420-common.h>
+#include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
+
+#undef CONFIG_KEYBOARD
 
 #define CONFIG_BOARD_COMMON
 

index a467792..bf3377c 100644
@@ -9,22 +9,12 @@
 #ifndef __CONFIG_SNOW_H
 #define __CONFIG_SNOW_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
-#define CONFIG_SPI_BOOTING
-
 #include <configs/exynos5250-common.h>
 #include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
 
 #define CONFIG_BOARD_COMMON
 
-#define CONFIG_USB_XHCI
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_XHCI_EXYNOS
-#define CONFIG_USB_EHCI_EXYNOS
-
 #define CONFIG_SYS_PROMPT		"snow # "
 #define CONFIG_IDENT_STRING		" for snow"
 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"

143 lines not on this page · raw message

index 3cdec51..cd86e06 100644
@@ -13,6 +13,8 @@
 /* A variant of Exynos5420 (Exynos5 Family) */
 #define CONFIG_EXYNOS5800
 
+#define CONFIG_EXYNOS5_DT
+
 #define MACH_TYPE_SMDK5420	8002
 #define CONFIG_MACH_TYPE	MACH_TYPE_SMDK5420
 

306 lines not on this page · raw message

index 29ef84b..8b61a52 100644
@@ -16,6 +16,8 @@
 		"stdout=serial,lcd\0" \
 		"stderr=serial,lcd\0"
 
+#define CONFIG_EXYNOS5_DT
+
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BASE	0x12D30000
 #define FLASH_SIZE		(4 << 20)

310 lines not on this page · raw message

218 lines not on this page · raw message

index 18be42c..beb65b0 100644
@@ -34,8 +34,6 @@
 
 #define CONFIG_VIDEO_PARADE
 
-#define CONFIG_POWER_TPS65090_EC
-
 /* DRAM Memory Banks */
 #define CONFIG_NR_DRAM_BANKS	4
 #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */

index 4b3f8d1..12dc5fd 100644
@@ -170,7 +170,6 @@ enum fdt_compat_id {
 	COMPAT_INFINEON_SLB9645_TPM,	/* Infineon SLB9645 TPM */
 	COMPAT_SAMSUNG_EXYNOS5_I2C,	/* Exynos5 High Speed I2C Controller */
 	COMPAT_SANDBOX_LCD_SDL,		/* Sandbox LCD emulation with SDL */
-	COMPAT_TI_TPS65090,		/* Texas Instrument TPS65090 */
 	COMPAT_NXP_PTN3460,		/* NXP PTN3460 DP/LVDS bridge */
 	COMPAT_SAMSUNG_EXYNOS_SYSMMU,	/* Exynos sysmmu */
 	COMPAT_PARADE_PS8625,		/* Parade PS8622 EDP->LVDS bridge */

73 lines not on this page · raw message

index a954051..670612f 100644
@@ -62,7 +62,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645tt"),
 	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
 	COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
-	COMPAT(TI_TPS65090, "ti,tps65090"),
 	COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
 	COMPAT(PARADE_PS8625, "parade,ps8625"),

index 6027177..ba36795 100644
@@ -1055,87 +1055,6 @@ int cros_ec_decode_ec_flash(const void *blob, int node,
 	return 0;
 }
 
-int cros_ec_i2c_xfer_old(struct cros_ec_dev *dev, uchar chip, uint addr,
-			 int alen, uchar *buffer, int len, int is_read)
-{
-	union {
-		struct ec_params_i2c_passthru p;
-		uint8_t outbuf[EC_PROTO2_MAX_PARAM_SIZE];
-	} params;
-	union {
-		struct ec_response_i2c_passthru r;
-		uint8_t inbuf[EC_PROTO2_MAX_PARAM_SIZE];
-	} response;
-	struct ec_params_i2c_passthru *p = &params.p;
-	struct ec_response_i2c_passthru *r = &response.r;
-	struct ec_params_i2c_passthru_msg *msg = p->msg;
-	uint8_t *pdata;
-	int read_len, write_len;
-	int size;
-	int rv;
-
-	p->port = 0;
-
-	if (alen != 1) {
-		printf("Unsupported address length %d\n", alen);
-		return -1;
-	}
-	if (is_read) {
-		read_len = len;
-		write_len = alen;
-		p->num_msgs = 2;
-	} else {
-		read_len = 0;
-		write_len = alen + len;
-		p->num_msgs = 1;
-	}
-
-	size = sizeof(*p) + p->num_msgs * sizeof(*msg);
-	if (size + write_len > sizeof(params)) {
-		puts("Params too large for buffer\n");
-		return -1;
-	}
-	if (sizeof(*r) + read_len > sizeof(response)) {
-		puts("Read length too big for buffer\n");
-		return -1;
-	}
-
-	/* Create a message to write the register address and optional data */
-	pdata = (uint8_t *)p + size;
-	msg->addr_flags = chip;
-	msg->len = write_len;
-	pdata[0] = addr;
-	if (!is_read)
-		memcpy(pdata + 1, buffer, len);
-	msg++;
-
-	if (read_len) {
-		msg->addr_flags = chip | EC_I2C_FLAG_READ;
-		msg->len = read_len;
-	}
-
-	rv = ec_command(dev, EC_CMD_I2C_PASSTHRU, 0, p, size + write_len,
-			r, sizeof(*r) + read_len);
-	if (rv < 0)
-		return rv;
-
-	/* Parse response */
-	if (r->i2c_status & EC_I2C_STATUS_ERROR) {
-		printf("Transfer failed with status=0x%x\n", r->i2c_status);
-		return -1;
-	}
-
-	if (rv < sizeof(*r) + read_len) {
-		puts("Truncated read response\n");
-		return -1;
-	}
-
-	if (read_len)
-		memcpy(buffer, r->data, read_len);
-
-	return 0;
-}
-
 int cros_ec_i2c_tunnel(struct udevice *dev, struct i2c_msg *in, int nmsgs)
 {
 	struct cros_ec_dev *cdev = dev_get_uclass_priv(dev);

@@ -1266,187 +1185,6 @@ static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc,
 	return 0;
 }
 
-/**
- * get_alen() - Small parser helper function to get address length
- *
- * Returns the address length.
- */
-static uint get_alen(char *arg)
-{
-	int	j;
-	int	alen;
-
-	alen = 1;
-	for (j = 0; j < 8; j++) {
-		if (arg[j] == '.') {
-			alen = arg[j+1] - '0';
-			break;
-		} else if (arg[j] == '\0') {
-			break;
-		}
-	}
-	return alen;
-}
-
-#define DISP_LINE_LEN	16
-
-/*
- * TODO([email protected]): This code copied almost verbatim from cmd_i2c.c
- * so we can remove it later.
- */
-static int cros_ec_i2c_md(struct cros_ec_dev *dev, int flag, int argc,
-			  char * const argv[])
-{
-	u_char	chip;
-	uint	addr, alen, length = 0x10;
-	int	j, nbytes, linebytes;
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	if (1 || (flag & CMD_FLAG_REPEAT) == 0) {
-		/*
-		 * New command specified.
-		 */
-
-		/*
-		 * I2C chip address
-		 */
-		chip = simple_strtoul(argv[0], NULL, 16);
-
-		/*
-		 * I2C data address within the chip.  This can be 1 or
-		 * 2 bytes long.  Some day it might be 3 bytes long :-).
-		 */
-		addr = simple_strtoul(argv[1], NULL, 16);
-		alen = get_alen(argv[1]);
-		if (alen > 3)
-			return CMD_RET_USAGE;
-
-		/*
-		 * If another parameter, it is the length to display.
-		 * Length is the number of objects, not number of bytes.
-		 */
-		if (argc > 2)
-			length = simple_strtoul(argv[2], NULL, 16);
-	}
-
-	/*
-	 * Print the lines.
-	 *
-	 * We buffer all read data, so we can make sure data is read only
-	 * once.
-	 */
-	nbytes = length;
-	do {
-		unsigned char	linebuf[DISP_LINE_LEN];
-		unsigned char	*cp;
-
-		linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
-
-		if (cros_ec_i2c_xfer_old(dev, chip, addr, alen, linebuf,
-					 linebytes, 1))
-			puts("Error reading the chip.\n");
-		else {
-			printf("%04x:", addr);
-			cp = linebuf;
-			for (j = 0; j < linebytes; j++) {
-				printf(" %02x", *cp++);
-				addr++;
-			}
-			puts("    ");
-			cp = linebuf;
-			for (j = 0; j < linebytes; j++) {
-				if ((*cp < 0x20) || (*cp > 0x7e))
-					puts(".");
-				else
-					printf("%c", *cp);
-				cp++;
-			}
-			putc('\n');
-		}
-		nbytes -= linebytes;
-	} while (nbytes > 0);
-
-	return 0;
-}
-
-static int cros_ec_i2c_mw(struct cros_ec_dev *dev, int flag, int argc,
-			  char * const argv[])
-{
-	uchar	chip;
-	ulong	addr;
-	uint	alen;
-	uchar	byte;
-	int	count;
-
-	if ((argc < 3) || (argc > 4))
-		return CMD_RET_USAGE;
-
-	/*
-	 * Chip is always specified.
-	 */
-	chip = simple_strtoul(argv[0], NULL, 16);
-
-	/*
-	 * Address is always specified.
-	 */
-	addr = simple_strtoul(argv[1], NULL, 16);
-	alen = get_alen(argv[1]);
-	if (alen > 3)
-		return CMD_RET_USAGE;
-
-	/*
-	 * Value to write is always specified.
-	 */
-	byte = simple_strtoul(argv[2], NULL, 16);
-
-	/*
-	 * Optional count
-	 */
-	if (argc == 4)
-		count = simple_strtoul(argv[3], NULL, 16);
-	else
-		count = 1;
-
-	while (count-- > 0) {
-		if (cros_ec_i2c_xfer_old(dev, chip, addr++, alen, &byte, 1, 0))
-			puts("Error writing the chip.\n");
-		/*
-		 * Wait for the write to complete.  The write can take
-		 * up to 10mSec (we allow a little more time).
-		 */
-/*
- * No write delay with FRAM devices.
- */
-#if !defined(CONFIG_SYS_I2C_FRAM)
-		udelay(11000);
-#endif
-	}
-
-	return 0;
-}
-
-/* Temporary code until we have driver model and can use the i2c command */
-static int cros_ec_i2c_passthrough(struct cros_ec_dev *dev, int flag,
-				   int argc, char * const argv[])
-{
-	const char *cmd;
-
-	if (argc < 1)
-		return CMD_RET_USAGE;
-	cmd = *argv++;
-	argc--;
-	if (0 == strcmp("md", cmd))
-		cros_ec_i2c_md(dev, flag, argc, argv);
-	else if (0 == strcmp("mw", cmd))
-		cros_ec_i2c_mw(dev, flag, argc, argv);
-	else
-		return CMD_RET_USAGE;
-
-	return 0;
-}
-
 static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct cros_ec_dev *dev;

@@ -1696,8 +1434,6 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			debug("%s: Could not access LDO%d\n", __func__, index);
 			return ret;
 		}
-	} else if (0 == strcmp("i2c", cmd)) {
-		ret = cros_ec_i2c_passthrough(dev, flag, argc - 2, argv + 2);
 	} else {
 		return CMD_RET_USAGE;
 	}

@@ -1734,9 +1470,7 @@ U_BOOT_CMD(
 	"crosec vbnvcontext [hexstring]        Read [write] VbNvContext from EC\n"
 	"crosec ldo <idx> [<state>] Switch/Read LDO state\n"
 	"crosec test                run tests on cros_ec\n"
-	"crosec version             Read CROS-EC version\n"
-	"crosec i2c md chip address[.0, .1, .2] [# of objects] - read from I2C passthru\n"
-	"crosec i2c mw chip address[.0, .1, .2] value [count] - write to I2C passthru (fill)"
+	"crosec version             Read CROS-EC version"
 );
 #endif
 

index 0ad9d81..b926934 100644
@@ -400,18 +400,4 @@ struct i2c_msg;
  */
 int cros_ec_i2c_tunnel(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
 
-/*
- * Tunnel an I2C transfer to the EC
- *
- * @param dev		CROS-EC device
- * @param chip		Chip address (7-bit I2C address)
- * @param addr		Register address to read/write
- * @param alen		Length of register address in bytes
- * @param buffer	Buffer containing data to read/write
- * @param len		Length of buffer
- * @param is_read	1 if this is a read, 0 if this is a write
- */
-int cros_ec_i2c_xfer_old(struct cros_ec_dev *dev, uchar chip, uint addr,
-			 int alen, uchar *buffer, int len, int is_read);
-
 #endif

231 lines not on this page · raw message

index b97faf2..0f5e9fe 100644
@@ -32,8 +32,6 @@
 #define CONFIG_SYS_PROMPT	"Peach-Pi # "
 #define CONFIG_IDENT_STRING	" for Peach-Pi"
 
-#define CONFIG_VIDEO_PARADE
-
 /* Display */
 #define CONFIG_LCD
 #ifdef CONFIG_LCD

index beb65b0..f259434 100644
@@ -32,8 +32,6 @@
 #define CONFIG_SYS_PROMPT	"Peach-Pit # "
 #define CONFIG_IDENT_STRING	" for Peach-Pit"
 
-#define CONFIG_VIDEO_PARADE
-
 /* DRAM Memory Banks */
 #define CONFIG_NR_DRAM_BANKS	4
 #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */

index 12dc5fd..b994f2c 100644
@@ -172,7 +172,6 @@ enum fdt_compat_id {
 	COMPAT_SANDBOX_LCD_SDL,		/* Sandbox LCD emulation with SDL */
 	COMPAT_NXP_PTN3460,		/* NXP PTN3460 DP/LVDS bridge */
 	COMPAT_SAMSUNG_EXYNOS_SYSMMU,	/* Exynos sysmmu */
-	COMPAT_PARADE_PS8625,		/* Parade PS8622 EDP->LVDS bridge */
 	COMPAT_INTEL_MICROCODE,		/* Intel microcode update */
 	COMPAT_MEMORY_SPD,		/* Memory SPD information */
 	COMPAT_INTEL_PANTHERPOINT_AHCI,	/* Intel Pantherpoint AHCI */

deleted file mode 100644
index 887f56d..0000000
@@ -1,18 +0,0 @@
-/*
- * (C) Copyright 2012 Samsung Electronics
- * Donghwa Lee <[email protected]>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __PARADE_H__
-#define __PARADE_H__
-
-/* Initialize the Parade dP<->LVDS bridge if present */
-#ifdef CONFIG_VIDEO_PARADE
-int parade_init(const void *blob);
-#else
-static inline int parade_init(const void *blob) { return -1; }
-#endif
-
-#endif	/* __PARADE_H__ */

index 670612f..d70e81b 100644
@@ -64,7 +64,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
 	COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
-	COMPAT(PARADE_PS8625, "parade,ps8625"),
 	COMPAT(INTEL_MICROCODE, "intel,microcode"),
 	COMPAT(MEMORY_SPD, "memory-spd"),
 	COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),

index b994f2c..cd4ec66 100644
@@ -170,7 +170,6 @@ enum fdt_compat_id {
 	COMPAT_INFINEON_SLB9645_TPM,	/* Infineon SLB9645 TPM */
 	COMPAT_SAMSUNG_EXYNOS5_I2C,	/* Exynos5 High Speed I2C Controller */
 	COMPAT_SANDBOX_LCD_SDL,		/* Sandbox LCD emulation with SDL */
-	COMPAT_NXP_PTN3460,		/* NXP PTN3460 DP/LVDS bridge */
 	COMPAT_SAMSUNG_EXYNOS_SYSMMU,	/* Exynos sysmmu */
 	COMPAT_INTEL_MICROCODE,		/* Intel microcode update */
 	COMPAT_MEMORY_SPD,		/* Memory SPD information */

index d70e81b..aeed232 100644
@@ -62,7 +62,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645tt"),
 	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
 	COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
-	COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
 	COMPAT(INTEL_MICROCODE, "intel,microcode"),
 	COMPAT(MEMORY_SPD, "memory-spd"),

index 3f6750a..17e8f56 100644
@@ -197,6 +197,4 @@ unsigned int exynos_init_dp(void)
 }
 #endif
 
-void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd);
-
 #endif /* _DP_INFO_H */

index c3f7a3a..5b6fc14 100644
@@ -22,8 +22,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct exynos_dp_platform_data *dp_pd;
-
 void __exynos_set_dp_phy(unsigned int onoff)
 {
 }

@@ -851,7 +849,6 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
 	return ret;
 }
 
-#ifdef CONFIG_OF_CONTROL
 int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info)
 {
 	unsigned int node = fdtdec_next_compatible(blob, 0,

@@ -905,7 +902,6 @@ int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info)
 						"samsung,color-depth", 0);
 	return 0;
 }
-#endif
 
 unsigned int exynos_init_dp(void)
 {

@@ -918,16 +914,8 @@ unsigned int exynos_init_dp(void)
 		return -EFAULT;
 	}
 
-#ifdef CONFIG_OF_CONTROL
 	if (exynos_dp_parse_dt(gd->fdt_blob, edp_info))
 		debug("unable to parse DP DT node\n");
-#else
-	edp_info = dp_pd->edp_dev_info;
-	if (edp_info == NULL) {
-		debug("failed to get edp_info data.\n");
-		return -EFAULT;
-	}
-#endif
 
 	exynos_dp_set_base_addr();
 

@@ -971,13 +959,3 @@ unsigned int exynos_init_dp(void)
 
 	return ret;
 }
-
-void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd)
-{
-	if (pd == NULL) {
-		debug("pd is NULL\n");
-		return;
-	}
-
-	dp_pd = pd;
-}

new file mode 100644
index 0000000..a692dfd
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_SPRING_H
+#define __CONFIG_SPRING_H
+
+#include <configs/exynos5250-common.h>
+#include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
+
+#define CONFIG_BOARD_COMMON
+
+#define CONFIG_SYS_PROMPT		"spring # "
+#define CONFIG_IDENT_STRING		" for spring"
+#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
+
+#endif	/* __CONFIG_SPRING_H */