ARM: ts4800: add board support
cover ARM: ts4800: add board support
This patchset adds support for TS4800, a Technologic Systems' board. This board is a bit peculiar because most of the init is done by the FPGA and U-Boot is used as a second stage bootloader.
Files have been put in board/technologic/ to follow the same convention as Technologic Systems [1].
[1] https://github.com/embeddedarm/u-boot
Damien Riegel (1):
ARM: ts4800: add ethernet support
Lucile Quirion (1):
ARM: ts4800: add basic board support
arch/arm/Kconfig | 5 + arch/arm/include/asm/arch-mx5/iomux-mx51.h | 11 ++ board/technologic/ts4800/Kconfig | 15 ++ board/technologic/ts4800/MAINTAINERS | 6 + board/technologic/ts4800/Makefile | 7 + board/technologic/ts4800/ts4800.c | 259 +++++++++++++++++++++++++++++ configs/ts4800_defconfig | 2 + include/configs/ts4800.h | 187 +++++++++++++++++++++ 8 files changed, 492 insertions(+) create mode 100644 board/technologic/ts4800/Kconfig create mode 100644 board/technologic/ts4800/MAINTAINERS create mode 100644 board/technologic/ts4800/Makefile create mode 100644 board/technologic/ts4800/ts4800.c create mode 100644 configs/ts4800_defconfig create mode 100644 include/configs/ts4800.h
Signature · 1 line
2.1.4
PATCH 1/2 ARM: ts4800: add basic board support
From: Lucile Quirion <[email protected]>
This commit adds basic support including:
MMC, Serial console, TS4800 watchdog
The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second stage bootloader.
--- arch/arm/Kconfig | 5 ++ board/technologic/ts4800/Kconfig | 15 ++++ board/technologic/ts4800/MAINTAINERS | 6 ++ board/technologic/ts4800/Makefile | 7 ++ board/technologic/ts4800/ts4800.c | 155 ++++++++++++++++++++++++++++++++ configs/ts4800_defconfig | 2 + include/configs/ts4800.h | 170 +++++++++++++++++++++++++++++++++++ 7 files changed, 360 insertions(+) create mode 100644 board/technologic/ts4800/Kconfig create mode 100644 board/technologic/ts4800/MAINTAINERS create mode 100644 board/technologic/ts4800/Makefile create mode 100644 board/technologic/ts4800/ts4800.c create mode 100644 configs/ts4800_defconfig create mode 100644 include/configs/ts4800.h
arch/arm/Kconfig +5 -0
@@ -649,6 +649,10 @@ config TARGET_SNOWBALL bool "Support snowball" select CPU_V7 +config TARGET_TS4800 + bool "Support TS4800" + select CPU_V7 + config TARGET_U8500_HREF bool "Support u8500_href" select CPU_V7
@@ -969,6 +973,7 @@ source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/trizepsiv/Kconfig" +source "board/technologic/ts4800/Kconfig" source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" source "board/vpac270/Kconfig"
board/technologic/ts4800/Kconfig new file +15 -0
@@ -0,0 +1,15 @@ +if TARGET_TS4800 + +config SYS_BOARD + default "ts4800" + +config SYS_VENDOR + default "technologic" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "ts4800" + +endif
board/technologic/ts4800/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +TS4800 BOARD +M: Lucile Quirion <[email protected]> +S: Maintained +F: board/ts/ts4800/ +F: include/configs/ts4800.h +F: configs/ts4800_defconfig
board/technologic/ts4800/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Savoir-faire Linux +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ts4800.o
board/technologic/ts4800/ts4800.c new file +155 -0
155 lines not on this page · raw message
configs/ts4800_defconfig new file +2 -0
@@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_TS4800=y
include/configs/ts4800.h new file +170 -0
170 lines not on this page · raw message
Signature · 1 line
2.1.4
PATCH 1/2 ARM: ts4800: add basic board support
Hi Lucile,
just a couple of minor points:
Quoted 201 lines · Damien Riegel
From: Lucile Quirion <[email protected]>
This commit adds basic support including:
MMC, Serial console, TS4800 watchdogThe config use
CONFIG_SKIP_LOWLEVEL_INITas U-boot is used as a second stage bootloader.Signed-off-by Lucile Quirion <[email protected]>Cc Stefano Babic <[email protected]>--- arch/arm/Kconfig | 5 ++ board/technologic/ts4800/Kconfig | 15 ++++ board/technologic/ts4800/MAINTAINERS | 6 ++ board/technologic/ts4800/Makefile | 7 ++ board/technologic/ts4800/ts4800.c | 155 ++++++++++++++++++++++++++++++++ configs/ts4800_defconfig | 2 + include/configs/ts4800.h | 170 +++++++++++++++++++++++++++++++++++ 7 files changed, 360 insertions(+) create mode 100644 board/technologic/ts4800/Kconfig create mode 100644 board/technologic/ts4800/MAINTAINERS create mode 100644 board/technologic/ts4800/Makefile create mode 100644 board/technologic/ts4800/ts4800.c create mode 100644 configs/ts4800_defconfig create mode 100644 include/configs/ts4800.harch/arm/Kconfig +5
-0@@ -649,6 +649,10 @@ config TARGET_SNOWBALL bool "Support snowball" select CPU_V7 +config TARGET_TS4800 + bool "Support TS4800" + select CPU_V7 + config TARGET_U8500_HREF bool "Support u8500_href" select CPU_V7@@ -969,6 +973,7 @@ source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/trizepsiv/Kconfig" +source "board/technologic/ts4800/Kconfig" source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" source "board/vpac270/Kconfig"board/technologic/ts4800/Kconfig new file +15
-0@@ -0,0 +1,15 @@ +if TARGET_TS4800 + +config SYS_BOARD + default "ts4800" + +config SYS_VENDOR + default "technologic" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "ts4800" + +endifboard/technologic/ts4800/MAINTAINERS new file +6
-0@@ -0,0 +1,6 @@ +TS4800 BOARD +M: Lucile Quirion <[email protected]> +S: Maintained +F: board/ts/ts4800/ +F: include/configs/ts4800.h +F: configs/ts4800_defconfigboard/technologic/ts4800/Makefile new file +7
-0@@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Savoir-faire Linux +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ts4800.oboard/technologic/ts4800/ts4800.c new file +100
-0@@ -0,0 +1,155 @@ +/* +* (C) Copyright 2015 Savoir-faire Linux Inc. +* +* Derived from MX51EVK code by +* Freescale Semiconductor, Inc. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux-mx51.h> +#include <asm/errno.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <asm/imx-common/mx5_video.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <mc13892.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[2 ] = { + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, +}; +#endif + +int dram_init (void ) +{ +/* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size =get_ram_size ((void *)CONFIG_SYS_SDRAM_BASE , +PHYS_SDRAM_1_SIZE ); +return 0 ; +} + +u32 get_board_rev (void ) +{ +u32 rev =get_cpu_rev (); +if (!gpio_get_value (IMX_GPIO_NR (1 ,22 ))) + rev |=BOARD_REV_2_0 <<BOARD_VER_OFFSET ; +return rev; +} + +#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH) + +static void setup_iomux_uart (void ) +{ +static const iomux_v3_cfg_t uart_pads[] = { +MX51_PAD_UART1_RXD__UART1_RXD , +MX51_PAD_UART1_TXD__UART1_TXD , +NEW_PAD_CTRL (MX51_PAD_UART1_RTS__UART1_RTS ,UART_PAD_CTRL ), +NEW_PAD_CTRL (MX51_PAD_UART1_CTS__UART1_CTS ,UART_PAD_CTRL ), + }; + +imx_iomux_v3_setup_multiple_pads (uart_pads,ARRAY_SIZE (uart_pads)); +} + +#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret; + + imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0, + NO_PAD_CTRL)); + gpio_direction_input(IMX_GPIO_NR(1, 0)); + imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, + NO_PAD_CTRL)); + gpio_direction_input(IMX_GPIO_NR(1, 6)); + + if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) + ret = !gpio_get_value(IMX_GPIO_NR(1, 0)); + else + ret = !gpio_get_value(IMX_GPIO_NR(1, 6)); + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + static const iomux_v3_cfg_t sd1_pads[] = { + NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX | + PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX | + PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX | + PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX | + PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX | + PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX | + PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST), + NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS), + NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS),
board/technologic/ts4800/ts4800.c line 110
Quoted 10 lines
board/technologic/ts4800/ts4800.c new file +10
-0+ }; + +int ret; + + esdhc_cfg[0 ].sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); + +imx_iomux_v3_setup_multiple_pads (sd1_pads,ARRAY_SIZE (sd1_pads)); + ret =fsl_esdhc_initialize (bis, &esdhc_cfg[0 ]); +if (ret) +return ret;
This is the same as
return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
Quoted 30 lines
board/technologic/ts4800/ts4800.c new file +30
-0+ return 0; +} +#endif + +int board_early_init_f (void ) +{ +setup_iomux_uart (); + +return 0 ; +} + +int board_init (void ) +{ +/* address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM_1 +0x100 ; + +return 0 ; +} + +/* +* Do not overwrite the console +* Use always serial for U-Boot console +*/ +int overwrite_console (void ) +{ +return 1 ; +} + +int checkboard (void ) +{
board/technologic/ts4800/ts4800.c line 150
Quoted 10 lines
board/technologic/ts4800/ts4800.c new file +10
-0+puts ("Board: TS4800\n" ); + +return 0 ; +} + +#define TS4800_SYSCON_BASE 0xb0010000 +void hw_watchdog_reset (void ) +{ +writew (readw (TS4800_SYSCON_BASE +0xe ) |0x2 ,TS4800_SYSCON_BASE +0xe ); +}
Are you using an external watchdog ? As code styling in u-boot, registers must be accessed via structure instead of base + offset.
Quoted 27 lines
board/technologic/ts4800/ts4800.c new file +5
-0+ +void hw_watchdog_init (void ) +{ +return ; +}configs/ts4800_defconfig new file +2
-0@@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_TS4800=yinclude/configs/ts4800.h new file +8
-0@@ -0,0 +1,170 @@ +/* +* Copyright (C) 2015, Savoir-faire Linux Inc. +* +* Derived from MX51EVK code by +* Guennadi Liakhovetski <[email protected]> +* Freescale Semiconductor, Inc. +* +* Configuration settings for the TS4800 Board
include/configs/ts4800.h line 18
Quoted 10 lines
include/configs/ts4800.h new file +10
-0+* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* High Level Configuration Options */ +#define CONFIG_MX51 +#define CONFIG_TS4800
Why do you need this ?
Quoted 143 lines
include/configs/ts4800.h new file +142
-0+#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_NO_FLASH /* No NOR Flash */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-boot is a 2nd stage bootloader */ + +#define CONFIG_HW_WATCHDOG + +#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX + +/* text base address used when linking */ +#define CONFIG_SYS_TEXT_BASE 0x90008000 + +#include <asm/arch/imx-regs.h> + +/* enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* use common/board_f.c instead of arch/<arch>/lib/<board>.c */ +#define CONFIG_SYS_GENERIC_BOARD + +/* +* Size of malloc() pool +*/ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +/* +* Hardware drivers +*/ + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_MXC_GPIO + +/* +* SPI Configs +* */ +#define CONFIG_HARD_SPI /* puts SPI: ready */ +#define CONFIG_MXC_SPI /* driver for the SPI controllers*/ +#define CONFIG_CMD_SPI /* SPI serial bus support */ + +/* +* MMC Configs +* */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR + +#define CONFIG_MMC + +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ +#define CONFIG_CONS_INDEX 1/* use UART0 : used by serial driver */ +#define CONFIG_BAUDRATE 115200 + +/*********************************************************** +* Command definition +***********************************************************/ + +#include <config_cmd_default.h> +#define CONFIG_CMD_BOOTZ +#undef CONFIG_CMD_IMLS + +/* Environment variables */ + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_LOADADDR 0x91000000/* loadaddr env var */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=uImage\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \ + "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs addtty; " \ + "bootm; " + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + "fi; " \ + "fi; " + +/* +* Miscellaneous configurable options +*/ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16/* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/*----------------------------------------------------------------------- +* Physical Memory Map +*/ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Low level init */ +#define CONFIG_SYS_DDR_CLKSEL 0 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 +#define CONFIG_SYS_MAIN_PWR_ON +
include/configs/ts4800.h line 170
Quoted 10 lines
include/configs/ts4800.h new file +10
-0+/*----------------------------------------------------------------------- +* Environment organization +*/ + +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#endif
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 1/2 ARM: ts4800: add basic board support
From: Lucile Quirion <[email protected]>
This commit adds basic support including:
MMC, Serial console, TS4800 watchdog
The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second stage bootloader.
---
Changes for v2:
- wtd: Use a struct to map register
- wtd: Remove register read, it is write only
- Remove unused "#define CONFIG_TS4800"
- Cosmetic change to return statement in board_mmc_init
- Rebase on v2015.07-rc3
arch/arm/Kconfig | 5 ++ board/technologic/ts4800/Kconfig | 15 ++++ board/technologic/ts4800/MAINTAINERS | 6 ++ board/technologic/ts4800/Makefile | 7 ++ board/technologic/ts4800/ts4800.c | 154 +++++++++++++++++++++++++++++++ board/technologic/ts4800/ts4800.h | 16 ++++ configs/ts4800_defconfig | 4 + include/configs/ts4800.h | 169 +++++++++++++++++++++++++++++++++++ 8 files changed, 376 insertions(+) create mode 100644 board/technologic/ts4800/Kconfig create mode 100644 board/technologic/ts4800/MAINTAINERS create mode 100644 board/technologic/ts4800/Makefile create mode 100644 board/technologic/ts4800/ts4800.c create mode 100644 board/technologic/ts4800/ts4800.h create mode 100644 configs/ts4800_defconfig create mode 100644 include/configs/ts4800.h
arch/arm/Kconfig +5 -0
@@ -654,6 +654,10 @@ config TARGET_SNOWBALL bool "Support snowball" select CPU_V7 +config TARGET_TS4800 + bool "Support TS4800" + select CPU_V7 + config TARGET_U8500_HREF bool "Support u8500_href" select CPU_V7
@@ -974,6 +978,7 @@ source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/trizepsiv/Kconfig" +source "board/technologic/ts4800/Kconfig" source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" source "board/vpac270/Kconfig"
board/technologic/ts4800/Kconfig new file +15 -0
@@ -0,0 +1,15 @@ +if TARGET_TS4800 + +config SYS_BOARD + default "ts4800" + +config SYS_VENDOR + default "technologic" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "ts4800" + +endif
board/technologic/ts4800/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +TS4800 BOARD +M: Lucile Quirion <[email protected]> +S: Maintained +F: board/ts/ts4800/ +F: include/configs/ts4800.h +F: configs/ts4800_defconfig
board/technologic/ts4800/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Savoir-faire Linux +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ts4800.o
board/technologic/ts4800/ts4800.c new file +154 -0
154 lines not on this page · raw message
board/technologic/ts4800/ts4800.h new file +16 -0
@@ -0,0 +1,16 @@ +/* +* (C) Copyright 2015 Savoir-faire Linux Inc. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef _TS4800_H +#define _TS4800_H + +#define TS4800_SYSCON_BASE 0xb0010000 + +struct ts4800_wtd_regs { +u16 feed; +}; + +#endif
configs/ts4800_defconfig new file +4 -0
@@ -0,0 +1,4 @@ +CONFIG_ARM=y +CONFIG_TARGET_TS4800=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set
include/configs/ts4800.h new file +169 -0
169 lines not on this page · raw message
Signature · 1 line
2.1.4
PATCH v2 2/2 ARM: ts4800: add ethernet support
This commit adds ethernet support to the TS4800. Note that the MAC address is not fused on this board and have to be read from FEC PALR PAUR registers (this is how the kernel provided by Technologic Systems does it).
---
Changes for v2:
- Reorder pads
arch/arm/include/asm/arch-mx5/iomux-mx51.h | 11 +++ board/technologic/ts4800/ts4800.c | 103 +++++++++++++++++++++++++++++ include/configs/ts4800.h | 16 +++++ 3 files changed, 130 insertions(+)
arch/arm/include/asm/arch-mx5/iomux-mx51.h +11 -0
@@ -184,8 +184,19 @@ enum {MX51_PAD_DISPB2_SER_DIO__GPIO3_6 =IOMUX_PAD (0x6c0 ,0x2c0 ,4 ,0x98c ,1 ,MX51_GPIO_PAD_CTRL ),MX51_PAD_DI1_PIN3__DI1_PIN3 =IOMUX_PAD (0x72c ,0x32c ,0 , __NA_,0 ,NO_PAD_CTRL ),MX51_PAD_DI1_PIN2__DI1_PIN2 =IOMUX_PAD (0x734 ,0x330 ,0 , __NA_,0 ,NO_PAD_CTRL ), +MX51_PAD_DI2_PIN2__FEC_MDC =IOMUX_PAD (0x74C ,0x344 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ),MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK =IOMUX_PAD (0x754 ,0x34c ,0 , __NA_,0 ,NO_PAD_CTRL ),MX51_PAD_DI_GP4__DI2_PIN15 =IOMUX_PAD (0x758 ,0x350 ,4 , __NA_,0 ,NO_PAD_CTRL ), +MX51_PAD_DISP2_DAT6__FEC_TDAT1 =IOMUX_PAD (0x774 ,0x36C ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT7__FEC_TDAT2 =IOMUX_PAD (0x778 ,0x370 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT8__FEC_TDAT3 =IOMUX_PAD (0x77C ,0x374 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT9__FEC_TX_EN =IOMUX_PAD (0x780 ,0x378 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT10__FEC_COL =IOMUX_PAD (0x784 ,0x37C ,2 ,0x94c ,0x1 ,MX51_PAD_CTRL_2 ), +MX51_PAD_DISP2_DAT11__FEC_RXCLK =IOMUX_PAD (0x788 ,0x380 ,2 ,0x968 ,0x1 ,MX51_PAD_CTRL_2 ), +MX51_PAD_DISP2_DAT12__FEC_RX_DV =IOMUX_PAD (0x78C ,0x384 ,2 ,0x96c ,0x1 ,MX51_PAD_CTRL_4 ), +MX51_PAD_DISP2_DAT13__FEC_TX_CLK =IOMUX_PAD (0x790 ,0x388 ,2 ,0x974 ,0x1 ,MX51_PAD_CTRL_4 ), +MX51_PAD_DISP2_DAT14__FEC_RDAT0 =IOMUX_PAD (0x794 ,0x38C ,2 ,0x958 ,0x1 ,MX51_PAD_CTRL_4 ), +MX51_PAD_DISP2_DAT15__FEC_TDAT0 =IOMUX_PAD (0x798 ,0x390 ,2 ,0x0 ,0 ,MX51_PAD_CTRL_5 ),MX51_PAD_SD1_CMD__SD1_CMD =IOMUX_PAD (0x79c ,0x394 ,0x10 , __NA_,0 ,MX51_SDHCI_PAD_CTRL ),MX51_PAD_SD1_CLK__SD1_CLK =IOMUX_PAD (0x7a0 ,0x398 ,0x10 , __NA_,0 ,MX51_SDHCI_PAD_CTRL |PAD_CTL_HYS ), MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
board/technologic/ts4800/ts4800.c +103 -0
127 lines not on this page · raw message
include/configs/ts4800.h +16 -0
@@ -73,6 +73,22 @@#define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +/* +* Eth Configs +*/ +#define CONFIG_MII +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ #define CONFIG_CONS_INDEX 1/* use UART0 : used by serial driver */
Signature · 1 line
2.1.4
PATCH v2 2/2 ARM: ts4800: add ethernet support
Quoted 11 lines · Damien Riegel
This commit adds ethernet support to the TS4800. Note that the MAC address is not fused on this board and have to be read from FEC PALR PAUR registers (this is how the kernel provided by Technologic Systems does it).
Signed-off-by Damien Riegel <[email protected]>Cc Stefano Babic <[email protected]>---
Changes for v2:
- Reorder pads
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 1/2 ARM: ts4800: add basic board support
In reply to Damien RiegelQuoted 5 lines · Damien Riegel
From: Lucile Quirion <[email protected]>
This commit adds basic support including:
MMC, Serial console, TS4800 watchdog
Quoted 7 lines
The config use
CONFIG_SKIP_LOWLEVEL_INITas U-boot is used as a second stage bootloader.Signed-off-by Lucile Quirion <[email protected]>Signed-off-by Damien Riegel <[email protected]>Cc Stefano Babic <[email protected]>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
-----
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
PATCH 2/2 ARM: ts4800: add ethernet support
In reply to Damien RiegelThis commit adds ethernet support to the TS4800. Note that the MAC address is not fused on this board and have to be read from FEC PALR PAUR registers (this is how the kernel provided by Technologic Systems does it).
--- arch/arm/include/asm/arch-mx5/iomux-mx51.h | 11 +++ board/technologic/ts4800/ts4800.c | 104 +++++++++++++++++++++++++++++ include/configs/ts4800.h | 17 +++++ 3 files changed, 132 insertions(+)
arch/arm/include/asm/arch-mx5/iomux-mx51.h +11 -0
@@ -184,8 +184,15 @@ enum {MX51_PAD_DISPB2_SER_DIO__GPIO3_6 =IOMUX_PAD (0x6c0 ,0x2c0 ,4 ,0x98c ,1 ,MX51_GPIO_PAD_CTRL ),MX51_PAD_DI1_PIN3__DI1_PIN3 =IOMUX_PAD (0x72c ,0x32c ,0 , __NA_,0 ,NO_PAD_CTRL ),MX51_PAD_DI1_PIN2__DI1_PIN2 =IOMUX_PAD (0x734 ,0x330 ,0 , __NA_,0 ,NO_PAD_CTRL ), +MX51_PAD_DI2_PIN2__FEC_MDC =IOMUX_PAD (0x74C ,0x344 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ),MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK =IOMUX_PAD (0x754 ,0x34c ,0 , __NA_,0 ,NO_PAD_CTRL ),MX51_PAD_DI_GP4__DI2_PIN15 =IOMUX_PAD (0x758 ,0x350 ,4 , __NA_,0 ,NO_PAD_CTRL ), +MX51_PAD_DISP2_DAT6__FEC_TDAT1 =IOMUX_PAD (0x774 ,0x36C ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT7__FEC_TDAT2 =IOMUX_PAD (0x778 ,0x370 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT8__FEC_TDAT3 =IOMUX_PAD (0x77C ,0x374 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT9__FEC_TX_EN =IOMUX_PAD (0x780 ,0x378 ,2 , __NA_,0 ,MX51_PAD_CTRL_5 ), +MX51_PAD_DISP2_DAT12__FEC_RX_DV =IOMUX_PAD (0x78C ,0x384 ,2 ,0x96c ,0x1 ,MX51_PAD_CTRL_4 ), +MX51_PAD_DISP2_DAT13__FEC_TX_CLK =IOMUX_PAD (0x790 ,0x388 ,2 ,0x974 ,0x1 ,MX51_PAD_CTRL_4 ),MX51_PAD_SD1_CMD__SD1_CMD =IOMUX_PAD (0x79c ,0x394 ,0x10 , __NA_,0 ,MX51_SDHCI_PAD_CTRL ),MX51_PAD_SD1_CLK__SD1_CLK =IOMUX_PAD (0x7a0 ,0x398 ,0x10 , __NA_,0 ,MX51_SDHCI_PAD_CTRL |PAD_CTL_HYS ), MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
@@ -204,6 +211,10 @@ enum {MX51_PAD_GPIO1_2__GPIO1_2 =IOMUX_PAD (0x7d4 ,0x3cc ,0 , __NA_,0 ,MX51_GPIO_PAD_CTRL ),MX51_PAD_GPIO1_2__PWM1_PWMO =IOMUX_PAD (0x7d4 ,0x3cc ,1 , __NA_,0 ,NO_PAD_CTRL ),MX51_PAD_GPIO1_3__GPIO1_3 =IOMUX_PAD (0x7d8 ,0x3d0 ,0 , __NA_,0 ,MX51_GPIO_PAD_CTRL ), +MX51_PAD_DISP2_DAT10__FEC_COL =IOMUX_PAD (0x784 ,0x37C ,2 ,0x94c ,0x1 ,MX51_PAD_CTRL_2 ), +MX51_PAD_DISP2_DAT11__FEC_RXCLK =IOMUX_PAD (0x788 ,0x380 ,2 ,0x968 ,0x1 ,MX51_PAD_CTRL_2 ), +MX51_PAD_DISP2_DAT14__FEC_RDAT0 =IOMUX_PAD (0x794 ,0x38C ,2 ,0x958 ,0x1 ,MX51_PAD_CTRL_4 ), +MX51_PAD_DISP2_DAT15__FEC_TDAT0 =IOMUX_PAD (0x798 ,0x390 ,2 ,0x0 ,0 ,MX51_PAD_CTRL_5 ),MX51_PAD_GPIO1_5__GPIO1_5 =IOMUX_PAD (0x808 ,0x3dc ,0 , __NA_,0 ,MX51_GPIO_PAD_CTRL ),MX51_PAD_GPIO1_6__GPIO1_6 =IOMUX_PAD (0x80c ,0x3e0 ,0 , __NA_,0 ,MX51_GPIO_PAD_CTRL ), MX51_PAD_GPIO1_7__GPIO1_7 = IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
board/technologic/ts4800/ts4800.c +104 -0
128 lines not on this page · raw message
include/configs/ts4800.h +17 -0
@@ -73,6 +73,23 @@#define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +/* +* Eth Configs +*/ +#define CONFIG_MII +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ #define CONFIG_CONS_INDEX 1/* use UART0 : used by serial driver */
Signature · 1 line
2.1.4