arm: tegra: apalis/colibri_t30: video: add display driver
cover arm: tegra: apalis/colibri_t30: video: add display driver
On popular request this series integrates the display driver from T20 to work on T30 as well and enables it for our Apalis/Colibri T30 computer/system on modules. Enjoy.
Marcel Ziswiler (5):
arm: tegra20: video: rename display header ifdef gating
arm: tegra20: video: ifdef gate hard-coded ugly Tegra20 pin muxing
arm: tegra30: video: integrate display driver for t30
colibri_t30: enable display driver
apalis_t30: enable display driver
arch/arm/dts/tegra30-apalis.dts | 29 ++ arch/arm/dts/tegra30-colibri.dts | 29 ++ arch/arm/dts/tegra30.dtsi | 104 ++++++ arch/arm/include/asm/arch-tegra20/display.h | 6 +- arch/arm/include/asm/arch-tegra30/display.h | 13 + arch/arm/include/asm/arch-tegra30/pwm.h | 14 + arch/arm/mach-tegra/tegra30/Makefile | 6 +- arch/arm/mach-tegra/tegra30/display.c | 394 +++++++++++++++++++++ .../toradex/apalis_t30/pinmux-config-apalis_t30.h | 9 +- .../colibri_t30/pinmux-config-colibri_t30.h | 8 +- drivers/video/tegra.c | 2 + include/configs/apalis_t30.h | 10 + include/configs/colibri_t30.h | 10 + include/configs/tegra30-common.h | 3 + 14 files changed, 625 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/arch-tegra30/display.h create mode 100644 arch/arm/include/asm/arch-tegra30/pwm.h create mode 100644 arch/arm/mach-tegra/tegra30/display.c
Signature · 1 line
2.4.3
PATCH 1/5 arm: tegra20: video: rename display header ifdef gating
As a preparatory step make sure the Tegra20 display header file is properly ifdef gated with its name.
---
arch/arm/include/asm/arch-tegra20/display.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-tegra20/display.h +3 -3
@@ -5,8 +5,8 @@* SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __ASM_ARCH_TEGRA_DISPLAY_H -#define __ASM_ARCH_TEGRA_DISPLAY_H +#ifndef __ASM_ARCH_TEGRA20_DISPLAY_H +#define __ASM_ARCH_TEGRA20_DISPLAY_H#include <asm/arch-tegra/dc.h> #include <fdtdec.h>
@@ -134,4 +134,4 @@ int tegra_lcd_check_next_stage(const void *blob, int wait);*/ void tegra_lcd_early_init (const void *blob); -#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/ +#endif /*__ASM_ARCH_TEGRA20_DISPLAY_H*/
Signature · 1 line
2.4.3
PATCH 1/5 arm: tegra20: video: rename display header ifdef gating
Quoted 8 lines · Marcel Ziswiler
As a preparatory step make sure the Tegra20 display header file is properly ifdef gated with its name.
Signed-off-by Marcel Ziswiler <[email protected]>---
arch/arm/include/asm/arch-tegra20/display.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
PATCH 2/5 arm: tegra20: video: ifdef gate hard-coded ugly Tegra20 pin muxing
In reply to Marcel ZiswilerAs a preparatory step make sure the display driver is buildable for Tegra30 as well by ifdef gating any hard-coded ugly Tegra20 pin muxing stuff.
---
drivers/video/tegra.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/video/tegra.c +2 -0
@@ -215,8 +215,10 @@ static int handle_stage(const void *blob)break ;case STAGE_PWM :/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */ +#ifdef CONFIG_MACH_T20 pinmux_set_func (PMUX_PINGRP_GPU ,PMUX_FUNC_PWM );pinmux_tristate_disable (PMUX_PINGRP_GPU ); +#endif pwm_enable (config.pwm_channel,32768 ,0xdf ,1 );break ;
Signature · 1 line
2.4.3
PATCH 2/5 arm: tegra20: video: ifdef gate hard-coded ugly Tegra20 pin muxing
drivers/video/tegra.c static int handle_stage(const void *blob) · line 218
Quoted 11 lines · Marcel Ziswiler
As a preparatory step make sure the display driver is buildable for Tegra30 as well by ifdef gating any hard-coded ugly Tegra20 pin muxing stuff.
drivers/video/tegra.c +1
-0@@ -215,8 +215,10 @@ static int handle_stage(const void *blob)break ;case STAGE_PWM :/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */ +#ifdef CONFIG_MACH_T20
That option doesn't seem to exist, except in arch/arm/include/asm/mach-types.h where I think it's the name of an unrelated board. Do you mean CONFIG_TEGRA20, as defined by arch/arm/mach-tegra/tegra20/Kconfig?
PATCH 3/5 arm: tegra30: video: integrate display driver for t30
In reply to Marcel ZiswilerOn popular request make the display driver from T20 work on T30 as well. Turned out to be quite straight forward. However a few notes about some things encountered during porting: Of course the T30 device tree was completely missing host1x as well as PWM support but it turns out this can simply be copied from T20 supplementing some tegra30- compatible nodes here and there while comparing it with the Linux device tree includes.
---
The older Chromium U-Boot 2011.06 which to my knowledge was the only prior attempt at enabling a display driver for T30 for whatever reason got some clocking stuff mixed up. Turns out at least for a single display controller T20 and T30 can be clocked quite similar.
arch/arm/dts/tegra30.dtsi | 104 ++++++++ arch/arm/include/asm/arch-tegra30/display.h | 13 + arch/arm/include/asm/arch-tegra30/pwm.h | 14 + arch/arm/mach-tegra/tegra30/Makefile | 6 +- arch/arm/mach-tegra/tegra30/display.c | 394 ++++++++++++++++++++++++++++ include/configs/tegra30-common.h | 3 + 6 files changed, 533 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-tegra30/display.h create mode 100644 arch/arm/include/asm/arch-tegra30/pwm.h create mode 100644 arch/arm/mach-tegra/tegra30/display.c
arch/arm/dts/tegra30.dtsi +104 -0
@@ -8,6 +8,104 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; + host1x { + compatible = "nvidia,tegra30-host1x", "simple-bus"; + reg = <0x50000000 0x00024000>; + interrupts = <0 65 0x04 /* mpcore syncpt */ + 0 67 0x04>; /* mpcore general */ + status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x54000000 0x54000000 0x04000000>; + + /* video-encoding/decoding */ + mpe { + reg = <0x54040000 0x00040000>; + interrupts = <0 68 0x04>; + status = "disabled"; + }; + + /* video input */ + vi { + reg = <0x54080000 0x00040000>; + interrupts = <0 69 0x04>; + status = "disabled"; + }; + + /* EPP */ + epp { + reg = <0x540c0000 0x00040000>; + interrupts = <0 70 0x04>; + status = "disabled"; + }; + + /* ISP */ + isp { + reg = <0x54100000 0x00040000>; + interrupts = <0 71 0x04>; + status = "disabled"; + }; + + /* 2D engine */ + gr2d { + reg = <0x54140000 0x00040000>; + interrupts = <0 72 0x04>; + status = "disabled"; + }; + + /* 3D engine */ + gr3d { + reg = <0x54180000 0x00040000>; + status = "disabled"; + }; + + /* display controllers */ + dc at 54200000 { + compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc"; + reg = <0x54200000 0x00040000>; + interrupts = <0 73 0x04>; + status = "disabled"; + + rgb { + status = "disabled"; + }; + }; + + dc at 54240000 { + compatible = "nvidia,tegra30-dc"; + reg = <0x54240000 0x00040000>; + interrupts = <0 74 0x04>; + status = "disabled"; + + rgb { + status = "disabled"; + }; + }; + + /* outputs */ + hdmi { + compatible = "nvidia,tegra30-hdmi"; + reg = <0x54280000 0x00040000>; + interrupts = <0 75 0x04>; + status = "disabled"; + }; + + tvo { + compatible = "nvidia,tegra30-tvo"; + reg = <0x542c0000 0x00040000>; + interrupts = <0 76 0x04>; + status = "disabled"; + }; + + dsi { + compatible = "nvidia,tegra30-dsi"; + reg = <0x54300000 0x00040000>; + status = "disabled"; + }; + }; + intc: interrupt-controller at 50041000 { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000
@@ -271,6 +369,12 @@ status = "disabled"; }; + pwm: pwm@7000a000 { + compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; + #pwm-cells = <2>; + }; + spi at 7000d400 { compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; reg = <0x7000d400 0x200>;
arch/arm/include/asm/arch-tegra30/display.h new file +13 -0
@@ -0,0 +1,13 @@ +/* +* (C) Copyright 2010 +* NVIDIA Corporation <www.nvidia.com> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __ASM_ARCH_TEGRA30_DISPLAY_H +#define __ASM_ARCH_TEGRA30_DISPLAY_H + +#include <asm/arch-tegra20/display.h> + +#endif /* __ASM_ARCH_TEGRA30_DISPLAY_H */
arch/arm/include/asm/arch-tegra30/pwm.h new file +14 -0
@@ -0,0 +1,14 @@ +/* +* Tegra pulse width frequency modulator definitions +* +* Copyright (c) 2011 The Chromium OS Authors. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __ASM_ARCH_TEGRA30_PWM_H +#define __ASM_ARCH_TEGRA30_PWM_H + +#include <asm/arch-tegra/pwm.h> + +#endif /* __ASM_ARCH_TEGRA30_PWM_H */
arch/arm/mach-tegra/tegra30/Makefile +5 -1
@@ -14,6 +14,10 @@ # along with this program. If not, see <http://www.gnu.org/licenses/>. # -obj-$(CONFIG_SPL_BUILD) += cpu.o +ifdef CONFIG_SPL_BUILD +obj-y += cpu.o +else +obj-$(CONFIG_VIDEO_TEGRA) += display.o +endif obj-y += clock.o funcmux.o pinmux.o
arch/arm/mach-tegra/tegra30/display.c new file +394 -0
394 lines not on this page · raw message
include/configs/tegra30-common.h +3 -0
@@ -70,6 +70,9 @@#define CONFIG_SYS_SPL_MALLOC_START 0x80090000#define CONFIG_SPL_STACK 0x800ffffc +/* Align LCD to 1MB boundary */ +#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE +/* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
Signature · 1 line
2.4.3
PATCH 3/5 arm: tegra30: video: integrate display driver for t30
Quoted 7 lines · Marcel Ziswiler
On popular request make the display driver from T20 work on T30 as well. Turned out to be quite straight forward. However a few notes about some things encountered during porting: Of course the T30 device tree was completely missing host1x as well as PWM support but it turns out this can simply be copied from T20 supplementing some tegra30- compatible nodes here and there while comparing it with the Linux device tree includes.
Hopefully the process was to copy the Linux Tegra30 DT verbatim? That's far more likely to yield a correct DT than copying the Tegra20 DT to Tegra30 and then patching it until it works. If this DT doesn't exactly match the Linux kernel, this needs to be fixed.
arch/arm/mach-tegra/tegra30/Makefile line 18
Quoted 5 lines
arch/arm/mach-tegra/tegra30/Makefile +2
-1-obj-$(CONFIG_SPL_BUILD) += cpu.o +ifdef CONFIG_SPL_BUILD +obj-y += cpu.o
I don't think there's any need to edit the cpu.o line. While you can move it into the ifdef like that, I don't see a need.
arch/arm/mach-tegra/tegra30/display.c
Quoted 1 line
arch/arm/mach-tegra/tegra30/display.c +0
-0
I didn't review this file in detail; I'll leave that to Thierry since he knows the display HW.
However, one question: Is this file a complete cut/paste of tegra20/display.c, or does it just replace some parts of it? Hopefully this patch doesn't simply duplicate the whole driver?
PATCH 4/5 colibri_t30: enable display driver
In reply to Marcel ZiswilerOn popular request enable the display driver on Colibri T30. A few notes about some things encountered during porting: While analogue VGA (e.g. via the on-carrier RAMDAC) worked just fine from the beginning the EDT display flickered like crazy which turned out to be a pin muxing issue. Unfortunately the PWM pin muxing wasn't any good neither which made that display stay dark.
---
arch/arm/dts/tegra30-colibri.dts | 29 ++++++++++++++++++++++ .../colibri_t30/pinmux-config-colibri_t30.h | 8 +++--- include/configs/colibri_t30.h | 10 ++++++++ 3 files changed, 43 insertions(+), 4 deletions(-)
arch/arm/dts/tegra30-colibri.dts +29 -0
@@ -22,6 +22,17 @@ usb2 = "/usb at 7d008000"; }; + host1x { + status = "okay"; + dc at 54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x40000000>;
@@ -93,4 +104,22 @@ /* USBH_PEN */ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; }; + + lcd_panel: panel { + clock = <25175000>; + xres = <640>; + yres = <480>; + left-margin = <48>; /* horizontal back porch */ + right-margin = <16>; /* horizontal front porch */ + hsync-len = <96>; + lower-margin = <11>; /* vertical front porch */ + upper-margin = <31>; /* vertical back porch */ + vsync-len = <2>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 0>; + nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + nvidia,panel-timings = <0 0 0 0>; + }; };
board/toradex/colibri_t30/pinmux-config-colibri_t30.h +4 -4
@@ -1,5 +1,5 @@/* -* Copyright (c) 2013-2014, Stefan Agner +* Copyright (c) 2013-2015, Stefan Agner * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License,
@@ -80,7 +80,7 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = {DEFAULT_PINMUX (SDMMC3_DAT0_PB7 ,SDMMC3 ,UP ,NORMAL ,INPUT ),DEFAULT_PINMUX (SDMMC3_DAT1_PB6 ,SDMMC3 ,UP ,NORMAL ,INPUT ),DEFAULT_PINMUX (SDMMC3_DAT2_PB5 ,SDMMC3 ,UP ,NORMAL ,INPUT ), -DEFAULT_PINMUX (SDMMC3_DAT3_PB4 ,SDMMC3 ,UP ,NORMAL ,INPUT ), +DEFAULT_PINMUX (SDMMC3_DAT3_PB4 ,PWM0 ,NORMAL ,NORMAL ,OUTPUT ),DEFAULT_PINMUX (SDMMC3_DAT6_PD3 ,RSVD1 ,NORMAL ,NORMAL ,INPUT ), DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD1, NORMAL, NORMAL, INPUT),
@@ -176,7 +176,7 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = {DEFAULT_PINMUX (LCD_D22_PM6 ,DISPLAYA ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (LCD_D23_PM7 ,DISPLAYA ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (LCD_CS1_N_PW0 ,DISPLAYA ,NORMAL ,NORMAL ,INPUT ), -DEFAULT_PINMUX (LCD_M1_PW1 ,DISPLAYA ,NORMAL ,NORMAL ,INPUT ), +DEFAULT_PINMUX (LCD_M1_PW1 ,DISPLAYA ,NORMAL ,TRISTATE ,OUTPUT ),DEFAULT_PINMUX (LCD_DC1_PD2 ,DISPLAYA ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (CRT_HSYNC_PV6 ,CRT ,NORMAL ,NORMAL ,OUTPUT ), DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, NORMAL, OUTPUT),
@@ -212,7 +212,7 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = {DEFAULT_PINMUX (CLK3_REQ_PEE1 ,DEV3 ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (GMI_WP_N_PC7 ,GMI ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (GMI_CS2_N_PK3 ,RSVD1 ,UP ,NORMAL ,INPUT ),/* EN_VDD_BL1 */ -DEFAULT_PINMUX (GMI_AD8_PH0 ,PWM0 ,NORMAL ,NORMAL ,OUTPUT ),/* LCD1_BL_PWM */ +DEFAULT_PINMUX (GMI_AD8_PH0 ,RSVD2 ,NORMAL ,NORMAL ,INPUT ),DEFAULT_PINMUX (GMI_AD10_PH2 ,NAND ,NORMAL ,NORMAL ,OUTPUT ),/* LCD1_BL_EN */ DEFAULT_PINMUX (GMI_A16_PJ7 ,UARTD ,NORMAL ,NORMAL ,INPUT ), DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT),
include/configs/colibri_t30.h +10 -0
@@ -57,6 +57,16 @@#define CONFIG_TFTP_BLOCKSIZE 16384#define CONFIG_TFTP_TSIZE +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 +#define CONFIG_CMD_BMP +#define CONFIG_LCD_LOGO +/* Miscellaneous commands */ #define CONFIG_FAT_WRITE
Signature · 1 line
2.4.3
PATCH 4/5 colibri_t30: enable display driver
Quoted 7 lines · Marcel Ziswiler
On popular request enable the display driver on Colibri T30. A few notes about some things encountered during porting: While analogue VGA (e.g. via the on-carrier RAMDAC) worked just fine from the beginning the EDT display flickered like crazy which turned out to be a pin muxing issue. Unfortunately the PWM pin muxing wasn't any good neither which made that display stay dark.
Quoted 7 lines
Signed-off-by Marcel Ziswiler <[email protected]>---
arch/arm/dts/tegra30-colibri.dts | 29 ++++++++++++++++++++++ .../colibri_t30/pinmux-config-colibri_t30.h | 8 +++--- include/configs/colibri_t30.h | 10 ++++++++ 3 files changed, 43 insertions(+), 4 deletions(-)
PATCH 5/5 apalis_t30: enable display driver
In reply to Marcel ZiswilerEnable the display driver on Apalis T30. Unfortunately the PWM pin muxing wasn't any good neither which made that display stay dark.
---
arch/arm/dts/tegra30-apalis.dts | 29 ++++++++++++++++++++++ .../toradex/apalis_t30/pinmux-config-apalis_t30.h | 9 ++++--- include/configs/apalis_t30.h | 10 ++++++++ 3 files changed, 44 insertions(+), 4 deletions(-)
arch/arm/dts/tegra30-apalis.dts +29 -0
@@ -27,6 +27,17 @@ usb2 = "/usb at 7d008000"; }; + host1x { + status = "okay"; + dc at 54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x40000000>;
@@ -287,6 +298,24 @@ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>; }; + lcd_panel: panel { + clock = <25175000>; + xres = <640>; + yres = <480>; + left-margin = <48>; /* horizontal back porch */ + right-margin = <16>; /* horizontal front porch */ + hsync-len = <96>; + lower-margin = <11>; /* vertical front porch */ + upper-margin = <31>; /* vertical back porch */ + vsync-len = <2>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 0>; + nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + nvidia,panel-timings = <0 0 0 0>; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>;
board/toradex/apalis_t30/pinmux-config-apalis_t30.h +5 -4
@@ -1,5 +1,5 @@/* -* Copyright (c) 2014, Marcel Ziswiler +* Copyright (c) 2014-2015, Marcel Ziswiler * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License,
@@ -204,7 +204,8 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = {DEFAULT_PINMUX (UART2_CTS_N_PJ5 ,UARTB ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX (UART3_TXD_PW6 ,UARTC ,NORMAL ,NORMAL ,OUTPUT ),DEFAULT_PINMUX (UART3_RXD_PW7 ,UARTC ,NORMAL ,NORMAL ,INPUT ), -DEFAULT_PINMUX (UART3_CTS_N_PA1 ,UARTC ,NORMAL ,NORMAL ,INPUT ), +/* disable BKL1_PWM_EN# (e.g. PMIC PWM backlight enable) for now */ +DEFAULT_PINMUX (UART3_CTS_N_PA1 ,RSVD1 ,UP ,NORMAL ,OUTPUT ),DEFAULT_PINMUX (UART3_RTS_N_PC0 ,PWM0 ,NORMAL ,NORMAL ,OUTPUT ),DEFAULT_PINMUX (PU0 ,RSVD1 ,DOWN ,TRISTATE ,OUTPUT ), DEFAULT_PINMUX(PU1, RSVD1, DOWN, TRISTATE, OUTPUT),
@@ -221,7 +222,7 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = {DEFAULT_PINMUX (CLK3_REQ_PEE1 ,DEV3 ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX (GMI_WP_N_PC7 ,GMI ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX (GMI_CS2_N_PK3 ,RSVD1 ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ -DEFAULT_PINMUX (GMI_AD8_PH0 ,PWM0 ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ +DEFAULT_PINMUX (GMI_AD8_PH0 ,RSVD1 ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX (GMI_AD10_PH2 ,NAND ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX (GMI_A16_PJ7 ,UARTD ,DOWN ,TRISTATE ,OUTPUT ),/* NC */ DEFAULT_PINMUX(GMI_A17_PB0, UARTD, DOWN, TRISTATE, OUTPUT), /* NC */
@@ -331,7 +332,7 @@ static struct pmux_pingrp_config unused_pins_lowpower[] = {DEFAULT_PINMUX (GMI_AD5_PG5 ,NAND ,DOWN ,TRISTATE ,OUTPUT ),DEFAULT_PINMUX (GMI_AD6_PG6 ,NAND ,DOWN ,TRISTATE ,OUTPUT ),DEFAULT_PINMUX (GMI_AD7_PG7 ,NAND ,DOWN ,TRISTATE ,OUTPUT ), -DEFAULT_PINMUX (GMI_AD9_PH1 ,PWM1 ,DOWN ,TRISTATE ,OUTPUT ), +DEFAULT_PINMUX (GMI_AD9_PH1 ,RSVD1 ,DOWN ,TRISTATE ,OUTPUT ),DEFAULT_PINMUX (GMI_AD11_PH3 ,NAND ,DOWN ,TRISTATE ,OUTPUT ),DEFAULT_PINMUX (GMI_AD13_PH5 ,NAND ,DOWN ,TRISTATE ,OUTPUT ), DEFAULT_PINMUX(GMI_WR_N_PI0, NAND, DOWN, TRISTATE, OUTPUT),
include/configs/apalis_t30.h +10 -0
@@ -64,6 +64,16 @@#define CONFIG_TFTP_BLOCKSIZE 16384#define CONFIG_TFTP_TSIZE +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 +#define CONFIG_CMD_BMP +#define CONFIG_LCD_LOGO +/* Miscellaneous commands */ #define CONFIG_FAT_WRITE
Signature · 1 line
2.4.3
PATCH 5/5 apalis_t30: enable display driver
Quoted 10 lines · Marcel Ziswiler
Enable the display driver on Apalis T30. Unfortunately the PWM pin muxing wasn't any good neither which made that display stay dark.
Signed-off-by Marcel Ziswiler <[email protected]>---
arch/arm/dts/tegra30-apalis.dts | 29 ++++++++++++++++++++++ .../toradex/apalis_t30/pinmux-config-apalis_t30.h | 9 ++++--- include/configs/apalis_t30.h | 10 ++++++++ 3 files changed, 44 insertions(+), 4 deletions(-)