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arm, imx6: aristainetos board updates

PATCH New Heiko Schocher 2 participants 6 messages Aug 11, 2015 – Aug 24, 2015

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#0 lore raw

cover arm, imx6: aristainetos board updates

This patchserie updates the aristainetos board:
- some small fixes for the aristainetos and aristainetos2 board
- there is a new hardware version for the aristaineos2 board, called 2b, add it
- as the display driver is on the 2b version on another spi chipselect, make this configurable in the display driver.

Heiko Schocher (3):
arm, imx6: aristainetos board updates
arm, imx6: add aristainetos 2b board version
video, lg4573: make spi bus and cs configurable

 arch/arm/Kconfig                      |  4 +++
 board/aristainetos/Kconfig            | 13 ++++++++
 board/aristainetos/aristainetos-v2.c  | 57 ++++++++++++++++++++++++++++----
 board/aristainetos/aristainetos.c     | 19 +++++------
 drivers/video/lg4573.c                |  3 +-
 include/configs/aristainetos-common.h |  4 ---
 include/configs/aristainetos.h        |  6 +++-
 include/configs/aristainetos2.h       |  8 ++++-
 include/configs/aristainetos2b.h      | 62 +++++++++++++++++++++++++++++++++++
 9 files changed, 151 insertions(+), 25 deletions(-)
 create mode 100644 include/configs/aristainetos2b.h
Signature · 1 line
2.1.0
#1 lore raw

PATCH 1/3 arm, imx6: aristainetos board updates

some small updates for the aristainetos boards:
- fix display timings for the aristainetos board
- fix pinmux for the aristainetos board
- fix pinmux for the aristainetos2 board
- fix default environment

---

 board/aristainetos/aristainetos-v2.c  |  1 -
 board/aristainetos/aristainetos.c     | 15 ++++++---------
 include/configs/aristainetos-common.h |  2 +-
 3 files changed, 7 insertions(+), 11 deletions(-)
board/aristainetos/aristainetos-v2.c +0 -1
index 7a44031..36a4efb 100644
@@ -191,7 +191,6 @@ static iomux_v3_cfg_t const display_pads[] = {
 	MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
 	MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02,
 	MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03,
-	MX6_PAD_DI0_PIN4__GPIO4_IO20,
 	MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
 	MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
 	MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
board/aristainetos/aristainetos.c +6 -9
index 0c39ee6..45ca5da 100644
@@ -163,14 +163,14 @@ struct display_info_t const displays[] = {
 			.refresh        = 60,
 			.xres           = 800,
 			.yres           = 480,
-			.pixclock       = 33246,
+			.pixclock       = 30066,
 			.left_margin    = 88,
 			.right_margin   = 88,
-			.upper_margin   = 10,
-			.lower_margin   = 10,
+			.upper_margin   = 20,
+			.lower_margin   = 20,
 			.hsync_len      = 80,
-			.vsync_len      = 25,
-			.sync           = 0,
+			.vsync_len      = 5,
+			.sync           = FB_SYNC_EXT,
 			.vmode          = FB_VMODE_NONINTERLACED
 		}
 	}
@@ -183,7 +183,7 @@ struct display_info_t const displays[] = {
 		.enable	= enable_spi_display,
 		.mode	= {
 			.name           = "lg4573",
-			.refresh        = 60,
+			.refresh        = 57,
 			.xres           = 480,
 			.yres           = 800,
 			.pixclock       = 37037,
@@ -214,9 +214,6 @@ iomux_v3_cfg_t nfc_pads[] = {
 	MX6_PAD_NANDF_WP_B__NAND_WP_B	| MUX_PAD_CTRL(NO_PAD_CTRL),
 	MX6_PAD_NANDF_RB0__NAND_READY_B	| MUX_PAD_CTRL(NO_PAD_CTRL),
 	MX6_PAD_NANDF_CS0__NAND_CE0_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	MX6_PAD_NANDF_CS1__NAND_CE1_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	MX6_PAD_NANDF_CS2__NAND_CE2_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	MX6_PAD_NANDF_CS3__NAND_CE3_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
 	MX6_PAD_SD4_CMD__NAND_RE_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
 	MX6_PAD_SD4_CLK__NAND_WE_B		| MUX_PAD_CTRL(NO_PAD_CTRL),
 	MX6_PAD_NANDF_D0__NAND_DATA00		| MUX_PAD_CTRL(NO_PAD_CTRL),
include/configs/aristainetos-common.h +1 -1
index 4a5d4fb..30d903e 100644
@@ -106,7 +106,7 @@
 	"ubiboot=echo Booting from ubi ...; " \
 		"run ubiargs addmtd addmisc set_fit_default;" \
 		"bootm ${fit_addr_r}\0" \
-	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
+	"ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
 		"ubifsload ${fit_addr_r} /boot/system.itb; " \
 		"imi ${fit_addr_r}\0 " \
 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
Signature · 1 line
2.1.0
#2 lore raw

PATCH 1/3 arm, imx6: aristainetos board updates

Hi Heiko,

Quoted 9 lines · Heiko Schocher

some small updates for the aristainetos boards:
- fix display timings for the aristainetos board
- fix pinmux for the aristainetos board
- fix pinmux for the aristainetos2 board
- fix default environment

---

Patch 1/3 is ok.

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH 2/3 arm, imx6: add aristainetos 2b board version

In reply to Heiko Schocher

there is a 2b board version of the aristainetos2
board. Differences to the v2:

- spi cs for the nor flash and display controller
changed
- some pinmux changes
- LED gpio settings changed

---

 arch/arm/Kconfig                      |  4 +++
 board/aristainetos/Kconfig            | 13 ++++++++
 board/aristainetos/aristainetos-v2.c  | 56 ++++++++++++++++++++++++++++----
 board/aristainetos/aristainetos.c     |  4 +--
 include/configs/aristainetos-common.h |  4 ---
 include/configs/aristainetos.h        |  6 +++-
 include/configs/aristainetos2.h       |  6 +++-
 include/configs/aristainetos2b.h      | 60 +++++++++++++++++++++++++++++++++++
 8 files changed, 139 insertions(+), 14 deletions(-)
 create mode 100644 include/configs/aristainetos2b.h
arch/arm/Kconfig +4 -0
index 8b8269f..a318c63 100644
@@ -545,6 +545,10 @@ config TARGET_ARISTAINETOS2
 	bool "Support aristainetos2"
 	select CPU_V7
 
+config TARGET_ARISTAINETOS2B
+	bool "Support aristainetos2-revB"
+	select CPU_V7
+
 config TARGET_MX6QARM2
 	bool "Support mx6qarm2"
 	select CPU_V7
board/aristainetos/Kconfig +13 -0
index 500b665..e987f38 100644
@@ -23,3 +23,16 @@ config SYS_CONFIG_NAME
 	default "aristainetos2"
 
 endif
+
+if TARGET_ARISTAINETOS2B
+
+config SYS_BOARD
+	default "aristainetos"
+
+config SYS_SOC
+	default "mx6"
+
+config SYS_CONFIG_NAME
+	default "aristainetos2b"
+
+endif
board/aristainetos/aristainetos-v2.c +50 -6

135 lines not on this page · raw message

board/aristainetos/aristainetos.c +2 -2
index 45ca5da..e95ec81 100644
@@ -60,7 +60,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if (CONFIG_SYS_BOARD_VERSION == 1)
 #include "./aristainetos-v1.c"
-#elif (CONFIG_SYS_BOARD_VERSION == 2)
+#elif ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3))
 #include "./aristainetos-v2.c"
 #endif
 
@@ -174,7 +174,7 @@ struct display_info_t const displays[] = {
 			.vmode          = FB_VMODE_NONINTERLACED
 		}
 	}
-#if (CONFIG_SYS_BOARD_VERSION == 2)
+#if ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3))
 	, {
 		.bus	= -1,
 		.addr	= 0,
include/configs/aristainetos-common.h +0 -4
index 30d903e..20afdd6 100644
@@ -45,7 +45,6 @@
 #define CONFIG_SPI_FLASH_MTD
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_MXC_SPI
-#define CONFIG_SF_DEFAULT_BUS		3
 #define CONFIG_SF_DEFAULT_SPEED		20000000
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
@@ -106,9 +105,6 @@
 	"ubiboot=echo Booting from ubi ...; " \
 		"run ubiargs addmtd addmisc set_fit_default;" \
 		"bootm ${fit_addr_r}\0" \
-	"ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
-		"ubifsload ${fit_addr_r} /boot/system.itb; " \
-		"imi ${fit_addr_r}\0 " \
 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
 		"root=/dev/ram rw\0 " \
 	"rescueboot=echo Booting rescue system from NOR ...; " \
include/configs/aristainetos.h +5 -1
index 258866a..be93deb 100644
@@ -22,6 +22,7 @@
 
 #define CONFIG_FEC_XCV_TYPE		RMII
 
+#define CONFIG_SF_DEFAULT_BUS		3
 #define CONFIG_SF_DEFAULT_CS		0
 
 #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
@@ -32,7 +33,10 @@
 	"addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \
 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
 	"ubiargs=setenv bootargs console=${console},${baudrate} " \
-		"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 "
+		"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \
+	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
+		"ubifsload ${fit_addr_r} /boot/system.itb; " \
+		"imi ${fit_addr_r}\0 "
 
 #define ARISTAINETOS_USB_OTG_PWR	IMX_GPIO_NR(4, 15)
 #define ARISTAINETOS_USB_H1_PWR		IMX_GPIO_NR(3, 31)
include/configs/aristainetos2.h +5 -1
index faeafe2d..cdbbcc0 100644
@@ -24,6 +24,7 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_PHY_MICREL_KSZ9031
 
+#define CONFIG_SF_DEFAULT_BUS		3
 #define CONFIG_SF_DEFAULT_CS		1
 
 #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
@@ -34,7 +35,10 @@
 		"-(rescue-system);gpmi-nand:-(ubi)\0" \
 	"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \
 	"ubiargs=setenv bootargs console=${console},${baudrate} " \
-		"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 "
+		"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \
+	"ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
+		"ubifsload ${fit_addr_r} /boot/system.itb; " \
+		"imi ${fit_addr_r}\0 "
 
 #define CONFIG_SYS_I2C_MXC_I2C4		/* enable I2C bus 4 */
 
include/configs/aristainetos2b.h new file +60 -0

60 lines not on this page · raw message

Signature · 1 line
2.1.0
#4 lore raw

PATCH 3/3 video, lg4573: make spi bus and cs configurable

In reply to Heiko Schocher

make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards.

---

 drivers/video/lg4573.c           | 3 ++-
 include/configs/aristainetos2.h  | 2 ++
 include/configs/aristainetos2b.h | 2 ++
 3 files changed, 6 insertions(+), 1 deletion(-)
drivers/video/lg4573.c +2 -1
index 43670fc..11fef27 100644
@@ -220,7 +220,8 @@ err_claim_bus:
 static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc,
 		       char * const argv[])
 {
-	lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0);
+	lg4573_spi_startup(CONFIG_LG4573_BUS, CONFIG_LG4573_CS, 10000000,
+			   SPI_MODE_0);
 	return 0;
 }
 
include/configs/aristainetos2.h +2 -0
index cdbbcc0..152f5e9 100644
@@ -49,6 +49,8 @@
 /* Framebuffer */
 #define CONFIG_SYS_LDB_CLOCK 33246000
 #define CONFIG_LG4573
+#define CONFIG_LG4573_BUS 0
+#define CONFIG_LG4573_CS 0
 
 #define CONFIG_CMD_BMP
 
include/configs/aristainetos2b.h +2 -0
index e77e5c7..78791db 100644
@@ -49,6 +49,8 @@
 /* Framebuffer */
 #define CONFIG_SYS_LDB_CLOCK 33246000
 #define CONFIG_LG4573
+#define CONFIG_LG4573_BUS 0
+#define CONFIG_LG4573_CS 1
 
 #define CONFIG_CMD_BMP
 
Signature · 1 line
2.1.0
#5 lore raw

cover arm, imx6: aristainetos board updates

In reply to Heiko Schocher

Hi Heiko,

Quoted 10 lines · Heiko Schocher

This patchserie updates the aristainetos board:
- some small fixes for the aristainetos and aristainetos2 board
- there is a new hardware version for the aristaineos2 board, called 2b, add it
- as the display driver is on the 2b version on another spi chipselect, make this configurable in the display driver.

I get two issues with this series:

- correct Kconfig is arch/arm/cpu/armv7/mx6/Kconfig. This is a minor change, I did it my self but I went into issue 2:

- Patch 2/3 depends on Patch3/3, that makes the code not bisectable. Patchec cannot be applied inverted. Please split Patch 3/3 as " make spi bus and cs configurable" (changes in video), setting it as Patch 2, and move changes to aristainetos2b.h into a separate patch - thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================