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imx: mx6: correct enable_fec_anatop_clock

PATCH New Peng Fan 2 participants 2 messages Sep 6, 2015 – Oct 2, 2015 Arm (32-bit)

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Peng Fan

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#0 lore raw

PATCH 1/1 imx: mx6: correct enable_fec_anatop_clock

We should follow 'read->set/clr bit->write' flow for enable_fec_anatop_clock, otherwise we may overridden configuration before enable_fec_anatop_clock.

Cc Stefano Babic <[email protected]>
Cc Cc: Fabio Estevam <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/cpu/armv7/mx6/clock.c +2 -0
index ba6cc75..11efd12 100644
@@ -535,6 +535,8 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
 	if (freq < ENET_25MHZ || freq > ENET_125MHZ)
 		return -EINVAL;
 
+	reg = readl(&anatop->pll_enet);
+
 	if (fec_id == 0) {
 		reg &= ~BM_ANADIG_PLL_ENET_DIV_SELECT;
 		reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);
Signature · 1 line
1.8.4
#1 lore raw

PATCH 1/1 imx: mx6: correct enable_fec_anatop_clock

Quoted 16 lines · Peng Fan

We should follow 'read->set/clr bit->write' flow for enable_fec_anatop_clock, otherwise we may overridden configuration before enable_fec_anatop_clock.

Cc Stefano Babic <[email protected]>
Cc Cc: Fabio Estevam <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/cpu/armv7/mx6/clock.c +0 -0
index ba6cc75..11efd12 100644

arch/arm/cpu/armv7/mx6/clock.c int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) · line 542

Quoted 8 lines
arch/arm/cpu/armv7/mx6/clock.c +2 -0
@@ -535,6 +535,8 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
 	if (freq < ENET_25MHZ || freq > ENET_125MHZ)
 		return -EINVAL;
 
+	reg = readl(&anatop->pll_enet);
+
 	if (fec_id == 0) {
 		reg &= ~BM_ANADIG_PLL_ENET_DIV_SELECT;
 		reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);

Applied to u-boot-imx, thanks!

Best regards,
Stefano Babic

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