imx: cpu: move common chip revision id's

Rework secure boot support for imx6 and imx7
Move existing hab support for imx6 into imx-common for SoC reuse.

Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target platforms to resolve corresponding HAB_RVT_BASE

Signed-off-by Adrian Alonso <[email protected]>

---
Chages for V2: New patch in series

 arch/arm/include/asm/imx-common/hab.h | 2 +-
 include/configs/mx6_common.h          | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

arch/arm/include/asm/imx-common/hab.h +1 -1

index d0eaa67..af77d45 100644
@@ -113,7 +113,7 @@ typedef void hapi_clock_init_t(void);
 #define HAB_ENG_RTL		0x77   /* RTL simulation engine */
 #define HAB_ENG_SW		0xff   /* Software engine */
 
-#ifdef CONFIG_MX6SX
+#ifdef CONFIG_ROM_UNIFIED_SECTIONS
 #define HAB_RVT_BASE			0x00000100
 #else
 #define HAB_RVT_BASE			0x00000094

include/configs/mx6_common.h +0 -0

index ef4cb68..3c7138a 100644

Add mx7 secure boot support, reuse existing mx6 hab

Signed-off-by Adrian Alonso <[email protected]>

---
Changes for V2:
- Split from original patch to track mx7 change set
hab: rework support for imx6/imx7

 arch/arm/imx-common/hab.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

arch/arm/imx-common/hab.c +0 -0

index 9ee0f12..565a838 100644

-----Original Message-----
From: Stefano Babic [mailto:sbabic at denx.de]
Sent: Friday, October 09, 2015 3:53 AM
To: Alonso Lazcano Adrian-B38018 <[email protected]>; u- boot at lists.denx.de; sbabic at denx.de
Cc: otavio at ossystems.com.br; Estevam Fabio-R49496 <[email protected]>; Li Frank-B20596 <[email protected]>; Garg Nitin-B37173 <[email protected]>
Subject: Re: [PATCH v2 4/5] imx: hab add mx7 secure boot support

Hi Adrian,

Quoted 16 lines · Adrian Alonso

Add mx7 secure boot support, reuse existing mx6 hab

Signed-off-by Adrian Alonso <[email protected]>

---
Changes for V2:
- Split from original patch to track mx7 change set
hab: rework support for imx6/imx7

 arch/arm/imx-common/hab.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

arch/arm/imx-common/hab.c +0 -0

index 9ee0f12..565a838 100644

arch/arm/imx-common/hab.c uint8_t hab_engines[16] = { bool · line 264

Quoted 4 lines

arch/arm/imx-common/hab.c +2 -0

@@ -261,12 +261,25 @@ uint8_t hab_engines[16] = {  bool
 is_hab_enabled(void)  {
 	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	uint32_t reg;
+#if CONFIG_MX7

Usage of SOC's runtime detection is vanished by introducing new #ifdef section. I am aware there some registers defined for a SOC and not for another. This is the point. We should make the access unaware for the driver (this file).

hab.c does not yet contain any nasty #ifdef SOC_TYPE - we should have the same in future.

arch/arm/imx-common/hab.c uint8_t hab_engines[16] = { · line 275

Quoted 11 lines

arch/arm/imx-common/hab.c +7 -1

+	struct fuse_bank *bank = &ocotp->bank[1];
+	struct fuse_bank1_regs *fuse =
+		(struct fuse_bank1_regs *)bank->fuse_regs;
+	reg = readl(&fuse->cfg0);
+#elif CONFIG_MX6
 	struct fuse_bank *bank = &ocotp->bank[0];
 	struct fuse_bank0_regs *fuse =
 		(struct fuse_bank0_regs *)bank->fuse_regs;
-	uint32_t reg = readl(&fuse->cfg5);
+	reg = readl(&fuse->cfg5);
+#endif

There are some ways to solve it. For example (but it is not the only solution), the offset can be set into the corresponding imx_regs as offsetof(..) and which fuse bank can be picked up from a table here

	fuse_bank_choosen = {0 ,1 }

and then

	struct fuse_bank *bank;
 	if (is_cpu_type(MXC_CPU_MX7))
		bank = &ocotp->bank[1];
	else
		bank = &ocotp->bank[0];

or you find a better solution, of course - but do not introduce new #ifdef. If you see, hab.c contains at the very beginning a lot of stuff hab_rvt_report_* that makes runtime detection against compiler switches.

arch/arm/imx-common/hab.c uint8_t hab_engines[16] = { · line 280

Quoted 5 lines

arch/arm/imx-common/hab.c +5 -0

+
+	if (is_soc_type(MXC_SOC_MX7))
+		return (reg & 0x2000000) == 0x2000000;
+	else if (is_soc_type(MXC_SOC_MX6))
+		return (reg & 0x2) == 0x2;

If I did not know that all i.MXes are little endian, it looks like an endianess problem. But I suggest to add a macro for a better readiness:

#define IS_HAB_ENABLED_BIT (is_soc_type(MXC_SOC_MX7) ? 0x2000000 :
0x2)

and then you can use here simply:

	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT

arch/arm/imx-common/hab.c uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size) · line 430

Quoted 5 lines

arch/arm/imx-common/hab.c +1 -1

 			 * crash.
 			 */
 			/* Check MMU enabled */
-			if (get_cr() & CR_M) {
+			if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {

There is a long explanation before this code. As it depends from MMU only, it does not explain why it is not required for MX7. Please extend the comment and put a full explanation here.

Best regards,
Stefano Babic

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